URL
https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk
Go to most recent revision |
Only display areas with differences |
Details |
Blame |
View Log
Rev 149 |
Rev 154 |
/* { dg-do compile } */
|
/* { dg-do compile } */
|
/* { dg-options "-O2 -ftree-vectorize" } */
|
/* { dg-options "-O2 -ftree-vectorize" } */
|
|
|
static const unsigned char _c30[] =
|
static const unsigned char _c30[] =
|
"statistic of allocated integer registers:";
|
"statistic of allocated integer registers:";
|
Allocate__WriteStats (void)
|
Allocate__WriteStats (void)
|
{
|
{
|
register int i0, i1, i2, i3, i4, i5;
|
register int i0, i1, i2, i3, i4, i5;
|
l0:i1 = (int) (i5 << 2);
|
l0:i1 = (int) (i5 << 2);
|
if (i0)
|
if (i0)
|
i4 = i5;
|
i4 = i5;
|
l1:i2 += i1;
|
l1:i2 += i1;
|
if (i1)
|
if (i1)
|
goto l0;
|
goto l0;
|
l3:i0 = i1 == 255;
|
l3:i0 = i1 == 255;
|
i1++;
|
i1++;
|
Out__LongInt ((int) i0, (int) 0);
|
Out__LongInt ((int) i0, (int) 0);
|
i0 = i4 >= i1;
|
i0 = i4 >= i1;
|
if (i0)
|
if (i0)
|
goto l3;
|
goto l3;
|
}
|
}
|
|
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.