OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [arm/] [dbg_cp.h] - Diff between revs 24 and 157

Go to most recent revision | Only display areas with differences | Details | Blame | View Log

Rev 24 Rev 157
/*  dbg_cp.h -- ARMulator debug interface:  ARM6 Instruction Emulator.
/*  dbg_cp.h -- ARMulator debug interface:  ARM6 Instruction Emulator.
    Copyright (C) 1994 Advanced RISC Machines Ltd.
    Copyright (C) 1994 Advanced RISC Machines Ltd.
 
 
    This program is free software; you can redistribute it and/or modify
    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.
    (at your option) any later version.
 
 
    This program is distributed in the hope that it will be useful,
    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.
    GNU General Public License for more details.
 
 
    You should have received a copy of the GNU General Public License
    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    along with this program; if not, write to the Free Software
    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
 
 
#ifndef Dbg_CP__h
#ifndef Dbg_CP__h
 
 
#define Dbg_CP__h
#define Dbg_CP__h
 
 
#define Dbg_Access_Readable  1
#define Dbg_Access_Readable  1
#define Dbg_Access_Writable  2
#define Dbg_Access_Writable  2
#define Dbg_Access_CPDT      4  /* else CPRT */
#define Dbg_Access_CPDT      4  /* else CPRT */
 
 
typedef struct
typedef struct
{
{
  unsigned short rmin, rmax;
  unsigned short rmin, rmax;
  /* a single description can be used for a range of registers with
  /* a single description can be used for a range of registers with
     the same properties *accessed via CPDT instructions*
     the same properties *accessed via CPDT instructions*
   */
   */
  unsigned char nbytes;         /* size of register */
  unsigned char nbytes;         /* size of register */
  unsigned char access;         /* see above (Access_xxx) */
  unsigned char access;         /* see above (Access_xxx) */
  union
  union
  {
  {
    struct
    struct
    {
    {
      /* CPDT instructions do not allow the coprocessor much freedom:
      /* CPDT instructions do not allow the coprocessor much freedom:
         only bit 22 ('N') and 12-15 ('CRd') are free for the
         only bit 22 ('N') and 12-15 ('CRd') are free for the
         coprocessor to use as it sees fit.  */
         coprocessor to use as it sees fit.  */
      unsigned char nbit;
      unsigned char nbit;
      unsigned char rdbits;
      unsigned char rdbits;
    }
    }
    cpdt;
    cpdt;
    struct
    struct
    {
    {
      /* CPRT instructions have much more latitude.  The bits fixed
      /* CPRT instructions have much more latitude.  The bits fixed
         by the ARM are  24..31 (condition mask & opcode)
         by the ARM are  24..31 (condition mask & opcode)
         20 (direction)
         20 (direction)
         8..15 (cpnum, arm register)
         8..15 (cpnum, arm register)
         4 (CPRT not CPDO)
         4 (CPRT not CPDO)
         leaving 14 bits free to the coprocessor (fortunately
         leaving 14 bits free to the coprocessor (fortunately
         falling within two bytes).  */
         falling within two bytes).  */
      unsigned char read_b0, read_b1, write_b0, write_b1;
      unsigned char read_b0, read_b1, write_b0, write_b1;
    }
    }
    cprt;
    cprt;
  }
  }
  accessinst;
  accessinst;
}
}
Dbg_CoProRegDesc;
Dbg_CoProRegDesc;
 
 
struct Dbg_CoProDesc
struct Dbg_CoProDesc
{
{
  int entries;
  int entries;
  Dbg_CoProRegDesc regdesc[1 /* really nentries */ ];
  Dbg_CoProRegDesc regdesc[1 /* really nentries */ ];
};
};
 
 
#define Dbg_CoProDesc_Size(n) (sizeof(struct Dbg_CoProDesc) + (n-1)*sizeof(Dbg_CoProRegDesc))
#define Dbg_CoProDesc_Size(n) (sizeof(struct Dbg_CoProDesc) + (n-1)*sizeof(Dbg_CoProRegDesc))
 
 
#endif
#endif
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.