OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [cris/] [asm/] [io8.ms] - Diff between revs 24 and 157

Only display areas with differences | Details | Blame | View Log

Rev 24 Rev 157
# mach: crisv32
# mach: crisv32
# ld: --section-start=.text=0
# ld: --section-start=.text=0
# xerror:
# xerror:
# output: b1e\n
# output: b1e\n
# output: core: 4 byte write to unmapped address 0x90000008 at 0x16\n
# output: core: 4 byte write to unmapped address 0x90000008 at 0x16\n
# output: program stopped with signal 11.\n
# output: program stopped with signal 11.\n
; Check invalid access valid with --cris-900000xx.
; Check invalid access valid with --cris-900000xx.
; "FAIL" area.
; "FAIL" area.
 .include "testutils.inc"
 .include "testutils.inc"
 start
 start
 move.d 0xb1e,$r3
 move.d 0xb1e,$r3
 dumpr3
 dumpr3
 move.d 0x90000008,$acr
 move.d 0x90000008,$acr
 move.d $acr,[$acr]
 move.d $acr,[$acr]
 move.d 0xbadc0de,$r3
 move.d 0xbadc0de,$r3
 dumpr3
 dumpr3
0:
0:
 ba 0b
 ba 0b
 nop
 nop
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.