URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [fr30/] [beorl.cgs] - Diff between revs 24 and 157

Rev 24	Rev 157
`# fr30 testcase for beorl $Rj,@$Ri`	`# fr30 testcase for beorl $Rj,@$Ri`
`# mach(): fr30`	`# mach(): fr30`

`.include "testutils.inc"`	`.include "testutils.inc"`

`START`	`START`

`.text`	`.text`
`.global beorl`	`.global beorl`
`beorl:`	`beorl:`
`; Test beorl $Rj,@$Ri`	`; Test beorl $Rj,@$Ri`
`mvi_h_mem 0x55555555,sp`	`mvi_h_mem 0x55555555,sp`
`set_cc 0x0f ; Condition codes should not change`	`set_cc 0x0f ; Condition codes should not change`
`beorl 0x0a,@sp`	`beorl 0x0a,@sp`
`test_cc 1 1 1 1`	`test_cc 1 1 1 1`
`test_h_mem 0x5f555555,sp`	`test_h_mem 0x5f555555,sp`

`mvi_h_mem 0xf0ffffff,sp`	`mvi_h_mem 0xf0ffffff,sp`
`set_cc 0x04 ; Condition codes should not change`	`set_cc 0x04 ; Condition codes should not change`
`beorl 0x00,@sp`	`beorl 0x00,@sp`
`test_cc 0 1 0 0`	`test_cc 0 1 0 0`
`test_h_mem 0xf0ffffff,sp`	`test_h_mem 0xf0ffffff,sp`

`mvi_h_mem 0xffffffff,sp`	`mvi_h_mem 0xffffffff,sp`
`set_cc 0x0a ; Condition codes should not change`	`set_cc 0x0a ; Condition codes should not change`
`beorl 0x0f,@sp`	`beorl 0x0f,@sp`
`test_cc 1 0 1 0`	`test_cc 1 0 1 0`
`test_h_mem 0xf0ffffff,sp`	`test_h_mem 0xf0ffffff,sp`

`mvi_h_mem 0xddadbeef,sp`	`mvi_h_mem 0xddadbeef,sp`
`set_cc 0x09 ; Condition codes should not change`	`set_cc 0x09 ; Condition codes should not change`
`beorl 0x03,@sp`	`beorl 0x03,@sp`
`test_cc 1 0 0 1`	`test_cc 1 0 0 1`
`test_h_mem 0xdeadbeef,sp`	`test_h_mem 0xdeadbeef,sp`

`pass`	`pass`