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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [frv/] [bclr.cgs] - Diff between revs 24 and 157

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Rev 24 Rev 157
# frv testcase for bclr $ICCi,$hint
# frv testcase for bclr $ICCi,$hint
# mach: all
# mach: all
        .include "testutils.inc"
        .include "testutils.inc"
        start
        start
        .global bclr
        .global bclr
bclr:
bclr:
        set_spr_addr    bad,lr
        set_spr_addr    bad,lr
        set_icc         0x0 0
        set_icc         0x0 0
        bclr            icc0,0
        bclr            icc0,0
        set_spr_addr    ok2,lr
        set_spr_addr    ok2,lr
        set_icc         0x1 1
        set_icc         0x1 1
        bclr            icc1,1
        bclr            icc1,1
        fail
        fail
ok2:
ok2:
        set_spr_addr    bad,lr
        set_spr_addr    bad,lr
        set_icc         0x2 2
        set_icc         0x2 2
        bclr            icc2,2
        bclr            icc2,2
        set_spr_addr    ok4,lr
        set_spr_addr    ok4,lr
        set_icc         0x3 3
        set_icc         0x3 3
        bclr            icc3,3
        bclr            icc3,3
        fail
        fail
ok4:
ok4:
        set_spr_addr    bad,lr
        set_spr_addr    bad,lr
        set_icc         0x4 0
        set_icc         0x4 0
        bclr            icc0,0
        bclr            icc0,0
        set_spr_addr    ok6,lr
        set_spr_addr    ok6,lr
        set_icc         0x5 1
        set_icc         0x5 1
        bclr            icc1,1
        bclr            icc1,1
        fail
        fail
ok6:
ok6:
        set_spr_addr    bad,lr
        set_spr_addr    bad,lr
        set_icc         0x6 2
        set_icc         0x6 2
        bclr            icc2,2
        bclr            icc2,2
        set_spr_addr    ok8,lr
        set_spr_addr    ok8,lr
        set_icc         0x7 3
        set_icc         0x7 3
        bclr            icc3,3
        bclr            icc3,3
        fail
        fail
ok8:
ok8:
        set_spr_addr    bad,lr
        set_spr_addr    bad,lr
        set_icc         0x8 0
        set_icc         0x8 0
        bclr            icc0,0
        bclr            icc0,0
        set_spr_addr    oka,lr
        set_spr_addr    oka,lr
        set_icc         0x9 1
        set_icc         0x9 1
        bclr            icc1,1
        bclr            icc1,1
        fail
        fail
oka:
oka:
        set_spr_addr    bad,lr
        set_spr_addr    bad,lr
        set_icc         0xa 2
        set_icc         0xa 2
        bclr            icc2,2
        bclr            icc2,2
        set_spr_addr    okc,lr
        set_spr_addr    okc,lr
        set_icc         0xb 3
        set_icc         0xb 3
        bclr            icc3,3
        bclr            icc3,3
        fail
        fail
okc:
okc:
        set_spr_addr    bad,lr
        set_spr_addr    bad,lr
        set_icc         0xc 0
        set_icc         0xc 0
        bclr            icc0,0
        bclr            icc0,0
        set_spr_addr    oke,lr
        set_spr_addr    oke,lr
        set_icc         0xd 1
        set_icc         0xd 1
        bclr            icc1,1
        bclr            icc1,1
        fail
        fail
oke:
oke:
        set_spr_addr    bad,lr
        set_spr_addr    bad,lr
        set_icc         0xe 2
        set_icc         0xe 2
        bclr            icc2,2
        bclr            icc2,2
        set_spr_addr    okg,lr
        set_spr_addr    okg,lr
        set_icc         0xf 3
        set_icc         0xf 3
        bclr            icc3,3
        bclr            icc3,3
        fail
        fail
okg:
okg:
        pass
        pass
bad:
bad:
        fail
        fail
 
 

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