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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [frv/] [cldhf.cgs] - Diff between revs 24 and 157

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Rev 24 Rev 157
# frv testcase for cldhf @($GRi,$GRj),$GRk,$CCi,$cond
# frv testcase for cldhf @($GRi,$GRj),$GRk,$CCi,$cond
# mach: all
# mach: all
        .include "testutils.inc"
        .include "testutils.inc"
        start
        start
        .global cldhf
        .global cldhf
cldhf:
cldhf:
        set_spr_immed   0x1b1b,cccr
        set_spr_immed   0x1b1b,cccr
        set_mem_limmed  0xdead,0xbeef,sp
        set_mem_limmed  0xdead,0xbeef,sp
        set_fr_iimmed   0xbeef,0xdead,fr8
        set_fr_iimmed   0xbeef,0xdead,fr8
        set_gr_immed    0,gr7
        set_gr_immed    0,gr7
        cldhf           @(sp,gr7),fr8,cc0,1
        cldhf           @(sp,gr7),fr8,cc0,1
        test_fr_limmed  0x0000,0xdead,fr8
        test_fr_limmed  0x0000,0xdead,fr8
        set_gr_immed    2,gr7
        set_gr_immed    2,gr7
        cldhf           @(sp,gr7),fr8,cc0,1
        cldhf           @(sp,gr7),fr8,cc0,1
        test_fr_limmed  0x0000,0xbeef,fr8
        test_fr_limmed  0x0000,0xbeef,fr8
        set_mem_limmed  0xffff,0x0000,sp
        set_mem_limmed  0xffff,0x0000,sp
        inc_gr_immed    4,sp
        inc_gr_immed    4,sp
        set_gr_immed    -2,gr7
        set_gr_immed    -2,gr7
        cldhf           @(sp,gr7),fr8,cc4,1
        cldhf           @(sp,gr7),fr8,cc4,1
        test_fr_limmed  0x0000,0x0000,fr8
        test_fr_limmed  0x0000,0x0000,fr8
        set_mem_limmed  0xdead,0xbeef,sp
        set_mem_limmed  0xdead,0xbeef,sp
        set_fr_iimmed   0xbeef,0xdead,fr8
        set_fr_iimmed   0xbeef,0xdead,fr8
        set_gr_immed    0,gr7
        set_gr_immed    0,gr7
        cldhf           @(sp,gr7),fr8,cc0,0
        cldhf           @(sp,gr7),fr8,cc0,0
        test_fr_limmed  0xbeef,0xdead,fr8
        test_fr_limmed  0xbeef,0xdead,fr8
        set_gr_immed    2,gr7
        set_gr_immed    2,gr7
        cldhf           @(sp,gr7),fr8,cc0,0
        cldhf           @(sp,gr7),fr8,cc0,0
        test_fr_limmed  0xbeef,0xdead,fr8
        test_fr_limmed  0xbeef,0xdead,fr8
        set_mem_limmed  0xffff,0x0000,sp
        set_mem_limmed  0xffff,0x0000,sp
        inc_gr_immed    4,sp
        inc_gr_immed    4,sp
        set_gr_immed    -2,gr7
        set_gr_immed    -2,gr7
        cldhf           @(sp,gr7),fr8,cc4,0
        cldhf           @(sp,gr7),fr8,cc4,0
        test_fr_limmed  0xbeef,0xdead,fr8
        test_fr_limmed  0xbeef,0xdead,fr8
        set_mem_limmed  0xdead,0xbeef,sp
        set_mem_limmed  0xdead,0xbeef,sp
        set_fr_iimmed   0xbeef,0xdead,fr8
        set_fr_iimmed   0xbeef,0xdead,fr8
        set_gr_immed    0,gr7
        set_gr_immed    0,gr7
        cldhf           @(sp,gr7),fr8,cc1,0
        cldhf           @(sp,gr7),fr8,cc1,0
        test_fr_limmed  0x0000,0xdead,fr8
        test_fr_limmed  0x0000,0xdead,fr8
        set_gr_immed    2,gr7
        set_gr_immed    2,gr7
        cldhf           @(sp,gr7),fr8,cc1,0
        cldhf           @(sp,gr7),fr8,cc1,0
        test_fr_limmed  0x0000,0xbeef,fr8
        test_fr_limmed  0x0000,0xbeef,fr8
        set_mem_limmed  0xffff,0x0000,sp
        set_mem_limmed  0xffff,0x0000,sp
        inc_gr_immed    4,sp
        inc_gr_immed    4,sp
        set_gr_immed    -2,gr7
        set_gr_immed    -2,gr7
        cldhf           @(sp,gr7),fr8,cc5,0
        cldhf           @(sp,gr7),fr8,cc5,0
        test_fr_limmed  0x0000,0x0000,fr8
        test_fr_limmed  0x0000,0x0000,fr8
        set_mem_limmed  0xdead,0xbeef,sp
        set_mem_limmed  0xdead,0xbeef,sp
        set_fr_iimmed   0xbeef,0xdead,fr8
        set_fr_iimmed   0xbeef,0xdead,fr8
        set_gr_immed    0,gr7
        set_gr_immed    0,gr7
        cldhf           @(sp,gr7),fr8,cc1,1
        cldhf           @(sp,gr7),fr8,cc1,1
        test_fr_limmed  0xbeef,0xdead,fr8
        test_fr_limmed  0xbeef,0xdead,fr8
        set_gr_immed    2,gr7
        set_gr_immed    2,gr7
        cldhf           @(sp,gr7),fr8,cc1,1
        cldhf           @(sp,gr7),fr8,cc1,1
        test_fr_limmed  0xbeef,0xdead,fr8
        test_fr_limmed  0xbeef,0xdead,fr8
        set_mem_limmed  0xffff,0x0000,sp
        set_mem_limmed  0xffff,0x0000,sp
        inc_gr_immed    4,sp
        inc_gr_immed    4,sp
        set_gr_immed    -2,gr7
        set_gr_immed    -2,gr7
        cldhf           @(sp,gr7),fr8,cc5,1
        cldhf           @(sp,gr7),fr8,cc5,1
        test_fr_limmed  0xbeef,0xdead,fr8
        test_fr_limmed  0xbeef,0xdead,fr8
        set_mem_limmed  0xdead,0xbeef,sp
        set_mem_limmed  0xdead,0xbeef,sp
        set_fr_iimmed   0xbeef,0xdead,fr8
        set_fr_iimmed   0xbeef,0xdead,fr8
        set_gr_immed    0,gr7
        set_gr_immed    0,gr7
        cldhf           @(sp,gr7),fr8,cc2,0
        cldhf           @(sp,gr7),fr8,cc2,0
        test_fr_limmed  0xbeef,0xdead,fr8
        test_fr_limmed  0xbeef,0xdead,fr8
        set_gr_immed    2,gr7
        set_gr_immed    2,gr7
        cldhf           @(sp,gr7),fr8,cc2,1
        cldhf           @(sp,gr7),fr8,cc2,1
        test_fr_limmed  0xbeef,0xdead,fr8
        test_fr_limmed  0xbeef,0xdead,fr8
        set_mem_limmed  0xffff,0x0000,sp
        set_mem_limmed  0xffff,0x0000,sp
        inc_gr_immed    4,sp
        inc_gr_immed    4,sp
        set_gr_immed    -2,gr7
        set_gr_immed    -2,gr7
        cldhf           @(sp,gr7),fr8,cc6,0
        cldhf           @(sp,gr7),fr8,cc6,0
        test_fr_limmed  0xbeef,0xdead,fr8
        test_fr_limmed  0xbeef,0xdead,fr8
        set_mem_limmed  0xdead,0xbeef,sp
        set_mem_limmed  0xdead,0xbeef,sp
        set_fr_iimmed   0xbeef,0xdead,fr8
        set_fr_iimmed   0xbeef,0xdead,fr8
        set_gr_immed    0,gr7
        set_gr_immed    0,gr7
        cldhf           @(sp,gr7),fr8,cc3,1
        cldhf           @(sp,gr7),fr8,cc3,1
        test_fr_limmed  0xbeef,0xdead,fr8
        test_fr_limmed  0xbeef,0xdead,fr8
        set_gr_immed    2,gr7
        set_gr_immed    2,gr7
        cldhf           @(sp,gr7),fr8,cc3,0
        cldhf           @(sp,gr7),fr8,cc3,0
        test_fr_limmed  0xbeef,0xdead,fr8
        test_fr_limmed  0xbeef,0xdead,fr8
        set_mem_limmed  0xffff,0x0000,sp
        set_mem_limmed  0xffff,0x0000,sp
        inc_gr_immed    4,sp
        inc_gr_immed    4,sp
        set_gr_immed    -2,gr7
        set_gr_immed    -2,gr7
        cldhf           @(sp,gr7),fr8,cc7,1
        cldhf           @(sp,gr7),fr8,cc7,1
        test_fr_limmed  0xbeef,0xdead,fr8
        test_fr_limmed  0xbeef,0xdead,fr8
        pass
        pass
 
 

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