# frv testcase for lddc @($GRi,$GRj),$GRk
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# frv testcase for lddc @($GRi,$GRj),$GRk
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# mach: frv
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# mach: frv
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# as(frv): -mcpu=frv
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# as(frv): -mcpu=frv
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.include "testutils.inc"
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.include "testutils.inc"
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start
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start
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.global lddc
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.global lddc
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lddc:
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lddc:
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set_mem_limmed 0xdead,0xbeef,sp
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set_mem_limmed 0xdead,0xbeef,sp
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inc_gr_immed -4,sp
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inc_gr_immed -4,sp
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set_mem_limmed 0xbeef,0xdead,sp
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set_mem_limmed 0xbeef,0xdead,sp
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set_cpr_limmed 0xdead,0xbeef,cpr8
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set_cpr_limmed 0xdead,0xbeef,cpr8
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set_cpr_limmed 0xbeef,0xdead,cpr9
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set_cpr_limmed 0xbeef,0xdead,cpr9
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set_gr_immed 0,gr7
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set_gr_immed 0,gr7
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; loading into cpr0 is business as usual
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; loading into cpr0 is business as usual
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set_cpr_limmed 0xdead,0xbeef,cpr0
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set_cpr_limmed 0xdead,0xbeef,cpr0
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set_cpr_limmed 0xbeef,0xdead,cpr1
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set_cpr_limmed 0xbeef,0xdead,cpr1
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lddc @(sp,gr7),cpr0
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lddc @(sp,gr7),cpr0
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test_cpr_limmed 0xbeef,0xdead,cpr0
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test_cpr_limmed 0xbeef,0xdead,cpr0
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test_cpr_limmed 0xdead,0xbeef,cpr1
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test_cpr_limmed 0xdead,0xbeef,cpr1
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lddc @(sp,gr7),cpr8
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lddc @(sp,gr7),cpr8
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test_cpr_limmed 0xbeef,0xdead,cpr8
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test_cpr_limmed 0xbeef,0xdead,cpr8
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test_cpr_limmed 0xdead,0xbeef,cpr9
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test_cpr_limmed 0xdead,0xbeef,cpr9
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set_cpr_limmed 0xdead,0xbeef,cpr8
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set_cpr_limmed 0xdead,0xbeef,cpr8
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set_cpr_limmed 0xbeef,0xdead,cpr9
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set_cpr_limmed 0xbeef,0xdead,cpr9
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inc_gr_immed -8,sp
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inc_gr_immed -8,sp
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set_gr_immed 8,gr7
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set_gr_immed 8,gr7
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lddc @(sp,gr7),cpr8
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lddc @(sp,gr7),cpr8
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test_cpr_limmed 0xbeef,0xdead,cpr8
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test_cpr_limmed 0xbeef,0xdead,cpr8
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test_cpr_limmed 0xdead,0xbeef,cpr9
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test_cpr_limmed 0xdead,0xbeef,cpr9
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set_cpr_limmed 0xdead,0xbeef,cpr8
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set_cpr_limmed 0xdead,0xbeef,cpr8
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set_cpr_limmed 0xbeef,0xdead,cpr9
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set_cpr_limmed 0xbeef,0xdead,cpr9
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inc_gr_immed 16,sp
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inc_gr_immed 16,sp
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set_gr_immed -8,gr7
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set_gr_immed -8,gr7
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lddc @(sp,gr7),cpr8
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lddc @(sp,gr7),cpr8
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test_cpr_limmed 0xbeef,0xdead,cpr8
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test_cpr_limmed 0xbeef,0xdead,cpr8
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test_cpr_limmed 0xdead,0xbeef,cpr9
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test_cpr_limmed 0xdead,0xbeef,cpr9
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pass
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pass
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