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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [frv/] [mcplhi.cgs] - Diff between revs 24 and 157

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Rev 24 Rev 157
# frv testcase for mcplhi $FRi,$s6,$FRk
# frv testcase for mcplhi $FRi,$s6,$FRk
# mach: fr400 fr550
# mach: fr400 fr550
        .include "testutils.inc"
        .include "testutils.inc"
        start
        start
        .global mcplhi
        .global mcplhi
mcplhi:
mcplhi:
        set_fr_iimmed   0xdead,0xbeef,fr8
        set_fr_iimmed   0xdead,0xbeef,fr8
        set_fr_iimmed   0xbeef,0xdead,fr9
        set_fr_iimmed   0xbeef,0xdead,fr9
        set_fr_iimmed   0x1234,0x5678,fr10
        set_fr_iimmed   0x1234,0x5678,fr10
        mcplhi          fr8,0x0,fr10    ; Shift by 0
        mcplhi          fr8,0x0,fr10    ; Shift by 0
        test_fr_iimmed  0xdead5678,fr10
        test_fr_iimmed  0xdead5678,fr10
        set_fr_iimmed   0x1234,0x5678,fr10
        set_fr_iimmed   0x1234,0x5678,fr10
        mcplhi          fr8,0x1,fr10    ; Shift by 1
        mcplhi          fr8,0x1,fr10    ; Shift by 1
        test_fr_iimmed  0xbd5b5678,fr10
        test_fr_iimmed  0xbd5b5678,fr10
        set_fr_iimmed   0x1234,0x5678,fr10
        set_fr_iimmed   0x1234,0x5678,fr10
        mcplhi          fr8,0x4,fr10    ; Shift by 4
        mcplhi          fr8,0x4,fr10    ; Shift by 4
        test_fr_iimmed  0xeadf5678,fr10
        test_fr_iimmed  0xeadf5678,fr10
        set_fr_iimmed   0x1234,0x5678,fr10
        set_fr_iimmed   0x1234,0x5678,fr10
        mcplhi          fr8,0xc,fr10    ; Shift by 12
        mcplhi          fr8,0xc,fr10    ; Shift by 12
        test_fr_iimmed  0xdeef5678,fr10
        test_fr_iimmed  0xdeef5678,fr10
        set_fr_iimmed   0x1234,0x5678,fr10
        set_fr_iimmed   0x1234,0x5678,fr10
        mcplhi          fr8,0xf,fr10    ; Shift by 15
        mcplhi          fr8,0xf,fr10    ; Shift by 15
        test_fr_iimmed  0xbeef5678,fr10
        test_fr_iimmed  0xbeef5678,fr10
        ; test again with truncated shift values
        ; test again with truncated shift values
        set_fr_iimmed   0x1234,0x5678,fr10
        set_fr_iimmed   0x1234,0x5678,fr10
        mcplhi          fr8,0x10,fr10   ; Shift by 0
        mcplhi          fr8,0x10,fr10   ; Shift by 0
        test_fr_iimmed  0xdead5678,fr10
        test_fr_iimmed  0xdead5678,fr10
        set_fr_iimmed   0x1234,0x5678,fr10
        set_fr_iimmed   0x1234,0x5678,fr10
        mcplhi          fr8,0x21,fr10   ; Shift by 1
        mcplhi          fr8,0x21,fr10   ; Shift by 1
        test_fr_iimmed  0xbd5b5678,fr10
        test_fr_iimmed  0xbd5b5678,fr10
        set_fr_iimmed   0x1234,0x5678,fr10
        set_fr_iimmed   0x1234,0x5678,fr10
        mcplhi          fr8,0x34,fr10   ; Shift by 4
        mcplhi          fr8,0x34,fr10   ; Shift by 4
        test_fr_iimmed  0xeadf5678,fr10
        test_fr_iimmed  0xeadf5678,fr10
        set_fr_iimmed   0x1234,0x5678,fr10
        set_fr_iimmed   0x1234,0x5678,fr10
        mcplhi          fr8,0x1c,fr10   ; Shift by 12
        mcplhi          fr8,0x1c,fr10   ; Shift by 12
        test_fr_iimmed  0xdeef5678,fr10
        test_fr_iimmed  0xdeef5678,fr10
        set_fr_iimmed   0x1234,0x5678,fr10
        set_fr_iimmed   0x1234,0x5678,fr10
        mcplhi          fr8,0x2f,fr10   ; Shift by 15
        mcplhi          fr8,0x2f,fr10   ; Shift by 15
        test_fr_iimmed  0xbeef5678,fr10
        test_fr_iimmed  0xbeef5678,fr10
        pass
        pass
 
 

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