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| Rev 24 |
Rev 157 |
# sh testcase for bld
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# sh testcase for bld
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# mach: all
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# mach: all
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# as(sh): -defsym sim_cpu=0
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# as(sh): -defsym sim_cpu=0
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# as(shdsp): -defsym sim_cpu=1 -dsp
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# as(shdsp): -defsym sim_cpu=1 -dsp
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.include "testutils.inc"
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.include "testutils.inc"
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.align 2
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.align 2
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_x: .long 0xa5a5a5a5
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_x: .long 0xa5a5a5a5
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_y: .long 0x55555555
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_y: .long 0x55555555
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start
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start
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bld_b_imm_disp12_reg:
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bld_b_imm_disp12_reg:
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set_grs_a5a5
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set_grs_a5a5
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mov.l x, r1
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mov.l x, r1
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bld.b #0, @(0, r1)
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bld.b #0, @(0, r1)
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bf8k mfail
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bf8k mfail
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bld.b #1, @(0, r1)
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bld.b #1, @(0, r1)
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bt8k mfail
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bt8k mfail
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bld.b #2, @(0, r1)
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bld.b #2, @(0, r1)
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bf8k mfail
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bf8k mfail
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bld.b #3, @(0, r1)
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bld.b #3, @(0, r1)
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bt8k mfail
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bt8k mfail
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bld.b #4, @(0, r1)
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bld.b #4, @(0, r1)
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bt8k mfail
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bt8k mfail
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bld.b #5, @(0, r1)
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bld.b #5, @(0, r1)
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bf8k mfail
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bf8k mfail
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bld.b #6, @(0, r1)
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bld.b #6, @(0, r1)
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bt8k mfail
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bt8k mfail
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bld.b #7, @(0, r1)
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bld.b #7, @(0, r1)
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bf8k mfail
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bf8k mfail
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bld.b #0, @(1, r1)
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bld.b #0, @(1, r1)
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bf8k mfail
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bf8k mfail
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bld.b #1, @(1, r1)
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bld.b #1, @(1, r1)
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bt8k mfail
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bt8k mfail
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bld.b #2, @(1, r1)
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bld.b #2, @(1, r1)
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bf8k mfail
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bf8k mfail
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bld.b #3, @(1, r1)
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bld.b #3, @(1, r1)
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bt8k mfail
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bt8k mfail
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bld.b #4, @(1, r1)
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bld.b #4, @(1, r1)
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bt8k mfail
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bt8k mfail
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bld.b #5, @(1, r1)
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bld.b #5, @(1, r1)
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bf8k mfail
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bf8k mfail
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bld.b #6, @(1, r1)
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bld.b #6, @(1, r1)
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bt8k mfail
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bt8k mfail
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bld.b #7, @(1, r1)
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bld.b #7, @(1, r1)
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bf8k mfail
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bf8k mfail
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bld.b #0, @(2, r1)
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bld.b #0, @(2, r1)
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bf8k mfail
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bf8k mfail
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bld.b #1, @(2, r1)
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bld.b #1, @(2, r1)
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bt8k mfail
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bt8k mfail
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bld.b #2, @(2, r1)
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bld.b #2, @(2, r1)
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bf8k mfail
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bf8k mfail
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bld.b #3, @(2, r1)
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bld.b #3, @(2, r1)
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bt8k mfail
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bt8k mfail
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bld.b #4, @(2, r1)
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bld.b #4, @(2, r1)
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bt8k mfail
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bt8k mfail
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bld.b #5, @(2, r1)
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bld.b #5, @(2, r1)
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bf8k mfail
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bf8k mfail
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bld.b #6, @(2, r1)
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bld.b #6, @(2, r1)
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bt8k mfail
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bt8k mfail
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bld.b #7, @(2, r1)
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bld.b #7, @(2, r1)
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bf8k mfail
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bf8k mfail
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bld.b #0, @(3, r1)
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bld.b #0, @(3, r1)
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bf8k mfail
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bf8k mfail
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bld.b #1, @(3, r1)
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bld.b #1, @(3, r1)
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bt8k mfail
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bt8k mfail
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bld.b #2, @(3, r1)
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bld.b #2, @(3, r1)
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bf8k mfail
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bf8k mfail
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bld.b #3, @(3, r1)
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bld.b #3, @(3, r1)
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bt8k mfail
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bt8k mfail
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bld.b #4, @(3, r1)
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bld.b #4, @(3, r1)
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bt8k mfail
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bt8k mfail
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bld.b #5, @(3, r1)
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bld.b #5, @(3, r1)
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bf8k mfail
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bf8k mfail
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bld.b #6, @(3, r1)
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bld.b #6, @(3, r1)
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bt8k mfail
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bt8k mfail
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bld.b #7, @(3, r1)
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bld.b #7, @(3, r1)
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bf8k mfail
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bf8k mfail
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assertreg _x, r1
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assertreg _x, r1
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bld_imm_reg:
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bld_imm_reg:
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set_greg 0xa5a5a5a5, r1
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set_greg 0xa5a5a5a5, r1
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bld #0, r1
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bld #0, r1
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bf8k mfail
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bf8k mfail
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bld #1, r1
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bld #1, r1
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bt8k mfail
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bt8k mfail
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bld #2, r1
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bld #2, r1
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bf8k mfail
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bf8k mfail
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bld #3, r1
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bld #3, r1
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bt8k mfail
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bt8k mfail
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bld #4, r1
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bld #4, r1
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bt8k mfail
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bt8k mfail
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bld #5, r1
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bld #5, r1
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bf8k mfail
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bf8k mfail
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bld #6, r1
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bld #6, r1
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bt8k mfail
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bt8k mfail
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bld #7, r1
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bld #7, r1
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bf8k mfail
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bf8k mfail
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test_grs_a5a5
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test_grs_a5a5
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pass
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pass
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exit 0
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exit 0
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.align 2
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.align 2
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x: .long _x
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x: .long _x
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y: .long _y
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y: .long _y
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