OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [sh64/] [compact/] [movb4.cgs] - Diff between revs 24 and 157

Only display areas with differences | Details | Blame | View Log

Rev 24 Rev 157
# sh testcase for mov.b r0, @($imm8, gbr) -*- Asm -*-
# sh testcase for mov.b r0, @($imm8, gbr) -*- Asm -*-
# mach: all
# mach: all
# as: -isa=shcompact
# as: -isa=shcompact
# ld: -m shelf32
# ld: -m shelf32
        .include "compact/testutils.inc"
        .include "compact/testutils.inc"
        start
        start
        mov #0, r0
        mov #0, r0
        or #170, r0
        or #170, r0
        mov r0, r3
        mov r0, r3
        mov #30, r2
        mov #30, r2
        ldc r2, gbr
        ldc r2, gbr
        mov.b r0, @(40, gbr)
        mov.b r0, @(40, gbr)
        # Load the value back into a different register.
        # Load the value back into a different register.
        mov.b @(40, gbr), r0
        mov.b @(40, gbr), r0
        # Check the lowest order byte matches the stored value.
        # Check the lowest order byte matches the stored value.
        and #255, r0
        and #255, r0
        cmp/eq r0, r3
        cmp/eq r0, r3
        bf wrong
        bf wrong
okay:
okay:
        pass
        pass
wrong:
wrong:
        fail
        fail
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.