OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [sh64/] [media/] [beq.cgs] - Diff between revs 24 and 157

Only display areas with differences | Details | Blame | View Log

Rev 24 Rev 157
# sh testcase for beq$likely $rm, $rn, $tra -*- Asm -*-
# sh testcase for beq$likely $rm, $rn, $tra -*- Asm -*-
# mach: all
# mach: all
# as: -isa=shmedia
# as: -isa=shmedia
# ld: -m shelf64
# ld: -m shelf64
        .include "media/testutils.inc"
        .include "media/testutils.inc"
        start
        start
        .global beq
        .global beq
init:
init:
        # Load up the branch target registers.
        # Load up the branch target registers.
        pta beq2, tr0
        pta beq2, tr0
        pta beq3, tr1
        pta beq3, tr1
        pta wrong, tr2
        pta wrong, tr2
beq1:
beq1:
        # Compare r0 with itself.
        # Compare r0 with itself.
        # Always true, so branch likely.
        # Always true, so branch likely.
        movi 1, r0
        movi 1, r0
        beq/l r0, r0, tr0
        beq/l r0, r0, tr0
        # We should branch over this.
        # We should branch over this.
        fail
        fail
beq2:
beq2:
        # Ensure high order bits are compared, too.
        # Ensure high order bits are compared, too.
        movi 1, r0
        movi 1, r0
        shlli r0, 35, r0
        shlli r0, 35, r0
        addi r0, 10, r0
        addi r0, 10, r0
        movi 1, r1
        movi 1, r1
        shlli r1, 35, r1
        shlli r1, 35, r1
        addi r1, 10, r1
        addi r1, 10, r1
        beq r0, r1, tr1
        beq r0, r1, tr1
        # We should branch over this, too.
        # We should branch over this, too.
        fail
        fail
beq3:
beq3:
        movi 1, r0
        movi 1, r0
        shlli r0, 35, r0
        shlli r0, 35, r0
        addi r0, 10, r0
        addi r0, 10, r0
        movi 2, r1
        movi 2, r1
        shlli r1, 35, r1
        shlli r1, 35, r1
        addi r1, 9, r1
        addi r1, 9, r1
        # Unlikely we'll branch!
        # Unlikely we'll branch!
        beq/u r0, r1, tr2
        beq/u r0, r1, tr2
        # We should proceed to pass here.
        # We should proceed to pass here.
okay:
okay:
        pass
        pass
wrong:
wrong:
        fail
        fail
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.