URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Go to most recent revision |
Only display areas with differences |
Details |
Blame |
View Log
Rev 205 |
Rev 816 |
#objdump: -drwMintel
|
#objdump: -drwMintel
|
#name: x86-64 EPT (Intel mode)
|
#name: x86-64 EPT (Intel mode)
|
#source: x86-64-ept.s
|
#source: x86-64-ept.s
|
|
|
.*: +file format .*
|
.*: +file format .*
|
|
|
Disassembly of section .text:
|
Disassembly of section .text:
|
|
|
0+ <_start>:
|
0+ <_start>:
|
[ ]*[a-f0-9]+: 66 0f 38 80 19 invept rbx,OWORD PTR \[rcx\]
|
[ ]*[a-f0-9]+: 66 0f 38 80 19 invept rbx,OWORD PTR \[rcx\]
|
[ ]*[a-f0-9]+: 66 44 0f 38 80 19 invept r11,OWORD PTR \[rcx\]
|
[ ]*[a-f0-9]+: 66 44 0f 38 80 19 invept r11,OWORD PTR \[rcx\]
|
[ ]*[a-f0-9]+: 66 0f 38 81 19 invvpid rbx,OWORD PTR \[rcx\]
|
[ ]*[a-f0-9]+: 66 0f 38 81 19 invvpid rbx,OWORD PTR \[rcx\]
|
[ ]*[a-f0-9]+: 66 44 0f 38 81 19 invvpid r11,OWORD PTR \[rcx\]
|
[ ]*[a-f0-9]+: 66 44 0f 38 81 19 invvpid r11,OWORD PTR \[rcx\]
|
[ ]*[a-f0-9]+: 66 0f 38 80 19 invept rbx,OWORD PTR \[rcx\]
|
[ ]*[a-f0-9]+: 66 0f 38 80 19 invept rbx,OWORD PTR \[rcx\]
|
[ ]*[a-f0-9]+: 66 44 0f 38 80 19 invept r11,OWORD PTR \[rcx\]
|
[ ]*[a-f0-9]+: 66 44 0f 38 80 19 invept r11,OWORD PTR \[rcx\]
|
[ ]*[a-f0-9]+: 66 0f 38 81 19 invvpid rbx,OWORD PTR \[rcx\]
|
[ ]*[a-f0-9]+: 66 0f 38 81 19 invvpid rbx,OWORD PTR \[rcx\]
|
[ ]*[a-f0-9]+: 66 44 0f 38 81 19 invvpid r11,OWORD PTR \[rcx\]
|
[ ]*[a-f0-9]+: 66 44 0f 38 81 19 invvpid r11,OWORD PTR \[rcx\]
|
#pass
|
#pass
|
|
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.