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https://opencores.org/ocsvn/openrisc/openrisc/trunk
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Rev 816 |
Rev 818 |
#as:
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#as:
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#objdump: -dr
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#objdump: -dr
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#name: rela-1
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#name: rela-1
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.*: +file format .*
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.*: +file format .*
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Disassembly of section .text:
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Disassembly of section .text:
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0+0000 <.text>:
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0+0000 <.text>:
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0: fe 00 00 00 bl 0 <.text>
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0: fe 00 00 00 bl 0 <.text>
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0: R_M32R_26_PCREL_RELA .text2\+0x8
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0: R_M32R_26_PCREL_RELA .text2\+0x8
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4: fe 00 00 00 bl 4 <.text\+0x4>
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4: fe 00 00 00 bl 4 <.text\+0x4>
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4: R_M32R_26_PCREL_RELA .text2\+0x8
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4: R_M32R_26_PCREL_RELA .text2\+0x8
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8: 7e 00 f0 00 bl 8 <.text\+0x8> \|\| nop
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8: 7e 00 f0 00 bl 8 <.text\+0x8> \|\| nop
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8: R_M32R_10_PCREL_RELA .text2\+0x8
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8: R_M32R_10_PCREL_RELA .text2\+0x8
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c: b0 90 00 00 bnez r0,c <.text\+0xc>
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c: b0 90 00 00 bnez r0,c <.text\+0xc>
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c: R_M32R_18_PCREL_RELA .text2\+0x8
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c: R_M32R_18_PCREL_RELA .text2\+0x8
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10: 10 80 7e 00 mv r0,r0 -> bl 10 <.text\+0x10>
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10: 10 80 7e 00 mv r0,r0 -> bl 10 <.text\+0x10>
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12: R_M32R_10_PCREL_RELA .text2\+0x8
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12: R_M32R_10_PCREL_RELA .text2\+0x8
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Disassembly of section .text2:
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Disassembly of section .text2:
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0+0000 :
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0+0000 :
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0: 70 00 70 00 nop -> nop
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0: 70 00 70 00 nop -> nop
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4: 70 00 70 00 nop -> nop
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4: 70 00 70 00 nop -> nop
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