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https://opencores.org/ocsvn/openrisc/openrisc/trunk
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Rev 205 |
Rev 816 |
#as:
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#as:
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#objdump: -dr
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#objdump: -dr
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#name: uppercase
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#name: uppercase
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.*: +file format .*
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.*: +file format .*
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Disassembly of section .text:
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Disassembly of section .text:
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0+0000 :
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0+0000 :
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0: 10 81 10 91 * mv r0,r1 -> mvfc r0,cbr
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0: 10 81 10 91 * mv r0,r1 -> mvfc r0,cbr
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0+0004 :
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0+0004 :
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4: d0 c0 00 00 seth r0,#0x0
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4: d0 c0 00 00 seth r0,#0x0
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[ ]*4: R_M32R_HI16_ULO_RELA [.]text\+0x4
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[ ]*4: R_M32R_HI16_ULO_RELA [.]text\+0x4
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0+0008 :
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0+0008 :
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8: d0 c0 00 00 seth r0,#0x0
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8: d0 c0 00 00 seth r0,#0x0
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[ ]*8: R_M32R_HI16_SLO_RELA [.]text\+0x8
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[ ]*8: R_M32R_HI16_SLO_RELA [.]text\+0x8
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0+000c :
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0+000c :
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c: 80 e0 00 00 or3 r0,r0,#0x0
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c: 80 e0 00 00 or3 r0,r0,#0x0
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[ ]*c: R_M32R_LO16_RELA [.]text\+0xc
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[ ]*c: R_M32R_LO16_RELA [.]text\+0xc
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0+0010 :
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0+0010 :
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10: 80 a0 00 00 add3 r0,r0,#0
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10: 80 a0 00 00 add3 r0,r0,#0
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[ ]*10: R_M32R_SDA16_RELA sdavar
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[ ]*10: R_M32R_SDA16_RELA sdavar
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