/* Table of opcodes for the OpenRISC 1000 ISA.
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/* Table of opcodes for the OpenRISC 1000 ISA.
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Copyright 2002, 2003 Free Software Foundation, Inc.
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Copyright 2002, 2003 Free Software Foundation, Inc.
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Contributed by Damjan Lampret (lampret@opencores.org).
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Contributed by Damjan Lampret (lampret@opencores.org).
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This file is part of or1k_gen_isa, or1ksim, GDB and GAS.
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This file is part of or1k_gen_isa, or1ksim, GDB and GAS.
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This program is free software; you can redistribute it and/or modify
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
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/* We treat all letters the same in encode/decode routines so
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/* We treat all letters the same in encode/decode routines so
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we need to assign some characteristics to them like signess etc. */
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we need to assign some characteristics to them like signess etc. */
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#ifndef OR32_H_ISA
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#ifndef OR32_H_ISA
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#define OR32_H_ISA
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#define OR32_H_ISA
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#define NUM_UNSIGNED (0)
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#define NUM_UNSIGNED (0)
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#define NUM_SIGNED (1)
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#define NUM_SIGNED (1)
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#define MAX_GPRS 32
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#define MAX_GPRS 32
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#define PAGE_SIZE 8192
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#define PAGE_SIZE 8192
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#undef __HALF_WORD_INSN__
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#undef __HALF_WORD_INSN__
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#define OPERAND_DELIM (',')
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#define OPERAND_DELIM (',')
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#define OR32_IF_DELAY (1)
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#define OR32_IF_DELAY (1)
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#define OR32_W_FLAG (2)
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#define OR32_W_FLAG (2)
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#define OR32_R_FLAG (4)
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#define OR32_R_FLAG (4)
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#if defined(HAS_EXECUTION)
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#if defined(HAS_EXECUTION)
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# if SIMPLE_EXECUTION
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# if SIMPLE_EXECUTION
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# include "simpl32_defs.h"
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# include "simpl32_defs.h"
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# elif DYNAMIC_EXECUTION
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# elif DYNAMIC_EXECUTION
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# include "dyn32_defs.h"
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# include "dyn32_defs.h"
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# else
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# else
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extern void l_none (void);
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extern void l_none (void);
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# endif
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# endif
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#else
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#else
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extern void l_none (void);
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extern void l_none (void);
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#endif
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#endif
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struct or32_letter
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struct or32_letter
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{
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{
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char letter;
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char letter;
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int sign;
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int sign;
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/* int reloc; relocation per letter ?? */
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/* int reloc; relocation per letter ?? */
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};
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};
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enum insn_type {
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enum insn_type {
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it_unknown,
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it_unknown,
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it_exception,
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it_exception,
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it_arith,
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it_arith,
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it_shift,
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it_shift,
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it_compare,
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it_compare,
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it_branch,
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it_branch,
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it_jump,
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it_jump,
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it_load,
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it_load,
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it_store,
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it_store,
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it_movimm,
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it_movimm,
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it_move,
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it_move,
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it_extend,
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it_extend,
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it_nop,
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it_nop,
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it_mac,
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it_mac,
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it_float };
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it_float };
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/* Main instruction specification array. */
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/* Main instruction specification array. */
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struct or32_opcode
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struct or32_opcode
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{
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{
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/* Name of the instruction. */
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/* Name of the instruction. */
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char *name;
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char *name;
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/* A string of characters which describe the operands.
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/* A string of characters which describe the operands.
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Valid characters are:
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Valid characters are:
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,() Itself. Characters appears in the assembly code.
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,() Itself. Characters appears in the assembly code.
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rA Register operand.
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rA Register operand.
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rB Register operand.
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rB Register operand.
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rD Register operand.
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rD Register operand.
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I An immediate operand, range -32768 to 32767.
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I An immediate operand, range -32768 to 32767.
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J An immediate operand, range . (unused)
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J An immediate operand, range . (unused)
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K An immediate operand, range 0 to 65535.
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K An immediate operand, range 0 to 65535.
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L An immediate operand, range 0 to 63.
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L An immediate operand, range 0 to 63.
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M An immediate operand, range . (unused)
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M An immediate operand, range . (unused)
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N An immediate operand, range -33554432 to 33554431.
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N An immediate operand, range -33554432 to 33554431.
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O An immediate operand, range . (unused). */
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O An immediate operand, range . (unused). */
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char *args;
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char *args;
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/* Opcode and operand encoding. */
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/* Opcode and operand encoding. */
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char *encoding;
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char *encoding;
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#ifdef HAS_EXECUTION
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#ifdef HAS_EXECUTION
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# if COMPLEX_EXECUTION
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# if COMPLEX_EXECUTION
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char *function_name;
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char *function_name;
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# elif SIMPLE_EXECUTION
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# elif SIMPLE_EXECUTION
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void (*exec)(struct iqueue_entry *);
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void (*exec)(struct iqueue_entry *);
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# else /* DYNAMIC_EXECUTION */
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# else /* DYNAMIC_EXECUTION */
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void (*exec)(struct op_queue *opq, int param_t[3], orreg_t param[3], int);
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void (*exec)(struct op_queue *opq, int param_t[3], orreg_t param[3], int);
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# endif
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# endif
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#else /* HAS_EXECUTION */
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#else /* HAS_EXECUTION */
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void (*exec)(void);
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void (*exec)(void);
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#endif
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#endif
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unsigned int flags;
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unsigned int flags;
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enum insn_type func_unit;
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enum insn_type func_unit;
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};
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};
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#define OPTYPE_LAST (0x80000000)
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#define OPTYPE_LAST (0x80000000)
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#define OPTYPE_OP (0x40000000)
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#define OPTYPE_OP (0x40000000)
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#define OPTYPE_REG (0x20000000)
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#define OPTYPE_REG (0x20000000)
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#define OPTYPE_SIG (0x10000000)
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#define OPTYPE_SIG (0x10000000)
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#define OPTYPE_DIS (0x08000000)
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#define OPTYPE_DIS (0x08000000)
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#define OPTYPE_DST (0x04000000)
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#define OPTYPE_DST (0x04000000)
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#define OPTYPE_SBIT (0x00001F00)
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#define OPTYPE_SBIT (0x00001F00)
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#define OPTYPE_SHR (0x0000001F)
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#define OPTYPE_SHR (0x0000001F)
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#define OPTYPE_SBIT_SHR (8)
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#define OPTYPE_SBIT_SHR (8)
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/* MM: Data how to decode operands. */
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/* MM: Data how to decode operands. */
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extern struct insn_op_struct
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extern struct insn_op_struct
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{
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{
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unsigned long type;
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unsigned long type;
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unsigned long data;
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unsigned long data;
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} **op_start;
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} **op_start;
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/* Leaf flag used in automata building */
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/* Leaf flag used in automata building */
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#define LEAF_FLAG (0x80000000)
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#define LEAF_FLAG (0x80000000)
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struct temp_insn_struct
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struct temp_insn_struct
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{
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{
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unsigned long insn;
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unsigned long insn;
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unsigned long insn_mask;
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unsigned long insn_mask;
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int in_pass;
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int in_pass;
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};
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};
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extern unsigned long *automata;
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extern unsigned long *automata;
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extern struct temp_insn_struct *ti;
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extern struct temp_insn_struct *ti;
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extern const struct or32_letter or32_letters[];
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extern const struct or32_letter or32_letters[];
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extern const struct or32_opcode or32_opcodes[];
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extern const struct or32_opcode or32_opcodes[];
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extern const unsigned int or32_num_opcodes;
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extern const unsigned int or32_num_opcodes;
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/* Calculates instruction length in bytes. Always 4 for OR32. */
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/* Calculates instruction length in bytes. Always 4 for OR32. */
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extern int insn_len (int);
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extern int insn_len (int);
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/* Is individual insn's operand signed or unsigned? */
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/* Is individual insn's operand signed or unsigned? */
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extern int letter_signed (char);
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extern int letter_signed (char);
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/* Number of letters in the individual lettered operand. */
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/* Number of letters in the individual lettered operand. */
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extern int letter_range (char);
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extern int letter_range (char);
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/* MM: Returns index of given instruction name. */
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/* MM: Returns index of given instruction name. */
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extern int insn_index (char *);
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extern int insn_index (char *);
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/* MM: Returns instruction name from index. */
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/* MM: Returns instruction name from index. */
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extern const char *insn_name (int);
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extern const char *insn_name (int);
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/* MM: Constructs new FSM, based on or32_opcodes. */
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/* MM: Constructs new FSM, based on or32_opcodes. */
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extern void build_automata (void);
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extern void build_automata (void);
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/* MM: Destructs FSM. */
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/* MM: Destructs FSM. */
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extern void destruct_automata (void);
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extern void destruct_automata (void);
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/* MM: Decodes instruction using FSM. Call build_automata first. */
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/* MM: Decodes instruction using FSM. Call build_automata first. */
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extern int insn_decode (unsigned int);
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extern int insn_decode (unsigned int);
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/* Disassemble one instruction from insn to disassemble.
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/* Disassemble one instruction from insn to disassemble.
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Return the size of the instruction. */
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Return the size of the instruction. */
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int disassemble_insn (unsigned long);
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int disassemble_insn (unsigned long);
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/* Extract instruction */
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/* Extract instruction */
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extern unsigned long insn_extract(char,char*);
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extern unsigned long insn_extract(char,char*);
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/* Disassemble one instruction from insn index.
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/* Disassemble one instruction from insn index.
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Return the size of the instruction. */
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Return the size of the instruction. */
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int disassemble_index (unsigned long,int);
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int disassemble_index (unsigned long,int);
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/* FOR INTERNAL USE ONLY */
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/* FOR INTERNAL USE ONLY */
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/* Automatically does zero- or sign- extension and also finds correct
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/* Automatically does zero- or sign- extension and also finds correct
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sign bit position if sign extension is correct extension. Which extension
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sign bit position if sign extension is correct extension. Which extension
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is proper is figured out from letter description. */
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is proper is figured out from letter description. */
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unsigned long extend_imm(unsigned long,char);
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unsigned long extend_imm(unsigned long,char);
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#endif
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#endif
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