OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [binutils-2.20.1/] [ld/] [scripttempl/] [elf32xc16xl.sc] - Diff between revs 816 and 818

Go to most recent revision | Only display areas with differences | Details | Blame | View Log

Rev 816 Rev 818
cat <
cat <
OUTPUT_FORMAT("${OUTPUT_FORMAT}")
OUTPUT_FORMAT("${OUTPUT_FORMAT}")
OUTPUT_ARCH(${ARCH})
OUTPUT_ARCH(${ARCH})
${RELOCATING+ENTRY ("_start")}
${RELOCATING+ENTRY ("_start")}
MEMORY
MEMORY
{
{
        vectarea : o =0xc00000, l = 0x0300
        vectarea : o =0xc00000, l = 0x0300
        introm    : o = 0xc00300, l = 0x16000
        introm    : o = 0xc00300, l = 0x16000
        /* The stack starts at the top of main ram.  */
        /* The stack starts at the top of main ram.  */
        dram   : o = 0x8000 , l = 0xffff
        dram   : o = 0x8000 , l = 0xffff
        /* At the very top of the address space is the 8-bit area.  */
        /* At the very top of the address space is the 8-bit area.  */
         ldata  : o =0x4000 ,l = 0x0200
         ldata  : o =0x4000 ,l = 0x0200
}
}
SECTIONS
SECTIONS
{
{
/*.vects :
/*.vects :
        {
        {
        *(.vects)
        *(.vects)
       } ${RELOCATING+ > vectarea} */
       } ${RELOCATING+ > vectarea} */
.init :
.init :
        {
        {
          *(.init)
          *(.init)
        } ${RELOCATING+ >introm}
        } ${RELOCATING+ >introm}
.text :
.text :
        {
        {
          *(.rodata)
          *(.rodata)
          *(.text.*)
          *(.text.*)
          *(.text)
          *(.text)
                  ${RELOCATING+ _etext = . ; }
                  ${RELOCATING+ _etext = . ; }
        } ${RELOCATING+ > introm}
        } ${RELOCATING+ > introm}
.data :
.data :
        {
        {
          *(.data)
          *(.data)
          *(.data.*)
          *(.data.*)
          ${RELOCATING+ _edata = . ; }
          ${RELOCATING+ _edata = . ; }
        } ${RELOCATING+ > dram}
        } ${RELOCATING+ > dram}
.bss :
.bss :
        {
        {
          ${RELOCATING+ _bss_start = . ;}
          ${RELOCATING+ _bss_start = . ;}
          *(.bss)
          *(.bss)
          *(COMMON)
          *(COMMON)
          ${RELOCATING+ _end = . ;  }
          ${RELOCATING+ _end = . ;  }
        } ${RELOCATING+ > dram}
        } ${RELOCATING+ > dram}
 .ldata :
 .ldata :
         {
         {
          *(.ldata)
          *(.ldata)
         } ${RELOCATING+ > ldata}
         } ${RELOCATING+ > ldata}
  .vects :
  .vects :
          {
          {
          *(.vects)
          *(.vects)
       } ${RELOCATING+ > vectarea}
       } ${RELOCATING+ > vectarea}
}
}
EOF
EOF
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.