OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [binutils-2.20.1/] [ld/] [testsuite/] [ld-cris/] [libdso-10.d] - Diff between revs 816 and 818

Only display areas with differences | Details | Blame | View Log

Rev 816 Rev 818
#source: dso-1.s
#source: dso-1.s
#as: --pic --no-underscore --march=v32 --em=criself
#as: --pic --no-underscore --march=v32 --em=criself
#ld: --shared -m crislinux
#ld: --shared -m crislinux
#objdump: -p -h
#objdump: -p -h
# Sanity check; just an empty GOT.
# Sanity check; just an empty GOT.
.*:     file format elf32-cris
.*:     file format elf32-cris
Program Header:
Program Header:
    LOAD off    0x0+ vaddr 0x0+ paddr 0x0+ align 2\*\*13
    LOAD off    0x0+ vaddr 0x0+ paddr 0x0+ align 2\*\*13
         filesz 0x0+144 memsz 0x0+144 flags r-x
         filesz 0x0+144 memsz 0x0+144 flags r-x
    LOAD off    0x0+144 vaddr 0x0+2144 paddr 0x0+2144 align 2\*\*13
    LOAD off    0x0+144 vaddr 0x0+2144 paddr 0x0+2144 align 2\*\*13
         filesz 0x0+64 memsz 0x0+64 flags rw-
         filesz 0x0+64 memsz 0x0+64 flags rw-
 DYNAMIC off    0x0+144 vaddr 0x0+2144 paddr 0x0+2144 align 2\*\*2
 DYNAMIC off    0x0+144 vaddr 0x0+2144 paddr 0x0+2144 align 2\*\*2
         filesz 0x0+58 memsz 0x0+58 flags rw-
         filesz 0x0+58 memsz 0x0+58 flags rw-
Dynamic Section:
Dynamic Section:
  HASH.*0x0*94
  HASH.*0x0*94
  STRTAB.*0x0*120
  STRTAB.*0x0*120
  SYMTAB.*0x0*c0
  SYMTAB.*0x0*c0
  STRSZ.*0x0*1f
  STRSZ.*0x0*1f
  SYMENT.*0x0*10
  SYMENT.*0x0*10
private flags = 2: \[v32\]
private flags = 2: \[v32\]
Sections:
Sections:
Idx Name          Size      VMA       LMA       File off  Algn
Idx Name          Size      VMA       LMA       File off  Algn
  0 \.hash         0+2c  0+94  0+94  0+94  2\*\*2
  0 \.hash         0+2c  0+94  0+94  0+94  2\*\*2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  1 \.dynsym       0+60  0+c0  0+c0  0+c0  2\*\*2
  1 \.dynsym       0+60  0+c0  0+c0  0+c0  2\*\*2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  2 \.dynstr       0+1f  0+120  0+120  0+120  2\*\*0
  2 \.dynstr       0+1f  0+120  0+120  0+120  2\*\*0
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  3 \.text         0+4  0+140  0+140  0+140  2\*\*1
  3 \.text         0+4  0+140  0+140  0+140  2\*\*1
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  4 \.dynamic      0+58  0+2144  0+2144  0+144  2\*\*2
  4 \.dynamic      0+58  0+2144  0+2144  0+144  2\*\*2
                  CONTENTS, ALLOC, LOAD, DATA
                  CONTENTS, ALLOC, LOAD, DATA
  5 \.got          0+c  0+219c  0+219c  0+19c  2\*\*2
  5 \.got          0+c  0+219c  0+219c  0+19c  2\*\*2
                  CONTENTS, ALLOC, LOAD, DATA
                  CONTENTS, ALLOC, LOAD, DATA
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.