/* Instruction opcode header for lm32.
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/* Instruction opcode header for lm32.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright 1996-2009 Free Software Foundation, Inc.
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Copyright 1996-2009 Free Software Foundation, Inc.
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This file is part of the GNU Binutils and/or GDB, the GNU debugger.
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This file is part of the GNU Binutils and/or GDB, the GNU debugger.
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This file is free software; you can redistribute it and/or modify
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This file is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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License for more details.
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You should have received a copy of the GNU General Public License along
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You should have received a copy of the GNU General Public License along
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with this program; if not, write to the Free Software Foundation, Inc.,
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with this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
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51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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*/
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#ifndef LM32_OPC_H
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#ifndef LM32_OPC_H
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#define LM32_OPC_H
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#define LM32_OPC_H
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/* -- opc.h */
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/* -- opc.h */
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/* Allows reason codes to be output when assembler errors occur. */
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/* Allows reason codes to be output when assembler errors occur. */
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#define CGEN_VERBOSE_ASSEMBLER_ERRORS
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#define CGEN_VERBOSE_ASSEMBLER_ERRORS
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#define CGEN_DIS_HASH_SIZE 64
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#define CGEN_DIS_HASH_SIZE 64
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#define CGEN_DIS_HASH(buf,value) ((value >> 26) & 0x3f)
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#define CGEN_DIS_HASH(buf,value) ((value >> 26) & 0x3f)
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/* -- asm.c */
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/* -- asm.c */
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/* Enum declaration for lm32 instruction types. */
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/* Enum declaration for lm32 instruction types. */
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typedef enum cgen_insn_type {
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typedef enum cgen_insn_type {
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LM32_INSN_INVALID, LM32_INSN_ADD, LM32_INSN_ADDI, LM32_INSN_AND
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LM32_INSN_INVALID, LM32_INSN_ADD, LM32_INSN_ADDI, LM32_INSN_AND
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, LM32_INSN_ANDI, LM32_INSN_ANDHII, LM32_INSN_B, LM32_INSN_BI
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, LM32_INSN_ANDI, LM32_INSN_ANDHII, LM32_INSN_B, LM32_INSN_BI
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, LM32_INSN_BE, LM32_INSN_BG, LM32_INSN_BGE, LM32_INSN_BGEU
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, LM32_INSN_BE, LM32_INSN_BG, LM32_INSN_BGE, LM32_INSN_BGEU
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, LM32_INSN_BGU, LM32_INSN_BNE, LM32_INSN_CALL, LM32_INSN_CALLI
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, LM32_INSN_BGU, LM32_INSN_BNE, LM32_INSN_CALL, LM32_INSN_CALLI
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, LM32_INSN_CMPE, LM32_INSN_CMPEI, LM32_INSN_CMPG, LM32_INSN_CMPGI
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, LM32_INSN_CMPE, LM32_INSN_CMPEI, LM32_INSN_CMPG, LM32_INSN_CMPGI
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, LM32_INSN_CMPGE, LM32_INSN_CMPGEI, LM32_INSN_CMPGEU, LM32_INSN_CMPGEUI
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, LM32_INSN_CMPGE, LM32_INSN_CMPGEI, LM32_INSN_CMPGEU, LM32_INSN_CMPGEUI
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, LM32_INSN_CMPGU, LM32_INSN_CMPGUI, LM32_INSN_CMPNE, LM32_INSN_CMPNEI
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, LM32_INSN_CMPGU, LM32_INSN_CMPGUI, LM32_INSN_CMPNE, LM32_INSN_CMPNEI
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, LM32_INSN_DIVU, LM32_INSN_LB, LM32_INSN_LBU, LM32_INSN_LH
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, LM32_INSN_DIVU, LM32_INSN_LB, LM32_INSN_LBU, LM32_INSN_LH
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, LM32_INSN_LHU, LM32_INSN_LW, LM32_INSN_MODU, LM32_INSN_MUL
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, LM32_INSN_LHU, LM32_INSN_LW, LM32_INSN_MODU, LM32_INSN_MUL
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, LM32_INSN_MULI, LM32_INSN_NOR, LM32_INSN_NORI, LM32_INSN_OR
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, LM32_INSN_MULI, LM32_INSN_NOR, LM32_INSN_NORI, LM32_INSN_OR
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, LM32_INSN_ORI, LM32_INSN_ORHII, LM32_INSN_RCSR, LM32_INSN_SB
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, LM32_INSN_ORI, LM32_INSN_ORHII, LM32_INSN_RCSR, LM32_INSN_SB
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, LM32_INSN_SEXTB, LM32_INSN_SEXTH, LM32_INSN_SH, LM32_INSN_SL
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, LM32_INSN_SEXTB, LM32_INSN_SEXTH, LM32_INSN_SH, LM32_INSN_SL
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, LM32_INSN_SLI, LM32_INSN_SR, LM32_INSN_SRI, LM32_INSN_SRU
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, LM32_INSN_SLI, LM32_INSN_SR, LM32_INSN_SRI, LM32_INSN_SRU
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, LM32_INSN_SRUI, LM32_INSN_SUB, LM32_INSN_SW, LM32_INSN_USER
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, LM32_INSN_SRUI, LM32_INSN_SUB, LM32_INSN_SW, LM32_INSN_USER
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, LM32_INSN_WCSR, LM32_INSN_XOR, LM32_INSN_XORI, LM32_INSN_XNOR
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, LM32_INSN_WCSR, LM32_INSN_XOR, LM32_INSN_XORI, LM32_INSN_XNOR
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, LM32_INSN_XNORI, LM32_INSN_BREAK, LM32_INSN_SCALL, LM32_INSN_BRET
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, LM32_INSN_XNORI, LM32_INSN_BREAK, LM32_INSN_SCALL, LM32_INSN_BRET
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, LM32_INSN_ERET, LM32_INSN_RET, LM32_INSN_MV, LM32_INSN_MVI
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, LM32_INSN_ERET, LM32_INSN_RET, LM32_INSN_MV, LM32_INSN_MVI
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, LM32_INSN_MVUI, LM32_INSN_MVHI, LM32_INSN_MVA, LM32_INSN_NOT
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, LM32_INSN_MVUI, LM32_INSN_MVHI, LM32_INSN_MVA, LM32_INSN_NOT
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, LM32_INSN_NOP, LM32_INSN_LBGPREL, LM32_INSN_LBUGPREL, LM32_INSN_LHGPREL
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, LM32_INSN_NOP, LM32_INSN_LBGPREL, LM32_INSN_LBUGPREL, LM32_INSN_LHGPREL
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, LM32_INSN_LHUGPREL, LM32_INSN_LWGPREL, LM32_INSN_SBGPREL, LM32_INSN_SHGPREL
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, LM32_INSN_LHUGPREL, LM32_INSN_LWGPREL, LM32_INSN_SBGPREL, LM32_INSN_SHGPREL
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, LM32_INSN_SWGPREL, LM32_INSN_LWGOTREL, LM32_INSN_ORHIGOTOFFI, LM32_INSN_ADDGOTOFF
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, LM32_INSN_SWGPREL, LM32_INSN_LWGOTREL, LM32_INSN_ORHIGOTOFFI, LM32_INSN_ADDGOTOFF
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, LM32_INSN_SWGOTOFF, LM32_INSN_LWGOTOFF, LM32_INSN_SHGOTOFF, LM32_INSN_LHGOTOFF
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, LM32_INSN_SWGOTOFF, LM32_INSN_LWGOTOFF, LM32_INSN_SHGOTOFF, LM32_INSN_LHGOTOFF
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, LM32_INSN_LHUGOTOFF, LM32_INSN_SBGOTOFF, LM32_INSN_LBGOTOFF, LM32_INSN_LBUGOTOFF
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, LM32_INSN_LHUGOTOFF, LM32_INSN_SBGOTOFF, LM32_INSN_LBGOTOFF, LM32_INSN_LBUGOTOFF
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} CGEN_INSN_TYPE;
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} CGEN_INSN_TYPE;
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/* Index of `invalid' insn place holder. */
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/* Index of `invalid' insn place holder. */
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#define CGEN_INSN_INVALID LM32_INSN_INVALID
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#define CGEN_INSN_INVALID LM32_INSN_INVALID
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/* Total number of insns in table. */
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/* Total number of insns in table. */
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#define MAX_INSNS ((int) LM32_INSN_LBUGOTOFF + 1)
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#define MAX_INSNS ((int) LM32_INSN_LBUGOTOFF + 1)
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/* This struct records data prior to insertion or after extraction. */
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/* This struct records data prior to insertion or after extraction. */
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struct cgen_fields
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struct cgen_fields
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{
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{
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int length;
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int length;
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long f_nil;
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long f_nil;
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long f_anyof;
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long f_anyof;
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long f_opcode;
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long f_opcode;
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long f_r0;
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long f_r0;
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long f_r1;
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long f_r1;
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long f_r2;
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long f_r2;
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long f_resv0;
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long f_resv0;
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long f_shift;
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long f_shift;
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long f_imm;
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long f_imm;
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long f_uimm;
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long f_uimm;
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long f_csr;
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long f_csr;
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long f_user;
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long f_user;
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long f_exception;
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long f_exception;
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long f_branch;
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long f_branch;
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long f_call;
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long f_call;
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};
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};
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#define CGEN_INIT_PARSE(od) \
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#define CGEN_INIT_PARSE(od) \
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{\
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{\
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}
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}
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#define CGEN_INIT_INSERT(od) \
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#define CGEN_INIT_INSERT(od) \
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{\
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{\
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}
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}
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#define CGEN_INIT_EXTRACT(od) \
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#define CGEN_INIT_EXTRACT(od) \
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{\
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{\
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}
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}
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#define CGEN_INIT_PRINT(od) \
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#define CGEN_INIT_PRINT(od) \
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{\
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{\
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}
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}
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#endif /* LM32_OPC_H */
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#endif /* LM32_OPC_H */
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