/* Disassemble SH64 instructions.
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/* Disassemble SH64 instructions.
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Copyright 2000, 2001, 2002, 2003, 2005, 2007 Free Software Foundation, Inc.
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Copyright 2000, 2001, 2002, 2003, 2005, 2007 Free Software Foundation, Inc.
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This file is part of the GNU opcodes library.
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This file is part of the GNU opcodes library.
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This library is free software; you can redistribute it and/or modify
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This library is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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License for more details.
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with this file; see the file COPYING. If not, write to the
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along with this file; see the file COPYING. If not, write to the
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Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
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Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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MA 02110-1301, USA. */
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#include <stdio.h>
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#include <stdio.h>
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#include "dis-asm.h"
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#include "dis-asm.h"
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#include "sysdep.h"
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#include "sysdep.h"
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#include "sh64-opc.h"
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#include "sh64-opc.h"
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#include "libiberty.h"
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#include "libiberty.h"
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/* We need to refer to the ELF header structure. */
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/* We need to refer to the ELF header structure. */
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#include "elf-bfd.h"
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#include "elf-bfd.h"
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#include "elf/sh.h"
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#include "elf/sh.h"
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#include "elf32-sh64.h"
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#include "elf32-sh64.h"
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#define ELF_MODE32_CODE_LABEL_P(SYM) \
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#define ELF_MODE32_CODE_LABEL_P(SYM) \
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(((elf_symbol_type *) (SYM))->internal_elf_sym.st_other & STO_SH5_ISA32)
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(((elf_symbol_type *) (SYM))->internal_elf_sym.st_other & STO_SH5_ISA32)
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#define SAVED_MOVI_R(INFO) \
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#define SAVED_MOVI_R(INFO) \
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(((struct sh64_disassemble_info *) ((INFO)->private_data))->address_reg)
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(((struct sh64_disassemble_info *) ((INFO)->private_data))->address_reg)
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#define SAVED_MOVI_IMM(INFO) \
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#define SAVED_MOVI_IMM(INFO) \
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(((struct sh64_disassemble_info *) ((INFO)->private_data))->built_address)
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(((struct sh64_disassemble_info *) ((INFO)->private_data))->built_address)
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struct sh64_disassemble_info
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struct sh64_disassemble_info
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{
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{
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/* When we see a MOVI, we save the register and the value, and merge a
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/* When we see a MOVI, we save the register and the value, and merge a
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subsequent SHORI and display the address, if there is one. */
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subsequent SHORI and display the address, if there is one. */
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unsigned int address_reg;
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unsigned int address_reg;
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bfd_signed_vma built_address;
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bfd_signed_vma built_address;
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/* This is the range decriptor for the current address. It is kept
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/* This is the range decriptor for the current address. It is kept
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around for the next call. */
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around for the next call. */
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sh64_elf_crange crange;
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sh64_elf_crange crange;
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};
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};
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/* Each item in the table is a mask to indicate which bits to be set
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/* Each item in the table is a mask to indicate which bits to be set
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to determine an instruction's operator.
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to determine an instruction's operator.
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The index is as same as the instruction in the opcode table.
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The index is as same as the instruction in the opcode table.
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Note that some archs have this as a field in the opcode table. */
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Note that some archs have this as a field in the opcode table. */
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static unsigned long *shmedia_opcode_mask_table;
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static unsigned long *shmedia_opcode_mask_table;
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|
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/* Initialize the SH64 opcode mask table for each instruction in SHmedia
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/* Initialize the SH64 opcode mask table for each instruction in SHmedia
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mode. */
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mode. */
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static void
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static void
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initialize_shmedia_opcode_mask_table (void)
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initialize_shmedia_opcode_mask_table (void)
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{
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{
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int n_opc;
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int n_opc;
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int n;
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int n;
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/* Calculate number of opcodes. */
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/* Calculate number of opcodes. */
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for (n_opc = 0; shmedia_table[n_opc].name != NULL; n_opc++)
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for (n_opc = 0; shmedia_table[n_opc].name != NULL; n_opc++)
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;
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;
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shmedia_opcode_mask_table
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shmedia_opcode_mask_table
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= xmalloc (sizeof (shmedia_opcode_mask_table[0]) * n_opc);
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= xmalloc (sizeof (shmedia_opcode_mask_table[0]) * n_opc);
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for (n = 0; n < n_opc; n++)
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for (n = 0; n < n_opc; n++)
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{
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{
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int i;
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int i;
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unsigned long mask = 0;
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unsigned long mask = 0;
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for (i = 0; shmedia_table[n].arg[i] != A_NONE; i++)
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for (i = 0; shmedia_table[n].arg[i] != A_NONE; i++)
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{
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{
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int offset = shmedia_table[n].nibbles[i];
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int offset = shmedia_table[n].nibbles[i];
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int length;
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int length;
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switch (shmedia_table[n].arg[i])
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switch (shmedia_table[n].arg[i])
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{
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{
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case A_GREG_M:
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case A_GREG_M:
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case A_GREG_N:
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case A_GREG_N:
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case A_GREG_D:
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case A_GREG_D:
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case A_CREG_K:
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case A_CREG_K:
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case A_CREG_J:
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case A_CREG_J:
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case A_FREG_G:
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case A_FREG_G:
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case A_FREG_H:
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case A_FREG_H:
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case A_FREG_F:
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case A_FREG_F:
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case A_DREG_G:
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case A_DREG_G:
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case A_DREG_H:
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case A_DREG_H:
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case A_DREG_F:
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case A_DREG_F:
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case A_FMREG_G:
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case A_FMREG_G:
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case A_FMREG_H:
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case A_FMREG_H:
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case A_FMREG_F:
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case A_FMREG_F:
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case A_FPREG_G:
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case A_FPREG_G:
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case A_FPREG_H:
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case A_FPREG_H:
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case A_FPREG_F:
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case A_FPREG_F:
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case A_FVREG_G:
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case A_FVREG_G:
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case A_FVREG_H:
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case A_FVREG_H:
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case A_FVREG_F:
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case A_FVREG_F:
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case A_REUSE_PREV:
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case A_REUSE_PREV:
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length = 6;
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length = 6;
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break;
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break;
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case A_TREG_A:
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case A_TREG_A:
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case A_TREG_B:
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case A_TREG_B:
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length = 3;
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length = 3;
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break;
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break;
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case A_IMMM:
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case A_IMMM:
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abort ();
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abort ();
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break;
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break;
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case A_IMMU5:
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case A_IMMU5:
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length = 5;
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length = 5;
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break;
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break;
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case A_IMMS6:
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case A_IMMS6:
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case A_IMMU6:
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case A_IMMU6:
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case A_IMMS6BY32:
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case A_IMMS6BY32:
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length = 6;
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length = 6;
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break;
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break;
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case A_IMMS10:
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case A_IMMS10:
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case A_IMMS10BY1:
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case A_IMMS10BY1:
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case A_IMMS10BY2:
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case A_IMMS10BY2:
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case A_IMMS10BY4:
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case A_IMMS10BY4:
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case A_IMMS10BY8:
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case A_IMMS10BY8:
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length = 10;
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length = 10;
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break;
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break;
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case A_IMMU16:
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case A_IMMU16:
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case A_IMMS16:
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case A_IMMS16:
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case A_PCIMMS16BY4:
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case A_PCIMMS16BY4:
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case A_PCIMMS16BY4_PT:
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case A_PCIMMS16BY4_PT:
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length = 16;
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length = 16;
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break;
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break;
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default:
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default:
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abort ();
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abort ();
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length = 0;
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length = 0;
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break;
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break;
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}
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}
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if (length != 0)
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if (length != 0)
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mask |= (0xffffffff >> (32 - length)) << offset;
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mask |= (0xffffffff >> (32 - length)) << offset;
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}
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}
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shmedia_opcode_mask_table[n] = 0xffffffff & ~mask;
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shmedia_opcode_mask_table[n] = 0xffffffff & ~mask;
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}
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}
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}
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}
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/* Get a predefined control-register-name, or return NULL. */
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/* Get a predefined control-register-name, or return NULL. */
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static const char *
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static const char *
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creg_name (int cregno)
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creg_name (int cregno)
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{
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{
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const shmedia_creg_info *cregp;
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const shmedia_creg_info *cregp;
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/* If control register usage is common enough, change this to search a
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/* If control register usage is common enough, change this to search a
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hash-table. */
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hash-table. */
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for (cregp = shmedia_creg_table; cregp->name != NULL; cregp++)
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for (cregp = shmedia_creg_table; cregp->name != NULL; cregp++)
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if (cregp->cregno == cregno)
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if (cregp->cregno == cregno)
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return cregp->name;
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return cregp->name;
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return NULL;
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return NULL;
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}
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}
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/* Main function to disassemble SHmedia instructions. */
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/* Main function to disassemble SHmedia instructions. */
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static int
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static int
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print_insn_shmedia (bfd_vma memaddr, struct disassemble_info *info)
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print_insn_shmedia (bfd_vma memaddr, struct disassemble_info *info)
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{
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{
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fprintf_ftype fprintf_fn = info->fprintf_func;
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fprintf_ftype fprintf_fn = info->fprintf_func;
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void *stream = info->stream;
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void *stream = info->stream;
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unsigned char insn[4];
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unsigned char insn[4];
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unsigned long instruction;
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unsigned long instruction;
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int status;
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int status;
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int n;
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int n;
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const shmedia_opcode_info *op;
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const shmedia_opcode_info *op;
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int i;
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int i;
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unsigned int r = 0;
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unsigned int r = 0;
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long imm = 0;
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long imm = 0;
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bfd_vma disp_pc_addr;
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bfd_vma disp_pc_addr;
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status = info->read_memory_func (memaddr, insn, 4, info);
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status = info->read_memory_func (memaddr, insn, 4, info);
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/* If we can't read four bytes, something is wrong. Display any data we
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/* If we can't read four bytes, something is wrong. Display any data we
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can get as .byte:s. */
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can get as .byte:s. */
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if (status != 0)
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if (status != 0)
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{
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{
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int i;
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int i;
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for (i = 0; i < 3; i++)
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for (i = 0; i < 3; i++)
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{
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{
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status = info->read_memory_func (memaddr + i, insn, 1, info);
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status = info->read_memory_func (memaddr + i, insn, 1, info);
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if (status != 0)
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if (status != 0)
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break;
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break;
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(*fprintf_fn) (stream, "%s0x%02x",
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(*fprintf_fn) (stream, "%s0x%02x",
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i == 0 ? ".byte " : ", ",
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i == 0 ? ".byte " : ", ",
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insn[0]);
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insn[0]);
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}
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}
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return i ? i : -1;
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return i ? i : -1;
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}
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}
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/* Rearrange the bytes to make up an instruction. */
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/* Rearrange the bytes to make up an instruction. */
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if (info->endian == BFD_ENDIAN_LITTLE)
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if (info->endian == BFD_ENDIAN_LITTLE)
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instruction = bfd_getl32 (insn);
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instruction = bfd_getl32 (insn);
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else
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else
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instruction = bfd_getb32 (insn);
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instruction = bfd_getb32 (insn);
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/* FIXME: Searching could be implemented using a hash on relevant
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/* FIXME: Searching could be implemented using a hash on relevant
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fields. */
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fields. */
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for (n = 0, op = shmedia_table;
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for (n = 0, op = shmedia_table;
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op->name != NULL
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op->name != NULL
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&& ((instruction & shmedia_opcode_mask_table[n]) != op->opcode_base);
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&& ((instruction & shmedia_opcode_mask_table[n]) != op->opcode_base);
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n++, op++)
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n++, op++)
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;
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;
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/* FIXME: We should also check register number constraints. */
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/* FIXME: We should also check register number constraints. */
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if (op->name == NULL)
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if (op->name == NULL)
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{
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{
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fprintf_fn (stream, ".long 0x%08lx", instruction);
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fprintf_fn (stream, ".long 0x%08lx", instruction);
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return 4;
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return 4;
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}
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}
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fprintf_fn (stream, "%s\t", op->name);
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fprintf_fn (stream, "%s\t", op->name);
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for (i = 0; i < 3 && op->arg[i] != A_NONE; i++)
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for (i = 0; i < 3 && op->arg[i] != A_NONE; i++)
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{
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{
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unsigned long temp = instruction >> op->nibbles[i];
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unsigned long temp = instruction >> op->nibbles[i];
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int by_number = 0;
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int by_number = 0;
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if (i > 0 && op->arg[i] != A_REUSE_PREV)
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if (i > 0 && op->arg[i] != A_REUSE_PREV)
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fprintf_fn (stream, ",");
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fprintf_fn (stream, ",");
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|
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switch (op->arg[i])
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switch (op->arg[i])
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{
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{
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case A_REUSE_PREV:
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case A_REUSE_PREV:
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continue;
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continue;
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|
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case A_GREG_M:
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case A_GREG_M:
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case A_GREG_N:
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case A_GREG_N:
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case A_GREG_D:
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case A_GREG_D:
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r = temp & 0x3f;
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r = temp & 0x3f;
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fprintf_fn (stream, "r%d", r);
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fprintf_fn (stream, "r%d", r);
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break;
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break;
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case A_FVREG_F:
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case A_FVREG_F:
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case A_FVREG_G:
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case A_FVREG_G:
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case A_FVREG_H:
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case A_FVREG_H:
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r = temp & 0x3f;
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r = temp & 0x3f;
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fprintf_fn (stream, "fv%d", r);
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fprintf_fn (stream, "fv%d", r);
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break;
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break;
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case A_FPREG_F:
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case A_FPREG_F:
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case A_FPREG_G:
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case A_FPREG_G:
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case A_FPREG_H:
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case A_FPREG_H:
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r = temp & 0x3f;
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r = temp & 0x3f;
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fprintf_fn (stream, "fp%d", r);
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fprintf_fn (stream, "fp%d", r);
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break;
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break;
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|
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case A_FMREG_F:
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case A_FMREG_F:
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case A_FMREG_G:
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case A_FMREG_G:
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case A_FMREG_H:
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case A_FMREG_H:
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r = temp & 0x3f;
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r = temp & 0x3f;
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fprintf_fn (stream, "mtrx%d", r);
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fprintf_fn (stream, "mtrx%d", r);
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break;
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break;
|
|
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case A_CREG_K:
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case A_CREG_K:
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case A_CREG_J:
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case A_CREG_J:
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{
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{
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const char *name;
|
const char *name;
|
|
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r = temp & 0x3f;
|
r = temp & 0x3f;
|
|
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name = creg_name (r);
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name = creg_name (r);
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|
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if (name != NULL)
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if (name != NULL)
|
fprintf_fn (stream, "%s", name);
|
fprintf_fn (stream, "%s", name);
|
else
|
else
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fprintf_fn (stream, "cr%d", r);
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fprintf_fn (stream, "cr%d", r);
|
}
|
}
|
break;
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break;
|
|
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case A_FREG_G:
|
case A_FREG_G:
|
case A_FREG_H:
|
case A_FREG_H:
|
case A_FREG_F:
|
case A_FREG_F:
|
r = temp & 0x3f;
|
r = temp & 0x3f;
|
fprintf_fn (stream, "fr%d", r);
|
fprintf_fn (stream, "fr%d", r);
|
break;
|
break;
|
|
|
case A_DREG_G:
|
case A_DREG_G:
|
case A_DREG_H:
|
case A_DREG_H:
|
case A_DREG_F:
|
case A_DREG_F:
|
r = temp & 0x3f;
|
r = temp & 0x3f;
|
fprintf_fn (stream, "dr%d", r);
|
fprintf_fn (stream, "dr%d", r);
|
break;
|
break;
|
|
|
case A_TREG_A:
|
case A_TREG_A:
|
case A_TREG_B:
|
case A_TREG_B:
|
r = temp & 0x7;
|
r = temp & 0x7;
|
fprintf_fn (stream, "tr%d", r);
|
fprintf_fn (stream, "tr%d", r);
|
break;
|
break;
|
|
|
/* A signed 6-bit number. */
|
/* A signed 6-bit number. */
|
case A_IMMS6:
|
case A_IMMS6:
|
imm = temp & 0x3f;
|
imm = temp & 0x3f;
|
if (imm & (unsigned long) 0x20)
|
if (imm & (unsigned long) 0x20)
|
imm |= ~(unsigned long) 0x3f;
|
imm |= ~(unsigned long) 0x3f;
|
fprintf_fn (stream, "%ld", imm);
|
fprintf_fn (stream, "%ld", imm);
|
break;
|
break;
|
|
|
/* A signed 6-bit number, multiplied by 32 when used. */
|
/* A signed 6-bit number, multiplied by 32 when used. */
|
case A_IMMS6BY32:
|
case A_IMMS6BY32:
|
imm = temp & 0x3f;
|
imm = temp & 0x3f;
|
if (imm & (unsigned long) 0x20)
|
if (imm & (unsigned long) 0x20)
|
imm |= ~(unsigned long) 0x3f;
|
imm |= ~(unsigned long) 0x3f;
|
fprintf_fn (stream, "%ld", imm * 32);
|
fprintf_fn (stream, "%ld", imm * 32);
|
break;
|
break;
|
|
|
/* A signed 10-bit number, multiplied by 8 when used. */
|
/* A signed 10-bit number, multiplied by 8 when used. */
|
case A_IMMS10BY8:
|
case A_IMMS10BY8:
|
by_number++;
|
by_number++;
|
/* Fall through. */
|
/* Fall through. */
|
|
|
/* A signed 10-bit number, multiplied by 4 when used. */
|
/* A signed 10-bit number, multiplied by 4 when used. */
|
case A_IMMS10BY4:
|
case A_IMMS10BY4:
|
by_number++;
|
by_number++;
|
/* Fall through. */
|
/* Fall through. */
|
|
|
/* A signed 10-bit number, multiplied by 2 when used. */
|
/* A signed 10-bit number, multiplied by 2 when used. */
|
case A_IMMS10BY2:
|
case A_IMMS10BY2:
|
by_number++;
|
by_number++;
|
/* Fall through. */
|
/* Fall through. */
|
|
|
/* A signed 10-bit number. */
|
/* A signed 10-bit number. */
|
case A_IMMS10:
|
case A_IMMS10:
|
case A_IMMS10BY1:
|
case A_IMMS10BY1:
|
imm = temp & 0x3ff;
|
imm = temp & 0x3ff;
|
if (imm & (unsigned long) 0x200)
|
if (imm & (unsigned long) 0x200)
|
imm |= ~(unsigned long) 0x3ff;
|
imm |= ~(unsigned long) 0x3ff;
|
imm <<= by_number;
|
imm <<= by_number;
|
fprintf_fn (stream, "%ld", imm);
|
fprintf_fn (stream, "%ld", imm);
|
break;
|
break;
|
|
|
/* A signed 16-bit number. */
|
/* A signed 16-bit number. */
|
case A_IMMS16:
|
case A_IMMS16:
|
imm = temp & 0xffff;
|
imm = temp & 0xffff;
|
if (imm & (unsigned long) 0x8000)
|
if (imm & (unsigned long) 0x8000)
|
imm |= ~((unsigned long) 0xffff);
|
imm |= ~((unsigned long) 0xffff);
|
fprintf_fn (stream, "%ld", imm);
|
fprintf_fn (stream, "%ld", imm);
|
break;
|
break;
|
|
|
/* A PC-relative signed 16-bit number, multiplied by 4 when
|
/* A PC-relative signed 16-bit number, multiplied by 4 when
|
used. */
|
used. */
|
case A_PCIMMS16BY4:
|
case A_PCIMMS16BY4:
|
imm = temp & 0xffff; /* 16 bits */
|
imm = temp & 0xffff; /* 16 bits */
|
if (imm & (unsigned long) 0x8000)
|
if (imm & (unsigned long) 0x8000)
|
imm |= ~(unsigned long) 0xffff;
|
imm |= ~(unsigned long) 0xffff;
|
imm <<= 2;
|
imm <<= 2;
|
disp_pc_addr = (bfd_vma) imm + memaddr;
|
disp_pc_addr = (bfd_vma) imm + memaddr;
|
(*info->print_address_func) (disp_pc_addr, info);
|
(*info->print_address_func) (disp_pc_addr, info);
|
break;
|
break;
|
|
|
/* An unsigned 5-bit number. */
|
/* An unsigned 5-bit number. */
|
case A_IMMU5:
|
case A_IMMU5:
|
imm = temp & 0x1f;
|
imm = temp & 0x1f;
|
fprintf_fn (stream, "%ld", imm);
|
fprintf_fn (stream, "%ld", imm);
|
break;
|
break;
|
|
|
/* An unsigned 6-bit number. */
|
/* An unsigned 6-bit number. */
|
case A_IMMU6:
|
case A_IMMU6:
|
imm = temp & 0x3f;
|
imm = temp & 0x3f;
|
fprintf_fn (stream, "%ld", imm);
|
fprintf_fn (stream, "%ld", imm);
|
break;
|
break;
|
|
|
/* An unsigned 16-bit number. */
|
/* An unsigned 16-bit number. */
|
case A_IMMU16:
|
case A_IMMU16:
|
imm = temp & 0xffff;
|
imm = temp & 0xffff;
|
fprintf_fn (stream, "%ld", imm);
|
fprintf_fn (stream, "%ld", imm);
|
break;
|
break;
|
|
|
default:
|
default:
|
abort ();
|
abort ();
|
break;
|
break;
|
}
|
}
|
}
|
}
|
|
|
/* FIXME: Looks like 32-bit values only are handled.
|
/* FIXME: Looks like 32-bit values only are handled.
|
FIXME: PC-relative numbers aren't handled correctly. */
|
FIXME: PC-relative numbers aren't handled correctly. */
|
if (op->opcode_base == (unsigned long) SHMEDIA_SHORI_OPC
|
if (op->opcode_base == (unsigned long) SHMEDIA_SHORI_OPC
|
&& SAVED_MOVI_R (info) == r)
|
&& SAVED_MOVI_R (info) == r)
|
{
|
{
|
asection *section = info->section;
|
asection *section = info->section;
|
|
|
/* Most callers do not set the section field correctly yet. Revert
|
/* Most callers do not set the section field correctly yet. Revert
|
to getting the section from symbols, if any. */
|
to getting the section from symbols, if any. */
|
if (section == NULL
|
if (section == NULL
|
&& info->symbols != NULL
|
&& info->symbols != NULL
|
&& bfd_asymbol_flavour (info->symbols[0]) == bfd_target_elf_flavour
|
&& bfd_asymbol_flavour (info->symbols[0]) == bfd_target_elf_flavour
|
&& ! bfd_is_und_section (bfd_get_section (info->symbols[0]))
|
&& ! bfd_is_und_section (bfd_get_section (info->symbols[0]))
|
&& ! bfd_is_abs_section (bfd_get_section (info->symbols[0])))
|
&& ! bfd_is_abs_section (bfd_get_section (info->symbols[0])))
|
section = bfd_get_section (info->symbols[0]);
|
section = bfd_get_section (info->symbols[0]);
|
|
|
/* Only guess addresses when the contents of this section is fully
|
/* Only guess addresses when the contents of this section is fully
|
relocated. Otherwise, the value will be zero or perhaps even
|
relocated. Otherwise, the value will be zero or perhaps even
|
bogus. */
|
bogus. */
|
if (section == NULL
|
if (section == NULL
|
|| section->owner == NULL
|
|| section->owner == NULL
|
|| elf_elfheader (section->owner)->e_type == ET_EXEC)
|
|| elf_elfheader (section->owner)->e_type == ET_EXEC)
|
{
|
{
|
bfd_signed_vma shori_addr;
|
bfd_signed_vma shori_addr;
|
|
|
shori_addr = SAVED_MOVI_IMM (info) << 16;
|
shori_addr = SAVED_MOVI_IMM (info) << 16;
|
shori_addr |= imm;
|
shori_addr |= imm;
|
|
|
fprintf_fn (stream, "\t! 0x");
|
fprintf_fn (stream, "\t! 0x");
|
(*info->print_address_func) (shori_addr, info);
|
(*info->print_address_func) (shori_addr, info);
|
}
|
}
|
}
|
}
|
|
|
if (op->opcode_base == SHMEDIA_MOVI_OPC)
|
if (op->opcode_base == SHMEDIA_MOVI_OPC)
|
{
|
{
|
SAVED_MOVI_IMM (info) = imm;
|
SAVED_MOVI_IMM (info) = imm;
|
SAVED_MOVI_R (info) = r;
|
SAVED_MOVI_R (info) = r;
|
}
|
}
|
else
|
else
|
{
|
{
|
SAVED_MOVI_IMM (info) = 0;
|
SAVED_MOVI_IMM (info) = 0;
|
SAVED_MOVI_R (info) = 255;
|
SAVED_MOVI_R (info) = 255;
|
}
|
}
|
|
|
return 4;
|
return 4;
|
}
|
}
|
|
|
/* Check the type of contents about to be disassembled. This is like
|
/* Check the type of contents about to be disassembled. This is like
|
sh64_get_contents_type (which may be called from here), except that it
|
sh64_get_contents_type (which may be called from here), except that it
|
takes the same arguments as print_insn_* and does what can be done if
|
takes the same arguments as print_insn_* and does what can be done if
|
no section is available. */
|
no section is available. */
|
|
|
static enum sh64_elf_cr_type
|
static enum sh64_elf_cr_type
|
sh64_get_contents_type_disasm (bfd_vma memaddr, struct disassemble_info *info)
|
sh64_get_contents_type_disasm (bfd_vma memaddr, struct disassemble_info *info)
|
{
|
{
|
struct sh64_disassemble_info *sh64_infop = info->private_data;
|
struct sh64_disassemble_info *sh64_infop = info->private_data;
|
|
|
/* Perhaps we have a region from a previous probe and it still counts
|
/* Perhaps we have a region from a previous probe and it still counts
|
for this address? */
|
for this address? */
|
if (sh64_infop->crange.cr_type != CRT_NONE
|
if (sh64_infop->crange.cr_type != CRT_NONE
|
&& memaddr >= sh64_infop->crange.cr_addr
|
&& memaddr >= sh64_infop->crange.cr_addr
|
&& memaddr < sh64_infop->crange.cr_addr + sh64_infop->crange.cr_size)
|
&& memaddr < sh64_infop->crange.cr_addr + sh64_infop->crange.cr_size)
|
return sh64_infop->crange.cr_type;
|
return sh64_infop->crange.cr_type;
|
|
|
/* If we have a section, try and use it. */
|
/* If we have a section, try and use it. */
|
if (info->section
|
if (info->section
|
&& bfd_get_flavour (info->section->owner) == bfd_target_elf_flavour)
|
&& bfd_get_flavour (info->section->owner) == bfd_target_elf_flavour)
|
{
|
{
|
enum sh64_elf_cr_type cr_type
|
enum sh64_elf_cr_type cr_type
|
= sh64_get_contents_type (info->section, memaddr,
|
= sh64_get_contents_type (info->section, memaddr,
|
&sh64_infop->crange);
|
&sh64_infop->crange);
|
|
|
if (cr_type != CRT_NONE)
|
if (cr_type != CRT_NONE)
|
return cr_type;
|
return cr_type;
|
}
|
}
|
|
|
/* If we have symbols, we can try and get at a section from *that*. */
|
/* If we have symbols, we can try and get at a section from *that*. */
|
if (info->symbols != NULL
|
if (info->symbols != NULL
|
&& bfd_asymbol_flavour (info->symbols[0]) == bfd_target_elf_flavour
|
&& bfd_asymbol_flavour (info->symbols[0]) == bfd_target_elf_flavour
|
&& ! bfd_is_und_section (bfd_get_section (info->symbols[0]))
|
&& ! bfd_is_und_section (bfd_get_section (info->symbols[0]))
|
&& ! bfd_is_abs_section (bfd_get_section (info->symbols[0])))
|
&& ! bfd_is_abs_section (bfd_get_section (info->symbols[0])))
|
{
|
{
|
enum sh64_elf_cr_type cr_type
|
enum sh64_elf_cr_type cr_type
|
= sh64_get_contents_type (bfd_get_section (info->symbols[0]),
|
= sh64_get_contents_type (bfd_get_section (info->symbols[0]),
|
memaddr, &sh64_infop->crange);
|
memaddr, &sh64_infop->crange);
|
|
|
if (cr_type != CRT_NONE)
|
if (cr_type != CRT_NONE)
|
return cr_type;
|
return cr_type;
|
}
|
}
|
|
|
/* We can make a reasonable guess based on the st_other field of a
|
/* We can make a reasonable guess based on the st_other field of a
|
symbol; for a BranchTarget this is marked as STO_SH5_ISA32 and then
|
symbol; for a BranchTarget this is marked as STO_SH5_ISA32 and then
|
it's most probably code there. */
|
it's most probably code there. */
|
if (info->symbols
|
if (info->symbols
|
&& bfd_asymbol_flavour (info->symbols[0]) == bfd_target_elf_flavour
|
&& bfd_asymbol_flavour (info->symbols[0]) == bfd_target_elf_flavour
|
&& elf_symbol_from (bfd_asymbol_bfd (info->symbols[0]),
|
&& elf_symbol_from (bfd_asymbol_bfd (info->symbols[0]),
|
info->symbols[0])->internal_elf_sym.st_other
|
info->symbols[0])->internal_elf_sym.st_other
|
== STO_SH5_ISA32)
|
== STO_SH5_ISA32)
|
return CRT_SH5_ISA32;
|
return CRT_SH5_ISA32;
|
|
|
/* If all else fails, guess this is code and guess on the low bit set. */
|
/* If all else fails, guess this is code and guess on the low bit set. */
|
return (memaddr & 1) == 1 ? CRT_SH5_ISA32 : CRT_SH5_ISA16;
|
return (memaddr & 1) == 1 ? CRT_SH5_ISA32 : CRT_SH5_ISA16;
|
}
|
}
|
|
|
/* Initialize static and dynamic disassembly state. */
|
/* Initialize static and dynamic disassembly state. */
|
|
|
static bfd_boolean
|
static bfd_boolean
|
init_sh64_disasm_info (struct disassemble_info *info)
|
init_sh64_disasm_info (struct disassemble_info *info)
|
{
|
{
|
struct sh64_disassemble_info *sh64_infop
|
struct sh64_disassemble_info *sh64_infop
|
= calloc (sizeof (*sh64_infop), 1);
|
= calloc (sizeof (*sh64_infop), 1);
|
|
|
if (sh64_infop == NULL)
|
if (sh64_infop == NULL)
|
return FALSE;
|
return FALSE;
|
|
|
info->private_data = sh64_infop;
|
info->private_data = sh64_infop;
|
|
|
SAVED_MOVI_IMM (info) = 0;
|
SAVED_MOVI_IMM (info) = 0;
|
SAVED_MOVI_R (info) = 255;
|
SAVED_MOVI_R (info) = 255;
|
|
|
if (shmedia_opcode_mask_table == NULL)
|
if (shmedia_opcode_mask_table == NULL)
|
initialize_shmedia_opcode_mask_table ();
|
initialize_shmedia_opcode_mask_table ();
|
|
|
return TRUE;
|
return TRUE;
|
}
|
}
|
|
|
/* Main entry to disassemble SHmedia instructions, given an endian set in
|
/* Main entry to disassemble SHmedia instructions, given an endian set in
|
INFO. Note that the simulator uses this as the main entry and does not
|
INFO. Note that the simulator uses this as the main entry and does not
|
use any of the functions further below. */
|
use any of the functions further below. */
|
|
|
int
|
int
|
print_insn_sh64x_media (bfd_vma memaddr, struct disassemble_info *info)
|
print_insn_sh64x_media (bfd_vma memaddr, struct disassemble_info *info)
|
{
|
{
|
if (info->private_data == NULL && ! init_sh64_disasm_info (info))
|
if (info->private_data == NULL && ! init_sh64_disasm_info (info))
|
return -1;
|
return -1;
|
|
|
/* Make reasonable output. */
|
/* Make reasonable output. */
|
info->bytes_per_line = 4;
|
info->bytes_per_line = 4;
|
info->bytes_per_chunk = 4;
|
info->bytes_per_chunk = 4;
|
|
|
return print_insn_shmedia (memaddr, info);
|
return print_insn_shmedia (memaddr, info);
|
}
|
}
|
|
|
/* Main entry to disassemble SHmedia insns.
|
/* Main entry to disassemble SHmedia insns.
|
If we see an SHcompact instruction, return -2. */
|
If we see an SHcompact instruction, return -2. */
|
|
|
int
|
int
|
print_insn_sh64 (bfd_vma memaddr, struct disassemble_info *info)
|
print_insn_sh64 (bfd_vma memaddr, struct disassemble_info *info)
|
{
|
{
|
enum bfd_endian endian = info->endian;
|
enum bfd_endian endian = info->endian;
|
enum sh64_elf_cr_type cr_type;
|
enum sh64_elf_cr_type cr_type;
|
|
|
if (info->private_data == NULL && ! init_sh64_disasm_info (info))
|
if (info->private_data == NULL && ! init_sh64_disasm_info (info))
|
return -1;
|
return -1;
|
|
|
cr_type = sh64_get_contents_type_disasm (memaddr, info);
|
cr_type = sh64_get_contents_type_disasm (memaddr, info);
|
if (cr_type != CRT_SH5_ISA16)
|
if (cr_type != CRT_SH5_ISA16)
|
{
|
{
|
int length = 4 - (memaddr % 4);
|
int length = 4 - (memaddr % 4);
|
info->display_endian = endian;
|
info->display_endian = endian;
|
|
|
/* If we got an uneven address to indicate SHmedia, adjust it. */
|
/* If we got an uneven address to indicate SHmedia, adjust it. */
|
if (cr_type == CRT_SH5_ISA32 && length == 3)
|
if (cr_type == CRT_SH5_ISA32 && length == 3)
|
memaddr--, length = 4;
|
memaddr--, length = 4;
|
|
|
/* Only disassemble on four-byte boundaries. Addresses that are not
|
/* Only disassemble on four-byte boundaries. Addresses that are not
|
a multiple of four can happen after a data region. */
|
a multiple of four can happen after a data region. */
|
if (cr_type == CRT_SH5_ISA32 && length == 4)
|
if (cr_type == CRT_SH5_ISA32 && length == 4)
|
return print_insn_sh64x_media (memaddr, info);
|
return print_insn_sh64x_media (memaddr, info);
|
|
|
/* We get CRT_DATA *only* for data regions in a mixed-contents
|
/* We get CRT_DATA *only* for data regions in a mixed-contents
|
section. For sections with data only, we get indication of one
|
section. For sections with data only, we get indication of one
|
of the ISA:s. You may think that we shouldn't disassemble
|
of the ISA:s. You may think that we shouldn't disassemble
|
section with only data if we can figure that out. However, the
|
section with only data if we can figure that out. However, the
|
disassembly function is by default not called for data-only
|
disassembly function is by default not called for data-only
|
sections, so if the user explicitly specified disassembly of a
|
sections, so if the user explicitly specified disassembly of a
|
data section, that's what we should do. */
|
data section, that's what we should do. */
|
if (cr_type == CRT_DATA || length != 4)
|
if (cr_type == CRT_DATA || length != 4)
|
{
|
{
|
int status;
|
int status;
|
unsigned char data[4];
|
unsigned char data[4];
|
struct sh64_disassemble_info *sh64_infop = info->private_data;
|
struct sh64_disassemble_info *sh64_infop = info->private_data;
|
|
|
if (length == 4
|
if (length == 4
|
&& sh64_infop->crange.cr_type != CRT_NONE
|
&& sh64_infop->crange.cr_type != CRT_NONE
|
&& memaddr >= sh64_infop->crange.cr_addr
|
&& memaddr >= sh64_infop->crange.cr_addr
|
&& memaddr < (sh64_infop->crange.cr_addr
|
&& memaddr < (sh64_infop->crange.cr_addr
|
+ sh64_infop->crange.cr_size))
|
+ sh64_infop->crange.cr_size))
|
length
|
length
|
= (sh64_infop->crange.cr_addr
|
= (sh64_infop->crange.cr_addr
|
+ sh64_infop->crange.cr_size - memaddr);
|
+ sh64_infop->crange.cr_size - memaddr);
|
|
|
status
|
status
|
= (*info->read_memory_func) (memaddr, data,
|
= (*info->read_memory_func) (memaddr, data,
|
length >= 4 ? 4 : length, info);
|
length >= 4 ? 4 : length, info);
|
|
|
if (status == 0 && length >= 4)
|
if (status == 0 && length >= 4)
|
{
|
{
|
(*info->fprintf_func) (info->stream, ".long 0x%08lx",
|
(*info->fprintf_func) (info->stream, ".long 0x%08lx",
|
endian == BFD_ENDIAN_BIG
|
endian == BFD_ENDIAN_BIG
|
? (long) (bfd_getb32 (data))
|
? (long) (bfd_getb32 (data))
|
: (long) (bfd_getl32 (data)));
|
: (long) (bfd_getl32 (data)));
|
return 4;
|
return 4;
|
}
|
}
|
else
|
else
|
{
|
{
|
int i;
|
int i;
|
|
|
for (i = 0; i < length; i++)
|
for (i = 0; i < length; i++)
|
{
|
{
|
status = info->read_memory_func (memaddr + i, data, 1, info);
|
status = info->read_memory_func (memaddr + i, data, 1, info);
|
if (status != 0)
|
if (status != 0)
|
break;
|
break;
|
(*info->fprintf_func) (info->stream, "%s0x%02x",
|
(*info->fprintf_func) (info->stream, "%s0x%02x",
|
i == 0 ? ".byte " : ", ",
|
i == 0 ? ".byte " : ", ",
|
data[0]);
|
data[0]);
|
}
|
}
|
|
|
return i ? i : -1;
|
return i ? i : -1;
|
}
|
}
|
}
|
}
|
}
|
}
|
|
|
/* SH1 .. SH4 instruction, let caller handle it. */
|
/* SH1 .. SH4 instruction, let caller handle it. */
|
return -2;
|
return -2;
|
}
|
}
|
|
|
