/* Communication between the Integrated Register Allocator (IRA) and
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/* Communication between the Integrated Register Allocator (IRA) and
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the rest of the compiler.
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the rest of the compiler.
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Copyright (C) 2006, 2007, 2008, 2009
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Copyright (C) 2006, 2007, 2008, 2009
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Free Software Foundation, Inc.
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Free Software Foundation, Inc.
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Contributed by Vladimir Makarov <vmakarov@redhat.com>.
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Contributed by Vladimir Makarov <vmakarov@redhat.com>.
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This file is part of GCC.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it under
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GCC is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free
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the terms of the GNU General Public License as published by the Free
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Software Foundation; either version 3, or (at your option) any later
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Software Foundation; either version 3, or (at your option) any later
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version.
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version.
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GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or
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WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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for more details.
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for more details.
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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<http://www.gnu.org/licenses/>. */
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/* Number of given class hard registers available for the register
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/* Number of given class hard registers available for the register
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allocation for given classes. */
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allocation for given classes. */
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extern int ira_available_class_regs[N_REG_CLASSES];
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extern int ira_available_class_regs[N_REG_CLASSES];
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/* Map: hard register number -> cover class it belongs to. If the
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/* Map: hard register number -> cover class it belongs to. If the
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corresponding class is NO_REGS, the hard register is not available
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corresponding class is NO_REGS, the hard register is not available
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for allocation. */
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for allocation. */
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extern enum reg_class ira_hard_regno_cover_class[FIRST_PSEUDO_REGISTER];
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extern enum reg_class ira_hard_regno_cover_class[FIRST_PSEUDO_REGISTER];
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/* Number of cover classes. Cover classes is non-intersected register
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/* Number of cover classes. Cover classes is non-intersected register
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classes containing all hard-registers available for the
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classes containing all hard-registers available for the
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allocation. */
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allocation. */
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extern int ira_reg_class_cover_size;
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extern int ira_reg_class_cover_size;
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/* The array containing cover classes (see also comments for macro
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/* The array containing cover classes (see also comments for macro
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IRA_COVER_CLASSES). Only first IRA_REG_CLASS_COVER_SIZE elements are
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IRA_COVER_CLASSES). Only first IRA_REG_CLASS_COVER_SIZE elements are
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used for this. */
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used for this. */
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extern enum reg_class ira_reg_class_cover[N_REG_CLASSES];
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extern enum reg_class ira_reg_class_cover[N_REG_CLASSES];
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/* Map of all register classes to corresponding cover class containing
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/* Map of all register classes to corresponding cover class containing
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the given class. If given class is not a subset of a cover class,
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the given class. If given class is not a subset of a cover class,
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we translate it into the cheapest cover class. */
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we translate it into the cheapest cover class. */
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extern enum reg_class ira_class_translate[N_REG_CLASSES];
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extern enum reg_class ira_class_translate[N_REG_CLASSES];
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/* Map: register class x machine mode -> number of hard registers of
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/* Map: register class x machine mode -> number of hard registers of
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given class needed to store value of given mode. If the number for
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given class needed to store value of given mode. If the number for
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some hard-registers of the register class is different, the size
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some hard-registers of the register class is different, the size
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will be negative. */
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will be negative. */
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extern int ira_reg_class_nregs[N_REG_CLASSES][MAX_MACHINE_MODE];
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extern int ira_reg_class_nregs[N_REG_CLASSES][MAX_MACHINE_MODE];
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/* Function specific hard registers can not be used for the register
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/* Function specific hard registers can not be used for the register
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allocation. */
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allocation. */
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extern HARD_REG_SET ira_no_alloc_regs;
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extern HARD_REG_SET ira_no_alloc_regs;
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/* True if we have allocno conflicts. It is false for non-optimized
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/* True if we have allocno conflicts. It is false for non-optimized
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mode or when the conflict table is too big. */
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mode or when the conflict table is too big. */
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extern bool ira_conflicts_p;
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extern bool ira_conflicts_p;
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/* Array analogous to macro MEMORY_MOVE_COST. */
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/* Array analogous to macro MEMORY_MOVE_COST. */
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extern short ira_memory_move_cost[MAX_MACHINE_MODE][N_REG_CLASSES][2];
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extern short ira_memory_move_cost[MAX_MACHINE_MODE][N_REG_CLASSES][2];
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/* Array of number of hard registers of given class which are
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/* Array of number of hard registers of given class which are
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available for the allocation. The order is defined by the
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available for the allocation. The order is defined by the
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allocation order. */
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allocation order. */
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extern short ira_class_hard_regs[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
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extern short ira_class_hard_regs[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
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/* The number of elements of the above array for given register
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/* The number of elements of the above array for given register
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class. */
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class. */
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extern int ira_class_hard_regs_num[N_REG_CLASSES];
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extern int ira_class_hard_regs_num[N_REG_CLASSES];
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extern void ira_init_once (void);
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extern void ira_init_once (void);
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extern void ira_init (void);
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extern void ira_init (void);
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extern void ira_finish_once (void);
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extern void ira_finish_once (void);
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extern void ira_setup_eliminable_regset (void);
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extern void ira_setup_eliminable_regset (void);
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extern rtx ira_eliminate_regs (rtx, enum machine_mode);
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extern rtx ira_eliminate_regs (rtx, enum machine_mode);
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extern void ira_set_pseudo_classes (FILE *);
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extern void ira_set_pseudo_classes (FILE *);
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extern void ira_implicitly_set_insn_hard_regs (HARD_REG_SET *);
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extern void ira_implicitly_set_insn_hard_regs (HARD_REG_SET *);
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extern void ira_sort_regnos_for_alter_reg (int *, int, unsigned int *);
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extern void ira_sort_regnos_for_alter_reg (int *, int, unsigned int *);
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extern void ira_mark_allocation_change (int);
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extern void ira_mark_allocation_change (int);
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extern void ira_mark_memory_move_deletion (int, int);
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extern void ira_mark_memory_move_deletion (int, int);
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extern bool ira_reassign_pseudos (int *, int, HARD_REG_SET, HARD_REG_SET *,
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extern bool ira_reassign_pseudos (int *, int, HARD_REG_SET, HARD_REG_SET *,
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HARD_REG_SET *, bitmap);
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HARD_REG_SET *, bitmap);
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extern rtx ira_reuse_stack_slot (int, unsigned int, unsigned int);
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extern rtx ira_reuse_stack_slot (int, unsigned int, unsigned int);
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extern void ira_mark_new_stack_slot (rtx, int, unsigned int);
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extern void ira_mark_new_stack_slot (rtx, int, unsigned int);
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extern bool ira_better_spill_reload_regno_p (int *, int *, rtx, rtx, rtx);
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extern bool ira_better_spill_reload_regno_p (int *, int *, rtx, rtx, rtx);
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