/* TI C6X disassembler.
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/* TI C6X disassembler.
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Copyright 2010
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Copyright 2010
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Free Software Foundation, Inc.
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Free Software Foundation, Inc.
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This file is part of libopcodes.
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This file is part of libopcodes.
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This library is free software; you can redistribute it and/or modify
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This library is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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(at your option) any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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License for more details.
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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MA 02110-1301, USA. */
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#include "sysdep.h"
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#include "sysdep.h"
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#include "dis-asm.h"
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#include "dis-asm.h"
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#include "opcode/tic6x.h"
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#include "opcode/tic6x.h"
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#include "libiberty.h"
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#include "libiberty.h"
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/* Define the instruction format table. */
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/* Define the instruction format table. */
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const tic6x_insn_format tic6x_insn_format_table[tic6x_insn_format_max] =
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const tic6x_insn_format tic6x_insn_format_table[tic6x_insn_format_max] =
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{
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{
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#define FMT(name, num_bits, cst_bits, mask, fields) \
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#define FMT(name, num_bits, cst_bits, mask, fields) \
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{ num_bits, cst_bits, mask, fields },
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{ num_bits, cst_bits, mask, fields },
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#include "opcode/tic6x-insn-formats.h"
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#include "opcode/tic6x-insn-formats.h"
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#undef FMT
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#undef FMT
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};
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};
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/* Define the control register table. */
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/* Define the control register table. */
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const tic6x_ctrl tic6x_ctrl_table[tic6x_ctrl_max] =
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const tic6x_ctrl tic6x_ctrl_table[tic6x_ctrl_max] =
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{
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{
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#define CTRL(name, isa, rw, crlo, crhi_mask) \
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#define CTRL(name, isa, rw, crlo, crhi_mask) \
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{ \
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{ \
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STRINGX(name), \
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STRINGX(name), \
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CONCAT2(TIC6X_INSN_,isa), \
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CONCAT2(TIC6X_INSN_,isa), \
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CONCAT2(tic6x_rw_,rw), \
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CONCAT2(tic6x_rw_,rw), \
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crlo, \
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crlo, \
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crhi_mask \
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crhi_mask \
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},
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},
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#include "opcode/tic6x-control-registers.h"
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#include "opcode/tic6x-control-registers.h"
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#undef CTRL
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#undef CTRL
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};
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};
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/* Define the opcode table. */
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/* Define the opcode table. */
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const tic6x_opcode tic6x_opcode_table[tic6x_opcode_max] =
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const tic6x_opcode tic6x_opcode_table[tic6x_opcode_max] =
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{
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{
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#define INSN(name, func_unit, format, type, isa, flags, fixed, ops, var) \
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#define INSN(name, func_unit, format, type, isa, flags, fixed, ops, var) \
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{ \
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{ \
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STRINGX(name), \
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STRINGX(name), \
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CONCAT2(tic6x_func_unit_,func_unit), \
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CONCAT2(tic6x_func_unit_,func_unit), \
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CONCAT4(tic6x_insn_format_,func_unit,_,format), \
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CONCAT4(tic6x_insn_format_,func_unit,_,format), \
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CONCAT2(tic6x_pipeline_,type), \
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CONCAT2(tic6x_pipeline_,type), \
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CONCAT2(TIC6X_INSN_,isa), \
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CONCAT2(TIC6X_INSN_,isa), \
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flags, \
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flags, \
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fixed, \
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fixed, \
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ops, \
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ops, \
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var \
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var \
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},
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},
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#define INSNE(name, e, func_unit, format, type, isa, flags, fixed, ops, var) \
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#define INSNE(name, e, func_unit, format, type, isa, flags, fixed, ops, var) \
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{ \
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{ \
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STRINGX(name), \
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STRINGX(name), \
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CONCAT2(tic6x_func_unit_,func_unit), \
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CONCAT2(tic6x_func_unit_,func_unit), \
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CONCAT4(tic6x_insn_format_,func_unit,_,format), \
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CONCAT4(tic6x_insn_format_,func_unit,_,format), \
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CONCAT2(tic6x_pipeline_,type), \
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CONCAT2(tic6x_pipeline_,type), \
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CONCAT2(TIC6X_INSN_,isa), \
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CONCAT2(TIC6X_INSN_,isa), \
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flags, \
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flags, \
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fixed, \
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fixed, \
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ops, \
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ops, \
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var \
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var \
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},
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},
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#include "opcode/tic6x-opcode-table.h"
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#include "opcode/tic6x-opcode-table.h"
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#undef INSN
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#undef INSN
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#undef INSNE
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#undef INSNE
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};
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};
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/* If instruction format FMT has a field FIELD, return a pointer to
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/* If instruction format FMT has a field FIELD, return a pointer to
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the description of that field; otherwise return NULL. */
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the description of that field; otherwise return NULL. */
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const tic6x_insn_field *
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const tic6x_insn_field *
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tic6x_field_from_fmt (const tic6x_insn_format *fmt, tic6x_insn_field_id field)
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tic6x_field_from_fmt (const tic6x_insn_format *fmt, tic6x_insn_field_id field)
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{
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{
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unsigned int f;
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unsigned int f;
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for (f = 0; f < fmt->num_fields; f++)
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for (f = 0; f < fmt->num_fields; f++)
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if (fmt->fields[f].field_id == field)
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if (fmt->fields[f].field_id == field)
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return &fmt->fields[f];
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return &fmt->fields[f];
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return NULL;
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return NULL;
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}
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}
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/* Extract the bits corresponding to FIELD from OPCODE. */
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/* Extract the bits corresponding to FIELD from OPCODE. */
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static unsigned int
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static unsigned int
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tic6x_field_bits (unsigned int opcode, const tic6x_insn_field *field)
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tic6x_field_bits (unsigned int opcode, const tic6x_insn_field *field)
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{
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{
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return (opcode >> field->low_pos) & ((1u << field->width) - 1);
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return (opcode >> field->low_pos) & ((1u << field->width) - 1);
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}
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}
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/* Extract a 32-bit value read from the instruction stream. */
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/* Extract a 32-bit value read from the instruction stream. */
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static unsigned int
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static unsigned int
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tic6x_extract_32 (unsigned char *p, struct disassemble_info *info)
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tic6x_extract_32 (unsigned char *p, struct disassemble_info *info)
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{
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{
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if (info->endian == BFD_ENDIAN_LITTLE)
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if (info->endian == BFD_ENDIAN_LITTLE)
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return (p[0]) | (p[1] << 8) | (p[2] << 16) | (p[3] << 24);
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return (p[0]) | (p[1] << 8) | (p[2] << 16) | (p[3] << 24);
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else
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else
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return (p[3]) | (p[2] << 8) | (p[1] << 16) | (p[0] << 24);
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return (p[3]) | (p[2] << 8) | (p[1] << 16) | (p[0] << 24);
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}
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}
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/* Extract a 16-bit value read from the instruction stream. */
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/* Extract a 16-bit value read from the instruction stream. */
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static unsigned int
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static unsigned int
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tic6x_extract_16 (unsigned char *p, struct disassemble_info *info)
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tic6x_extract_16 (unsigned char *p, struct disassemble_info *info)
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{
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{
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if (info->endian == BFD_ENDIAN_LITTLE)
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if (info->endian == BFD_ENDIAN_LITTLE)
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return (p[0]) | (p[1] << 8);
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return (p[0]) | (p[1] << 8);
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else
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else
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return (p[1]) | (p[0] << 8);
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return (p[1]) | (p[0] << 8);
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}
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}
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/* FP points to a fetch packet. Return whether it is header-based; if
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/* FP points to a fetch packet. Return whether it is header-based; if
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it is, fill in HEADER. */
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it is, fill in HEADER. */
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static bfd_boolean
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static bfd_boolean
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tic6x_check_fetch_packet_header (unsigned char *fp,
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tic6x_check_fetch_packet_header (unsigned char *fp,
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tic6x_fetch_packet_header *header,
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tic6x_fetch_packet_header *header,
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struct disassemble_info *info)
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struct disassemble_info *info)
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{
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{
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int i;
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int i;
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header->header = tic6x_extract_32 (fp + 28, info);
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header->header = tic6x_extract_32 (fp + 28, info);
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if ((header->header & 0xf0000000) != 0xe0000000)
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if ((header->header & 0xf0000000) != 0xe0000000)
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return FALSE;
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return FALSE;
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for (i = 0; i < 7; i++)
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for (i = 0; i < 7; i++)
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header->word_compact[i]
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header->word_compact[i]
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= (header->header & (1u << (21 + i))) ? TRUE : FALSE;
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= (header->header & (1u << (21 + i))) ? TRUE : FALSE;
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header->prot = (header->header & (1u << 20)) ? TRUE : FALSE;
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header->prot = (header->header & (1u << 20)) ? TRUE : FALSE;
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header->rs = (header->header & (1u << 19)) ? TRUE : FALSE;
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header->rs = (header->header & (1u << 19)) ? TRUE : FALSE;
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header->dsz = (header->header >> 16) & 0x7;
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header->dsz = (header->header >> 16) & 0x7;
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header->br = (header->header & (1u << 15)) ? TRUE : FALSE;
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header->br = (header->header & (1u << 15)) ? TRUE : FALSE;
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header->sat = (header->header & (1u << 14)) ? TRUE : FALSE;
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header->sat = (header->header & (1u << 14)) ? TRUE : FALSE;
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for (i = 0; i < 14; i++)
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for (i = 0; i < 14; i++)
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header->p_bits[i]
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header->p_bits[i]
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= (header->header & (1u << i)) ? TRUE : FALSE;
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= (header->header & (1u << i)) ? TRUE : FALSE;
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return TRUE;
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return TRUE;
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}
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}
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/* Disassemble the instruction at ADDR and print it using
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/* Disassemble the instruction at ADDR and print it using
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INFO->FPRINTF_FUNC and INFO->STREAM, returning the number of bytes
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INFO->FPRINTF_FUNC and INFO->STREAM, returning the number of bytes
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consumed. */
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consumed. */
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int
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int
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print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
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print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
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{
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{
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int status;
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int status;
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bfd_vma fp_addr;
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bfd_vma fp_addr;
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bfd_vma fp_offset;
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bfd_vma fp_offset;
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unsigned char fp[32];
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unsigned char fp[32];
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unsigned int opcode;
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unsigned int opcode;
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tic6x_opcode_id opcode_id;
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tic6x_opcode_id opcode_id;
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bfd_boolean fetch_packet_header_based;
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bfd_boolean fetch_packet_header_based;
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tic6x_fetch_packet_header header;
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tic6x_fetch_packet_header header;
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unsigned int num_bits;
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unsigned int num_bits;
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bfd_boolean bad_offset = FALSE;
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bfd_boolean bad_offset = FALSE;
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fp_offset = addr & 0x1f;
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fp_offset = addr & 0x1f;
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fp_addr = addr - fp_offset;
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fp_addr = addr - fp_offset;
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status = info->read_memory_func (fp_addr, fp, 32, info);
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status = info->read_memory_func (fp_addr, fp, 32, info);
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if (status)
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if (status)
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{
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{
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info->memory_error_func (status, addr, info);
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info->memory_error_func (status, addr, info);
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return -1;
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return -1;
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}
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}
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fetch_packet_header_based
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fetch_packet_header_based
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= tic6x_check_fetch_packet_header (fp, &header, info);
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= tic6x_check_fetch_packet_header (fp, &header, info);
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if (fetch_packet_header_based)
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if (fetch_packet_header_based)
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{
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{
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if (fp_offset & 0x1)
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if (fp_offset & 0x1)
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bad_offset = TRUE;
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bad_offset = TRUE;
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if ((fp_offset & 0x3) && (fp_offset >= 28
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if ((fp_offset & 0x3) && (fp_offset >= 28
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|| !header.word_compact[fp_offset >> 2]))
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|| !header.word_compact[fp_offset >> 2]))
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bad_offset = TRUE;
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bad_offset = TRUE;
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if (fp_offset == 28)
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if (fp_offset == 28)
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{
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{
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info->bytes_per_chunk = 4;
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info->bytes_per_chunk = 4;
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info->fprintf_func (info->stream, "<fetch packet header 0x%.8x>",
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info->fprintf_func (info->stream, "<fetch packet header 0x%.8x>",
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header.header);
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header.header);
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return 4;
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return 4;
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}
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}
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num_bits = (header.word_compact[fp_offset >> 2] ? 16 : 32);
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num_bits = (header.word_compact[fp_offset >> 2] ? 16 : 32);
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}
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}
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else
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else
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{
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{
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num_bits = 32;
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num_bits = 32;
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if (fp_offset & 0x3)
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if (fp_offset & 0x3)
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bad_offset = TRUE;
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bad_offset = TRUE;
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}
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}
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if (bad_offset)
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if (bad_offset)
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{
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{
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info->bytes_per_chunk = 1;
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info->bytes_per_chunk = 1;
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info->fprintf_func (info->stream, ".byte 0x%.2x", fp[fp_offset]);
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info->fprintf_func (info->stream, ".byte 0x%.2x", fp[fp_offset]);
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return 1;
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return 1;
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}
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}
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if (num_bits == 16)
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if (num_bits == 16)
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{
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{
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/* The least-significant part of a 32-bit word comes logically
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/* The least-significant part of a 32-bit word comes logically
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before the most-significant part. For big-endian, follow the
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before the most-significant part. For big-endian, follow the
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TI assembler in showing instructions in logical order by
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TI assembler in showing instructions in logical order by
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pretending that the two halves of the word are in opposite
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pretending that the two halves of the word are in opposite
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locations to where they actually are. */
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locations to where they actually are. */
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if (info->endian == BFD_ENDIAN_LITTLE)
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if (info->endian == BFD_ENDIAN_LITTLE)
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opcode = tic6x_extract_16 (fp + fp_offset, info);
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opcode = tic6x_extract_16 (fp + fp_offset, info);
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else
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else
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opcode = tic6x_extract_16 (fp + (fp_offset ^ 2), info);
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opcode = tic6x_extract_16 (fp + (fp_offset ^ 2), info);
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}
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}
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else
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else
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opcode = tic6x_extract_32 (fp + fp_offset, info);
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opcode = tic6x_extract_32 (fp + fp_offset, info);
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for (opcode_id = 0; opcode_id < tic6x_opcode_max; opcode_id++)
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for (opcode_id = 0; opcode_id < tic6x_opcode_max; opcode_id++)
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{
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{
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const tic6x_opcode *const opc = &tic6x_opcode_table[opcode_id];
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const tic6x_opcode *const opc = &tic6x_opcode_table[opcode_id];
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const tic6x_insn_format *const fmt
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const tic6x_insn_format *const fmt
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= &tic6x_insn_format_table[opc->format];
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= &tic6x_insn_format_table[opc->format];
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const tic6x_insn_field *creg_field;
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const tic6x_insn_field *creg_field;
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bfd_boolean p_bit;
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bfd_boolean p_bit;
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const char *parallel;
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const char *parallel;
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const char *cond = "";
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const char *cond = "";
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const char *func_unit;
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const char *func_unit;
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char func_unit_buf[7];
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char func_unit_buf[7];
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unsigned int func_unit_side = 0;
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unsigned int func_unit_side = 0;
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unsigned int func_unit_data_side = 0;
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unsigned int func_unit_data_side = 0;
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unsigned int func_unit_cross = 0;
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unsigned int func_unit_cross = 0;
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/* The maximum length of the text of a non-PC-relative operand
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/* The maximum length of the text of a non-PC-relative operand
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is 24 bytes (SPMASK masking all eight functional units, with
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is 24 bytes (SPMASK masking all eight functional units, with
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separating commas and trailing NUL). */
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separating commas and trailing NUL). */
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char operands[TIC6X_MAX_OPERANDS][24] = { { 0 } };
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char operands[TIC6X_MAX_OPERANDS][24] = { { 0 } };
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bfd_vma operands_addresses[TIC6X_MAX_OPERANDS] = { 0 };
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bfd_vma operands_addresses[TIC6X_MAX_OPERANDS] = { 0 };
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bfd_boolean operands_text[TIC6X_MAX_OPERANDS] = { FALSE };
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bfd_boolean operands_text[TIC6X_MAX_OPERANDS] = { FALSE };
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bfd_boolean operands_pcrel[TIC6X_MAX_OPERANDS] = { FALSE };
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bfd_boolean operands_pcrel[TIC6X_MAX_OPERANDS] = { FALSE };
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unsigned int fix;
|
unsigned int fix;
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unsigned int num_operands;
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unsigned int num_operands;
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unsigned int op_num;
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unsigned int op_num;
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bfd_boolean fixed_ok;
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bfd_boolean fixed_ok;
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bfd_boolean operands_ok;
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bfd_boolean operands_ok;
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|
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if (opc->flags & TIC6X_FLAG_MACRO)
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if (opc->flags & TIC6X_FLAG_MACRO)
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continue;
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continue;
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if (fmt->num_bits != num_bits)
|
if (fmt->num_bits != num_bits)
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continue;
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continue;
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if ((opcode & fmt->mask) != fmt->cst_bits)
|
if ((opcode & fmt->mask) != fmt->cst_bits)
|
continue;
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continue;
|
|
|
/* If the format has a creg field, it is only a candidate for a
|
/* If the format has a creg field, it is only a candidate for a
|
match if the creg and z fields have values indicating a valid
|
match if the creg and z fields have values indicating a valid
|
condition; reserved values indicate either an instruction
|
condition; reserved values indicate either an instruction
|
format without a creg field, or an invalid instruction. */
|
format without a creg field, or an invalid instruction. */
|
creg_field = tic6x_field_from_fmt (fmt, tic6x_field_creg);
|
creg_field = tic6x_field_from_fmt (fmt, tic6x_field_creg);
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if (creg_field)
|
if (creg_field)
|
{
|
{
|
const tic6x_insn_field *z_field;
|
const tic6x_insn_field *z_field;
|
unsigned int creg_value, z_value;
|
unsigned int creg_value, z_value;
|
static const char *const conds[8][2] =
|
static const char *const conds[8][2] =
|
{
|
{
|
{ "", NULL },
|
{ "", NULL },
|
{ "[b0] ", "[!b0] " },
|
{ "[b0] ", "[!b0] " },
|
{ "[b1] ", "[!b1] " },
|
{ "[b1] ", "[!b1] " },
|
{ "[b2] ", "[!b2] " },
|
{ "[b2] ", "[!b2] " },
|
{ "[a1] ", "[!a1] " },
|
{ "[a1] ", "[!a1] " },
|
{ "[a2] ", "[!a2] " },
|
{ "[a2] ", "[!a2] " },
|
{ "[a0] ", "[!a0] " },
|
{ "[a0] ", "[!a0] " },
|
{ NULL, NULL }
|
{ NULL, NULL }
|
};
|
};
|
|
|
/* A creg field is not meaningful without a z field, so if
|
/* A creg field is not meaningful without a z field, so if
|
the z field is not present this is an error in the format
|
the z field is not present this is an error in the format
|
table. */
|
table. */
|
z_field = tic6x_field_from_fmt (fmt, tic6x_field_z);
|
z_field = tic6x_field_from_fmt (fmt, tic6x_field_z);
|
if (!z_field)
|
if (!z_field)
|
abort ();
|
abort ();
|
|
|
creg_value = tic6x_field_bits (opcode, creg_field);
|
creg_value = tic6x_field_bits (opcode, creg_field);
|
z_value = tic6x_field_bits (opcode, z_field);
|
z_value = tic6x_field_bits (opcode, z_field);
|
cond = conds[creg_value][z_value];
|
cond = conds[creg_value][z_value];
|
if (cond == NULL)
|
if (cond == NULL)
|
continue;
|
continue;
|
}
|
}
|
|
|
/* All fixed fields must have matching values; all fields with
|
/* All fixed fields must have matching values; all fields with
|
restricted ranges must have values within those ranges. */
|
restricted ranges must have values within those ranges. */
|
fixed_ok = TRUE;
|
fixed_ok = TRUE;
|
for (fix = 0; fix < opc->num_fixed_fields; fix++)
|
for (fix = 0; fix < opc->num_fixed_fields; fix++)
|
{
|
{
|
unsigned int field_bits;
|
unsigned int field_bits;
|
const tic6x_insn_field *const field
|
const tic6x_insn_field *const field
|
= tic6x_field_from_fmt (fmt, opc->fixed_fields[fix].field_id);
|
= tic6x_field_from_fmt (fmt, opc->fixed_fields[fix].field_id);
|
|
|
if (!field)
|
if (!field)
|
abort ();
|
abort ();
|
field_bits = tic6x_field_bits (opcode, field);
|
field_bits = tic6x_field_bits (opcode, field);
|
if (field_bits < opc->fixed_fields[fix].min_val
|
if (field_bits < opc->fixed_fields[fix].min_val
|
|| field_bits > opc->fixed_fields[fix].max_val)
|
|| field_bits > opc->fixed_fields[fix].max_val)
|
{
|
{
|
fixed_ok = FALSE;
|
fixed_ok = FALSE;
|
break;
|
break;
|
}
|
}
|
}
|
}
|
if (!fixed_ok)
|
if (!fixed_ok)
|
continue;
|
continue;
|
|
|
/* The instruction matches. */
|
/* The instruction matches. */
|
|
|
/* The p-bit indicates whether this instruction is in parallel
|
/* The p-bit indicates whether this instruction is in parallel
|
with the *next* instruction, whereas the parallel bars
|
with the *next* instruction, whereas the parallel bars
|
indicate the instruction is in parallel with the *previous*
|
indicate the instruction is in parallel with the *previous*
|
instruction. Thus, we must find the p-bit for the previous
|
instruction. Thus, we must find the p-bit for the previous
|
instruction. */
|
instruction. */
|
if (num_bits == 16 && (fp_offset & 0x2) == 2)
|
if (num_bits == 16 && (fp_offset & 0x2) == 2)
|
{
|
{
|
/* This is the logically second (most significant; second in
|
/* This is the logically second (most significant; second in
|
fp_offset terms because fp_offset relates to logical not
|
fp_offset terms because fp_offset relates to logical not
|
physical addresses) instruction of a compact pair; find
|
physical addresses) instruction of a compact pair; find
|
the p-bit for the first (least significant). */
|
the p-bit for the first (least significant). */
|
p_bit = header.p_bits[(fp_offset >> 2) << 1];
|
p_bit = header.p_bits[(fp_offset >> 2) << 1];
|
}
|
}
|
else if (fp_offset >= 4)
|
else if (fp_offset >= 4)
|
{
|
{
|
/* Find the last instruction of the previous word in this
|
/* Find the last instruction of the previous word in this
|
fetch packet. For compact instructions, this is the most
|
fetch packet. For compact instructions, this is the most
|
significant 16 bits. */
|
significant 16 bits. */
|
if (fetch_packet_header_based
|
if (fetch_packet_header_based
|
&& header.word_compact[(fp_offset >> 2) - 1])
|
&& header.word_compact[(fp_offset >> 2) - 1])
|
p_bit = header.p_bits[(fp_offset >> 1) - 1];
|
p_bit = header.p_bits[(fp_offset >> 1) - 1];
|
else
|
else
|
{
|
{
|
unsigned int prev_opcode
|
unsigned int prev_opcode
|
= tic6x_extract_32 (fp + (fp_offset & 0x1c) - 4, info);
|
= tic6x_extract_32 (fp + (fp_offset & 0x1c) - 4, info);
|
p_bit = (prev_opcode & 0x1) ? TRUE : FALSE;
|
p_bit = (prev_opcode & 0x1) ? TRUE : FALSE;
|
}
|
}
|
}
|
}
|
else
|
else
|
{
|
{
|
/* Find the last instruction of the previous fetch
|
/* Find the last instruction of the previous fetch
|
packet. */
|
packet. */
|
unsigned char fp_prev[32];
|
unsigned char fp_prev[32];
|
status = info->read_memory_func (fp_addr - 32, fp_prev, 32, info);
|
status = info->read_memory_func (fp_addr - 32, fp_prev, 32, info);
|
if (status)
|
if (status)
|
/* No previous instruction to be parallel with. */
|
/* No previous instruction to be parallel with. */
|
p_bit = FALSE;
|
p_bit = FALSE;
|
else
|
else
|
{
|
{
|
bfd_boolean prev_header_based;
|
bfd_boolean prev_header_based;
|
tic6x_fetch_packet_header prev_header;
|
tic6x_fetch_packet_header prev_header;
|
|
|
prev_header_based
|
prev_header_based
|
= tic6x_check_fetch_packet_header (fp_prev, &prev_header, info);
|
= tic6x_check_fetch_packet_header (fp_prev, &prev_header, info);
|
if (prev_header_based && prev_header.word_compact[6])
|
if (prev_header_based && prev_header.word_compact[6])
|
p_bit = prev_header.p_bits[13];
|
p_bit = prev_header.p_bits[13];
|
else
|
else
|
{
|
{
|
unsigned int prev_opcode = tic6x_extract_32 (fp_prev + 28,
|
unsigned int prev_opcode = tic6x_extract_32 (fp_prev + 28,
|
info);
|
info);
|
p_bit = (prev_opcode & 0x1) ? TRUE : FALSE;
|
p_bit = (prev_opcode & 0x1) ? TRUE : FALSE;
|
}
|
}
|
}
|
}
|
}
|
}
|
parallel = p_bit ? "|| " : "";
|
parallel = p_bit ? "|| " : "";
|
|
|
if (opc->func_unit == tic6x_func_unit_nfu)
|
if (opc->func_unit == tic6x_func_unit_nfu)
|
func_unit = "";
|
func_unit = "";
|
else
|
else
|
{
|
{
|
unsigned int fld_num;
|
unsigned int fld_num;
|
char func_unit_char;
|
char func_unit_char;
|
const char *data_str;
|
const char *data_str;
|
bfd_boolean have_areg = FALSE;
|
bfd_boolean have_areg = FALSE;
|
bfd_boolean have_cross = FALSE;
|
bfd_boolean have_cross = FALSE;
|
|
|
func_unit_side = (opc->flags & TIC6X_FLAG_SIDE_B_ONLY) ? 2 : 0;
|
func_unit_side = (opc->flags & TIC6X_FLAG_SIDE_B_ONLY) ? 2 : 0;
|
func_unit_cross = 0;
|
func_unit_cross = 0;
|
func_unit_data_side = (opc->flags & TIC6X_FLAG_SIDE_T2_ONLY) ? 2 : 0;
|
func_unit_data_side = (opc->flags & TIC6X_FLAG_SIDE_T2_ONLY) ? 2 : 0;
|
|
|
for (fld_num = 0; fld_num < opc->num_variable_fields; fld_num++)
|
for (fld_num = 0; fld_num < opc->num_variable_fields; fld_num++)
|
{
|
{
|
const tic6x_coding_field *const enc = &opc->variable_fields[fld_num];
|
const tic6x_coding_field *const enc = &opc->variable_fields[fld_num];
|
const tic6x_insn_field *field;
|
const tic6x_insn_field *field;
|
unsigned int fld_val;
|
unsigned int fld_val;
|
|
|
field = tic6x_field_from_fmt (fmt, enc->field_id);
|
field = tic6x_field_from_fmt (fmt, enc->field_id);
|
if (!field)
|
if (!field)
|
abort ();
|
abort ();
|
fld_val = tic6x_field_bits (opcode, field);
|
fld_val = tic6x_field_bits (opcode, field);
|
switch (enc->coding_method)
|
switch (enc->coding_method)
|
{
|
{
|
case tic6x_coding_fu:
|
case tic6x_coding_fu:
|
/* The side must be specified exactly once. */
|
/* The side must be specified exactly once. */
|
if (func_unit_side)
|
if (func_unit_side)
|
abort ();
|
abort ();
|
func_unit_side = (fld_val ? 2 : 1);
|
func_unit_side = (fld_val ? 2 : 1);
|
break;
|
break;
|
|
|
case tic6x_coding_data_fu:
|
case tic6x_coding_data_fu:
|
/* The data side must be specified exactly once. */
|
/* The data side must be specified exactly once. */
|
if (func_unit_data_side)
|
if (func_unit_data_side)
|
abort ();
|
abort ();
|
func_unit_data_side = (fld_val ? 2 : 1);
|
func_unit_data_side = (fld_val ? 2 : 1);
|
break;
|
break;
|
|
|
case tic6x_coding_xpath:
|
case tic6x_coding_xpath:
|
/* Cross path use must be specified exactly
|
/* Cross path use must be specified exactly
|
once. */
|
once. */
|
if (have_cross)
|
if (have_cross)
|
abort ();
|
abort ();
|
have_cross = TRUE;
|
have_cross = TRUE;
|
func_unit_cross = fld_val;
|
func_unit_cross = fld_val;
|
break;
|
break;
|
|
|
case tic6x_coding_areg:
|
case tic6x_coding_areg:
|
have_areg = TRUE;
|
have_areg = TRUE;
|
break;
|
break;
|
|
|
default:
|
default:
|
/* Don't relate to functional units. */
|
/* Don't relate to functional units. */
|
break;
|
break;
|
}
|
}
|
}
|
}
|
|
|
/* The side of the functional unit used must now have been
|
/* The side of the functional unit used must now have been
|
determined either from the flags or from an instruction
|
determined either from the flags or from an instruction
|
field. */
|
field. */
|
if (func_unit_side != 1 && func_unit_side != 2)
|
if (func_unit_side != 1 && func_unit_side != 2)
|
abort ();
|
abort ();
|
|
|
/* Cross paths are not applicable when sides are specified
|
/* Cross paths are not applicable when sides are specified
|
for both address and data paths. */
|
for both address and data paths. */
|
if (func_unit_data_side && have_cross)
|
if (func_unit_data_side && have_cross)
|
abort ();
|
abort ();
|
|
|
/* Separate address and data paths are only applicable for
|
/* Separate address and data paths are only applicable for
|
the D unit. */
|
the D unit. */
|
if (func_unit_data_side && opc->func_unit != tic6x_func_unit_d)
|
if (func_unit_data_side && opc->func_unit != tic6x_func_unit_d)
|
abort ();
|
abort ();
|
|
|
/* If an address register is being used but in ADDA rather
|
/* If an address register is being used but in ADDA rather
|
than a load or store, it uses a cross path for side-A
|
than a load or store, it uses a cross path for side-A
|
instructions, and the cross path use is not specified by
|
instructions, and the cross path use is not specified by
|
an instruction field. */
|
an instruction field. */
|
if (have_areg && !func_unit_data_side)
|
if (have_areg && !func_unit_data_side)
|
{
|
{
|
if (have_cross)
|
if (have_cross)
|
abort ();
|
abort ();
|
func_unit_cross = (func_unit_side == 1 ? TRUE : FALSE);
|
func_unit_cross = (func_unit_side == 1 ? TRUE : FALSE);
|
}
|
}
|
|
|
switch (opc->func_unit)
|
switch (opc->func_unit)
|
{
|
{
|
case tic6x_func_unit_d:
|
case tic6x_func_unit_d:
|
func_unit_char = 'D';
|
func_unit_char = 'D';
|
break;
|
break;
|
|
|
case tic6x_func_unit_l:
|
case tic6x_func_unit_l:
|
func_unit_char = 'L';
|
func_unit_char = 'L';
|
break;
|
break;
|
|
|
case tic6x_func_unit_m:
|
case tic6x_func_unit_m:
|
func_unit_char = 'M';
|
func_unit_char = 'M';
|
break;
|
break;
|
|
|
case tic6x_func_unit_s:
|
case tic6x_func_unit_s:
|
func_unit_char = 'S';
|
func_unit_char = 'S';
|
break;
|
break;
|
|
|
default:
|
default:
|
abort ();
|
abort ();
|
}
|
}
|
|
|
switch (func_unit_data_side)
|
switch (func_unit_data_side)
|
{
|
{
|
case 0:
|
case 0:
|
data_str = "";
|
data_str = "";
|
break;
|
break;
|
|
|
case 1:
|
case 1:
|
data_str = "T1";
|
data_str = "T1";
|
break;
|
break;
|
|
|
case 2:
|
case 2:
|
data_str = "T2";
|
data_str = "T2";
|
break;
|
break;
|
|
|
default:
|
default:
|
abort ();
|
abort ();
|
}
|
}
|
|
|
snprintf (func_unit_buf, 7, " .%c%u%s%s", func_unit_char,
|
snprintf (func_unit_buf, 7, " .%c%u%s%s", func_unit_char,
|
func_unit_side, (func_unit_cross ? "X" : ""), data_str);
|
func_unit_side, (func_unit_cross ? "X" : ""), data_str);
|
func_unit = func_unit_buf;
|
func_unit = func_unit_buf;
|
}
|
}
|
|
|
/* For each operand there must be one or more fields set based
|
/* For each operand there must be one or more fields set based
|
on that operand, that can together be used to derive the
|
on that operand, that can together be used to derive the
|
operand value. */
|
operand value. */
|
operands_ok = TRUE;
|
operands_ok = TRUE;
|
num_operands = opc->num_operands;
|
num_operands = opc->num_operands;
|
for (op_num = 0; op_num < num_operands; op_num++)
|
for (op_num = 0; op_num < num_operands; op_num++)
|
{
|
{
|
unsigned int fld_num;
|
unsigned int fld_num;
|
unsigned int mem_base_reg = 0;
|
unsigned int mem_base_reg = 0;
|
bfd_boolean mem_base_reg_known = FALSE;
|
bfd_boolean mem_base_reg_known = FALSE;
|
bfd_boolean mem_base_reg_known_long = FALSE;
|
bfd_boolean mem_base_reg_known_long = FALSE;
|
unsigned int mem_offset = 0;
|
unsigned int mem_offset = 0;
|
bfd_boolean mem_offset_known = FALSE;
|
bfd_boolean mem_offset_known = FALSE;
|
bfd_boolean mem_offset_known_long = FALSE;
|
bfd_boolean mem_offset_known_long = FALSE;
|
unsigned int mem_mode = 0;
|
unsigned int mem_mode = 0;
|
bfd_boolean mem_mode_known = FALSE;
|
bfd_boolean mem_mode_known = FALSE;
|
unsigned int mem_scaled = 0;
|
unsigned int mem_scaled = 0;
|
bfd_boolean mem_scaled_known = FALSE;
|
bfd_boolean mem_scaled_known = FALSE;
|
unsigned int crlo = 0;
|
unsigned int crlo = 0;
|
bfd_boolean crlo_known = FALSE;
|
bfd_boolean crlo_known = FALSE;
|
unsigned int crhi = 0;
|
unsigned int crhi = 0;
|
bfd_boolean crhi_known = FALSE;
|
bfd_boolean crhi_known = FALSE;
|
bfd_boolean spmask_skip_operand = FALSE;
|
bfd_boolean spmask_skip_operand = FALSE;
|
unsigned int fcyc_bits = 0;
|
unsigned int fcyc_bits = 0;
|
bfd_boolean prev_sploop_found = FALSE;
|
bfd_boolean prev_sploop_found = FALSE;
|
|
|
switch (opc->operand_info[op_num].form)
|
switch (opc->operand_info[op_num].form)
|
{
|
{
|
case tic6x_operand_retreg:
|
case tic6x_operand_retreg:
|
/* Fully determined by the functional unit. */
|
/* Fully determined by the functional unit. */
|
operands_text[op_num] = TRUE;
|
operands_text[op_num] = TRUE;
|
snprintf (operands[op_num], 24, "%c3",
|
snprintf (operands[op_num], 24, "%c3",
|
(func_unit_side == 2 ? 'b' : 'a'));
|
(func_unit_side == 2 ? 'b' : 'a'));
|
continue;
|
continue;
|
|
|
case tic6x_operand_irp:
|
case tic6x_operand_irp:
|
operands_text[op_num] = TRUE;
|
operands_text[op_num] = TRUE;
|
snprintf (operands[op_num], 24, "irp");
|
snprintf (operands[op_num], 24, "irp");
|
continue;
|
continue;
|
|
|
case tic6x_operand_nrp:
|
case tic6x_operand_nrp:
|
operands_text[op_num] = TRUE;
|
operands_text[op_num] = TRUE;
|
snprintf (operands[op_num], 24, "nrp");
|
snprintf (operands[op_num], 24, "nrp");
|
continue;
|
continue;
|
|
|
default:
|
default:
|
break;
|
break;
|
}
|
}
|
|
|
for (fld_num = 0; fld_num < opc->num_variable_fields; fld_num++)
|
for (fld_num = 0; fld_num < opc->num_variable_fields; fld_num++)
|
{
|
{
|
const tic6x_coding_field *const enc
|
const tic6x_coding_field *const enc
|
= &opc->variable_fields[fld_num];
|
= &opc->variable_fields[fld_num];
|
const tic6x_insn_field *field;
|
const tic6x_insn_field *field;
|
unsigned int fld_val;
|
unsigned int fld_val;
|
signed int signed_fld_val;
|
signed int signed_fld_val;
|
|
|
if (enc->operand_num != op_num)
|
if (enc->operand_num != op_num)
|
continue;
|
continue;
|
field = tic6x_field_from_fmt (fmt, enc->field_id);
|
field = tic6x_field_from_fmt (fmt, enc->field_id);
|
if (!field)
|
if (!field)
|
abort ();
|
abort ();
|
fld_val = tic6x_field_bits (opcode, field);
|
fld_val = tic6x_field_bits (opcode, field);
|
switch (enc->coding_method)
|
switch (enc->coding_method)
|
{
|
{
|
case tic6x_coding_ucst:
|
case tic6x_coding_ucst:
|
case tic6x_coding_ulcst_dpr_byte:
|
case tic6x_coding_ulcst_dpr_byte:
|
case tic6x_coding_ulcst_dpr_half:
|
case tic6x_coding_ulcst_dpr_half:
|
case tic6x_coding_ulcst_dpr_word:
|
case tic6x_coding_ulcst_dpr_word:
|
case tic6x_coding_lcst_low16:
|
case tic6x_coding_lcst_low16:
|
switch (opc->operand_info[op_num].form)
|
switch (opc->operand_info[op_num].form)
|
{
|
{
|
case tic6x_operand_asm_const:
|
case tic6x_operand_asm_const:
|
case tic6x_operand_link_const:
|
case tic6x_operand_link_const:
|
operands_text[op_num] = TRUE;
|
operands_text[op_num] = TRUE;
|
snprintf (operands[op_num], 24, "%u", fld_val);
|
snprintf (operands[op_num], 24, "%u", fld_val);
|
break;
|
break;
|
|
|
case tic6x_operand_mem_long:
|
case tic6x_operand_mem_long:
|
mem_offset = fld_val;
|
mem_offset = fld_val;
|
mem_offset_known_long = TRUE;
|
mem_offset_known_long = TRUE;
|
break;
|
break;
|
|
|
default:
|
default:
|
abort ();
|
abort ();
|
}
|
}
|
break;
|
break;
|
|
|
case tic6x_coding_lcst_high16:
|
case tic6x_coding_lcst_high16:
|
operands_text[op_num] = TRUE;
|
operands_text[op_num] = TRUE;
|
snprintf (operands[op_num], 24, "%u", fld_val << 16);
|
snprintf (operands[op_num], 24, "%u", fld_val << 16);
|
break;
|
break;
|
|
|
case tic6x_coding_scst:
|
case tic6x_coding_scst:
|
operands_text[op_num] = TRUE;
|
operands_text[op_num] = TRUE;
|
signed_fld_val = (signed int) fld_val;
|
signed_fld_val = (signed int) fld_val;
|
signed_fld_val ^= (1 << (field->width - 1));
|
signed_fld_val ^= (1 << (field->width - 1));
|
signed_fld_val -= (1 << (field->width - 1));
|
signed_fld_val -= (1 << (field->width - 1));
|
snprintf (operands[op_num], 24, "%d", signed_fld_val);
|
snprintf (operands[op_num], 24, "%d", signed_fld_val);
|
break;
|
break;
|
|
|
case tic6x_coding_ucst_minus_one:
|
case tic6x_coding_ucst_minus_one:
|
operands_text[op_num] = TRUE;
|
operands_text[op_num] = TRUE;
|
snprintf (operands[op_num], 24, "%u", fld_val + 1);
|
snprintf (operands[op_num], 24, "%u", fld_val + 1);
|
break;
|
break;
|
|
|
case tic6x_coding_pcrel:
|
case tic6x_coding_pcrel:
|
case tic6x_coding_pcrel_half:
|
case tic6x_coding_pcrel_half:
|
signed_fld_val = (signed int) fld_val;
|
signed_fld_val = (signed int) fld_val;
|
signed_fld_val ^= (1 << (field->width - 1));
|
signed_fld_val ^= (1 << (field->width - 1));
|
signed_fld_val -= (1 << (field->width - 1));
|
signed_fld_val -= (1 << (field->width - 1));
|
if (fetch_packet_header_based
|
if (fetch_packet_header_based
|
&& enc->coding_method == tic6x_coding_pcrel_half)
|
&& enc->coding_method == tic6x_coding_pcrel_half)
|
signed_fld_val *= 2;
|
signed_fld_val *= 2;
|
else
|
else
|
signed_fld_val *= 4;
|
signed_fld_val *= 4;
|
operands_pcrel[op_num] = TRUE;
|
operands_pcrel[op_num] = TRUE;
|
operands_addresses[op_num] = fp_addr + signed_fld_val;
|
operands_addresses[op_num] = fp_addr + signed_fld_val;
|
break;
|
break;
|
|
|
case tic6x_coding_reg_shift:
|
case tic6x_coding_reg_shift:
|
fld_val <<= 1;
|
fld_val <<= 1;
|
/* Fall through. */
|
/* Fall through. */
|
case tic6x_coding_reg:
|
case tic6x_coding_reg:
|
switch (opc->operand_info[op_num].form)
|
switch (opc->operand_info[op_num].form)
|
{
|
{
|
case tic6x_operand_reg:
|
case tic6x_operand_reg:
|
operands_text[op_num] = TRUE;
|
operands_text[op_num] = TRUE;
|
snprintf (operands[op_num], 24, "%c%u",
|
snprintf (operands[op_num], 24, "%c%u",
|
(func_unit_side == 2 ? 'b' : 'a'), fld_val);
|
(func_unit_side == 2 ? 'b' : 'a'), fld_val);
|
break;
|
break;
|
|
|
case tic6x_operand_xreg:
|
case tic6x_operand_xreg:
|
operands_text[op_num] = TRUE;
|
operands_text[op_num] = TRUE;
|
snprintf (operands[op_num], 24, "%c%u",
|
snprintf (operands[op_num], 24, "%c%u",
|
(((func_unit_side == 2) ^ func_unit_cross)
|
(((func_unit_side == 2) ^ func_unit_cross)
|
? 'b'
|
? 'b'
|
: 'a'), fld_val);
|
: 'a'), fld_val);
|
break;
|
break;
|
|
|
case tic6x_operand_dreg:
|
case tic6x_operand_dreg:
|
operands_text[op_num] = TRUE;
|
operands_text[op_num] = TRUE;
|
snprintf (operands[op_num], 24, "%c%u",
|
snprintf (operands[op_num], 24, "%c%u",
|
(func_unit_data_side == 2 ? 'b' : 'a'),
|
(func_unit_data_side == 2 ? 'b' : 'a'),
|
fld_val);
|
fld_val);
|
break;
|
break;
|
|
|
case tic6x_operand_regpair:
|
case tic6x_operand_regpair:
|
operands_text[op_num] = TRUE;
|
operands_text[op_num] = TRUE;
|
if (fld_val & 1)
|
if (fld_val & 1)
|
operands_ok = FALSE;
|
operands_ok = FALSE;
|
snprintf (operands[op_num], 24, "%c%u:%c%u",
|
snprintf (operands[op_num], 24, "%c%u:%c%u",
|
(func_unit_side == 2 ? 'b' : 'a'), fld_val + 1,
|
(func_unit_side == 2 ? 'b' : 'a'), fld_val + 1,
|
(func_unit_side == 2 ? 'b' : 'a'), fld_val);
|
(func_unit_side == 2 ? 'b' : 'a'), fld_val);
|
break;
|
break;
|
|
|
case tic6x_operand_xregpair:
|
case tic6x_operand_xregpair:
|
operands_text[op_num] = TRUE;
|
operands_text[op_num] = TRUE;
|
if (fld_val & 1)
|
if (fld_val & 1)
|
operands_ok = FALSE;
|
operands_ok = FALSE;
|
snprintf (operands[op_num], 24, "%c%u:%c%u",
|
snprintf (operands[op_num], 24, "%c%u:%c%u",
|
(((func_unit_side == 2) ^ func_unit_cross)
|
(((func_unit_side == 2) ^ func_unit_cross)
|
? 'b'
|
? 'b'
|
: 'a'), fld_val + 1,
|
: 'a'), fld_val + 1,
|
(((func_unit_side == 2) ^ func_unit_cross)
|
(((func_unit_side == 2) ^ func_unit_cross)
|
? 'b'
|
? 'b'
|
: 'a'), fld_val);
|
: 'a'), fld_val);
|
break;
|
break;
|
|
|
case tic6x_operand_dregpair:
|
case tic6x_operand_dregpair:
|
operands_text[op_num] = TRUE;
|
operands_text[op_num] = TRUE;
|
if (fld_val & 1)
|
if (fld_val & 1)
|
operands_ok = FALSE;
|
operands_ok = FALSE;
|
snprintf (operands[op_num], 24, "%c%u:%c%u",
|
snprintf (operands[op_num], 24, "%c%u:%c%u",
|
(func_unit_data_side == 2 ? 'b' : 'a'),
|
(func_unit_data_side == 2 ? 'b' : 'a'),
|
fld_val + 1,
|
fld_val + 1,
|
(func_unit_data_side == 2 ? 'b' : 'a'),
|
(func_unit_data_side == 2 ? 'b' : 'a'),
|
fld_val);
|
fld_val);
|
break;
|
break;
|
|
|
case tic6x_operand_mem_deref:
|
case tic6x_operand_mem_deref:
|
operands_text[op_num] = TRUE;
|
operands_text[op_num] = TRUE;
|
snprintf (operands[op_num], 24, "*%c%u",
|
snprintf (operands[op_num], 24, "*%c%u",
|
(func_unit_side == 2 ? 'b' : 'a'), fld_val);
|
(func_unit_side == 2 ? 'b' : 'a'), fld_val);
|
break;
|
break;
|
|
|
case tic6x_operand_mem_short:
|
case tic6x_operand_mem_short:
|
case tic6x_operand_mem_ndw:
|
case tic6x_operand_mem_ndw:
|
mem_base_reg = fld_val;
|
mem_base_reg = fld_val;
|
mem_base_reg_known = TRUE;
|
mem_base_reg_known = TRUE;
|
break;
|
break;
|
|
|
default:
|
default:
|
abort ();
|
abort ();
|
}
|
}
|
break;
|
break;
|
|
|
case tic6x_coding_areg:
|
case tic6x_coding_areg:
|
switch (opc->operand_info[op_num].form)
|
switch (opc->operand_info[op_num].form)
|
{
|
{
|
case tic6x_operand_areg:
|
case tic6x_operand_areg:
|
operands_text[op_num] = TRUE;
|
operands_text[op_num] = TRUE;
|
snprintf (operands[op_num], 24, "b%u",
|
snprintf (operands[op_num], 24, "b%u",
|
fld_val ? 15u : 14u);
|
fld_val ? 15u : 14u);
|
break;
|
break;
|
|
|
case tic6x_operand_mem_long:
|
case tic6x_operand_mem_long:
|
mem_base_reg = fld_val ? 15u : 14u;
|
mem_base_reg = fld_val ? 15u : 14u;
|
mem_base_reg_known_long = TRUE;
|
mem_base_reg_known_long = TRUE;
|
break;
|
break;
|
|
|
default:
|
default:
|
abort ();
|
abort ();
|
}
|
}
|
break;
|
break;
|
|
|
case tic6x_coding_mem_offset:
|
case tic6x_coding_mem_offset:
|
case tic6x_coding_mem_offset_noscale:
|
case tic6x_coding_mem_offset_noscale:
|
mem_offset = fld_val;
|
mem_offset = fld_val;
|
mem_offset_known = TRUE;
|
mem_offset_known = TRUE;
|
break;
|
break;
|
|
|
case tic6x_coding_mem_mode:
|
case tic6x_coding_mem_mode:
|
mem_mode = fld_val;
|
mem_mode = fld_val;
|
mem_mode_known = TRUE;
|
mem_mode_known = TRUE;
|
break;
|
break;
|
|
|
case tic6x_coding_scaled:
|
case tic6x_coding_scaled:
|
mem_scaled = fld_val;
|
mem_scaled = fld_val;
|
mem_scaled_known = TRUE;
|
mem_scaled_known = TRUE;
|
break;
|
break;
|
|
|
case tic6x_coding_crlo:
|
case tic6x_coding_crlo:
|
crlo = fld_val;
|
crlo = fld_val;
|
crlo_known = TRUE;
|
crlo_known = TRUE;
|
break;
|
break;
|
|
|
case tic6x_coding_crhi:
|
case tic6x_coding_crhi:
|
crhi = fld_val;
|
crhi = fld_val;
|
crhi_known = TRUE;
|
crhi_known = TRUE;
|
break;
|
break;
|
|
|
case tic6x_coding_fstg:
|
case tic6x_coding_fstg:
|
case tic6x_coding_fcyc:
|
case tic6x_coding_fcyc:
|
if (!prev_sploop_found)
|
if (!prev_sploop_found)
|
{
|
{
|
bfd_vma search_fp_addr = fp_addr;
|
bfd_vma search_fp_addr = fp_addr;
|
bfd_vma search_fp_offset = fp_offset;
|
bfd_vma search_fp_offset = fp_offset;
|
bfd_boolean search_fp_header_based
|
bfd_boolean search_fp_header_based
|
= fetch_packet_header_based;
|
= fetch_packet_header_based;
|
tic6x_fetch_packet_header search_fp_header = header;
|
tic6x_fetch_packet_header search_fp_header = header;
|
unsigned char search_fp[32];
|
unsigned char search_fp[32];
|
unsigned int search_num_bits;
|
unsigned int search_num_bits;
|
unsigned int search_opcode;
|
unsigned int search_opcode;
|
unsigned int sploop_ii = 0;
|
unsigned int sploop_ii = 0;
|
int i;
|
int i;
|
|
|
memcpy (search_fp, fp, 32);
|
memcpy (search_fp, fp, 32);
|
|
|
/* To interpret these bits in an SPKERNEL
|
/* To interpret these bits in an SPKERNEL
|
instruction, we must find the previous
|
instruction, we must find the previous
|
SPLOOP-family instruction. It may come up to
|
SPLOOP-family instruction. It may come up to
|
48 execute packets earlier. */
|
48 execute packets earlier. */
|
for (i = 0; i < 48 * 8; i++)
|
for (i = 0; i < 48 * 8; i++)
|
{
|
{
|
/* Find the previous instruction. */
|
/* Find the previous instruction. */
|
if (search_fp_offset & 2)
|
if (search_fp_offset & 2)
|
search_fp_offset -= 2;
|
search_fp_offset -= 2;
|
else if (search_fp_offset >= 4)
|
else if (search_fp_offset >= 4)
|
{
|
{
|
if (search_fp_header_based
|
if (search_fp_header_based
|
&& (search_fp_header.word_compact
|
&& (search_fp_header.word_compact
|
[(search_fp_offset >> 2) - 1]))
|
[(search_fp_offset >> 2) - 1]))
|
search_fp_offset -= 2;
|
search_fp_offset -= 2;
|
else
|
else
|
search_fp_offset -= 4;
|
search_fp_offset -= 4;
|
}
|
}
|
else
|
else
|
{
|
{
|
search_fp_addr -= 32;
|
search_fp_addr -= 32;
|
status = info->read_memory_func (search_fp_addr,
|
status = info->read_memory_func (search_fp_addr,
|
search_fp,
|
search_fp,
|
32, info);
|
32, info);
|
if (status)
|
if (status)
|
/* No previous SPLOOP instruction. */
|
/* No previous SPLOOP instruction. */
|
break;
|
break;
|
search_fp_header_based
|
search_fp_header_based
|
= (tic6x_check_fetch_packet_header
|
= (tic6x_check_fetch_packet_header
|
(search_fp, &search_fp_header, info));
|
(search_fp, &search_fp_header, info));
|
if (search_fp_header_based)
|
if (search_fp_header_based)
|
search_fp_offset
|
search_fp_offset
|
= search_fp_header.word_compact[6] ? 26 : 24;
|
= search_fp_header.word_compact[6] ? 26 : 24;
|
else
|
else
|
search_fp_offset = 28;
|
search_fp_offset = 28;
|
}
|
}
|
|
|
/* Extract the previous instruction. */
|
/* Extract the previous instruction. */
|
if (search_fp_header_based)
|
if (search_fp_header_based)
|
search_num_bits
|
search_num_bits
|
= (search_fp_header.word_compact[search_fp_offset
|
= (search_fp_header.word_compact[search_fp_offset
|
>> 2]
|
>> 2]
|
? 16
|
? 16
|
: 32);
|
: 32);
|
else
|
else
|
search_num_bits = 32;
|
search_num_bits = 32;
|
if (search_num_bits == 16)
|
if (search_num_bits == 16)
|
{
|
{
|
if (info->endian == BFD_ENDIAN_LITTLE)
|
if (info->endian == BFD_ENDIAN_LITTLE)
|
search_opcode
|
search_opcode
|
= (tic6x_extract_16
|
= (tic6x_extract_16
|
(search_fp + search_fp_offset, info));
|
(search_fp + search_fp_offset, info));
|
else
|
else
|
search_opcode
|
search_opcode
|
= (tic6x_extract_16
|
= (tic6x_extract_16
|
(search_fp + (search_fp_offset ^ 2),
|
(search_fp + (search_fp_offset ^ 2),
|
info));
|
info));
|
}
|
}
|
else
|
else
|
search_opcode
|
search_opcode
|
= tic6x_extract_32 (search_fp + search_fp_offset,
|
= tic6x_extract_32 (search_fp + search_fp_offset,
|
info);
|
info);
|
|
|
/* Check whether it is an SPLOOP-family
|
/* Check whether it is an SPLOOP-family
|
instruction. */
|
instruction. */
|
if (search_num_bits == 32
|
if (search_num_bits == 32
|
&& ((search_opcode & 0x003ffffe) == 0x00038000
|
&& ((search_opcode & 0x003ffffe) == 0x00038000
|
|| (search_opcode & 0x003ffffe) == 0x0003a000
|
|| (search_opcode & 0x003ffffe) == 0x0003a000
|
|| ((search_opcode & 0x003ffffe)
|
|| ((search_opcode & 0x003ffffe)
|
== 0x0003e000)))
|
== 0x0003e000)))
|
{
|
{
|
prev_sploop_found = TRUE;
|
prev_sploop_found = TRUE;
|
sploop_ii = ((search_opcode >> 23) & 0x1f) + 1;
|
sploop_ii = ((search_opcode >> 23) & 0x1f) + 1;
|
}
|
}
|
else if (search_num_bits == 16
|
else if (search_num_bits == 16
|
&& (search_opcode & 0x3c7e) == 0x0c66)
|
&& (search_opcode & 0x3c7e) == 0x0c66)
|
{
|
{
|
prev_sploop_found = TRUE;
|
prev_sploop_found = TRUE;
|
sploop_ii
|
sploop_ii
|
= (((search_opcode >> 7) & 0x7)
|
= (((search_opcode >> 7) & 0x7)
|
| ((search_opcode >> 11) & 0x8)) + 1;
|
| ((search_opcode >> 11) & 0x8)) + 1;
|
}
|
}
|
if (prev_sploop_found)
|
if (prev_sploop_found)
|
{
|
{
|
if (sploop_ii <= 0)
|
if (sploop_ii <= 0)
|
abort ();
|
abort ();
|
else if (sploop_ii <= 1)
|
else if (sploop_ii <= 1)
|
fcyc_bits = 0;
|
fcyc_bits = 0;
|
else if (sploop_ii <= 2)
|
else if (sploop_ii <= 2)
|
fcyc_bits = 1;
|
fcyc_bits = 1;
|
else if (sploop_ii <= 4)
|
else if (sploop_ii <= 4)
|
fcyc_bits = 2;
|
fcyc_bits = 2;
|
else if (sploop_ii <= 8)
|
else if (sploop_ii <= 8)
|
fcyc_bits = 3;
|
fcyc_bits = 3;
|
else if (sploop_ii <= 14)
|
else if (sploop_ii <= 14)
|
fcyc_bits = 4;
|
fcyc_bits = 4;
|
else
|
else
|
prev_sploop_found = FALSE;
|
prev_sploop_found = FALSE;
|
}
|
}
|
if (prev_sploop_found)
|
if (prev_sploop_found)
|
break;
|
break;
|
}
|
}
|
}
|
}
|
if (!prev_sploop_found)
|
if (!prev_sploop_found)
|
{
|
{
|
operands_ok = FALSE;
|
operands_ok = FALSE;
|
operands_text[op_num] = TRUE;
|
operands_text[op_num] = TRUE;
|
break;
|
break;
|
}
|
}
|
if (fcyc_bits > field->width)
|
if (fcyc_bits > field->width)
|
abort ();
|
abort ();
|
if (enc->coding_method == tic6x_coding_fstg)
|
if (enc->coding_method == tic6x_coding_fstg)
|
{
|
{
|
operands_text[op_num] = TRUE;
|
operands_text[op_num] = TRUE;
|
snprintf (operands[op_num], 24, "%u",
|
snprintf (operands[op_num], 24, "%u",
|
fld_val >> fcyc_bits);
|
fld_val >> fcyc_bits);
|
}
|
}
|
else
|
else
|
{
|
{
|
operands_text[op_num] = TRUE;
|
operands_text[op_num] = TRUE;
|
snprintf (operands[op_num], 24, "%u",
|
snprintf (operands[op_num], 24, "%u",
|
fld_val & ((1 << fcyc_bits) - 1));
|
fld_val & ((1 << fcyc_bits) - 1));
|
}
|
}
|
break;
|
break;
|
|
|
case tic6x_coding_spmask:
|
case tic6x_coding_spmask:
|
if (fld_val == 0)
|
if (fld_val == 0)
|
spmask_skip_operand = TRUE;
|
spmask_skip_operand = TRUE;
|
else
|
else
|
{
|
{
|
char *p;
|
char *p;
|
unsigned int i;
|
unsigned int i;
|
|
|
operands_text[op_num] = TRUE;
|
operands_text[op_num] = TRUE;
|
p = operands[op_num];
|
p = operands[op_num];
|
for (i = 0; i < 8; i++)
|
for (i = 0; i < 8; i++)
|
if (fld_val & (1 << i))
|
if (fld_val & (1 << i))
|
{
|
{
|
*p++ = "LSDM"[i/2];
|
*p++ = "LSDM"[i/2];
|
*p++ = '1' + (i & 1);
|
*p++ = '1' + (i & 1);
|
*p++ = ',';
|
*p++ = ',';
|
}
|
}
|
p[-1] = 0;
|
p[-1] = 0;
|
}
|
}
|
break;
|
break;
|
|
|
case tic6x_coding_fu:
|
case tic6x_coding_fu:
|
case tic6x_coding_data_fu:
|
case tic6x_coding_data_fu:
|
case tic6x_coding_xpath:
|
case tic6x_coding_xpath:
|
/* Don't relate to operands, so operand number is
|
/* Don't relate to operands, so operand number is
|
meaningless. */
|
meaningless. */
|
break;
|
break;
|
|
|
default:
|
default:
|
abort ();
|
abort ();
|
}
|
}
|
|
|
if (mem_base_reg_known_long && mem_offset_known_long)
|
if (mem_base_reg_known_long && mem_offset_known_long)
|
{
|
{
|
if (operands_text[op_num] || operands_pcrel[op_num])
|
if (operands_text[op_num] || operands_pcrel[op_num])
|
abort ();
|
abort ();
|
operands_text[op_num] = TRUE;
|
operands_text[op_num] = TRUE;
|
snprintf (operands[op_num], 24, "*+b%u(%u)", mem_base_reg,
|
snprintf (operands[op_num], 24, "*+b%u(%u)", mem_base_reg,
|
mem_offset * opc->operand_info[op_num].size);
|
mem_offset * opc->operand_info[op_num].size);
|
}
|
}
|
|
|
if (mem_base_reg_known && mem_offset_known && mem_mode_known
|
if (mem_base_reg_known && mem_offset_known && mem_mode_known
|
&& (mem_scaled_known
|
&& (mem_scaled_known
|
|| (opc->operand_info[op_num].form
|
|| (opc->operand_info[op_num].form
|
!= tic6x_operand_mem_ndw)))
|
!= tic6x_operand_mem_ndw)))
|
{
|
{
|
char side;
|
char side;
|
char base[4];
|
char base[4];
|
bfd_boolean offset_is_reg;
|
bfd_boolean offset_is_reg;
|
bfd_boolean offset_scaled;
|
bfd_boolean offset_scaled;
|
char offset[4];
|
char offset[4];
|
char offsetp[6];
|
char offsetp[6];
|
|
|
if (operands_text[op_num] || operands_pcrel[op_num])
|
if (operands_text[op_num] || operands_pcrel[op_num])
|
abort ();
|
abort ();
|
|
|
side = func_unit_side == 2 ? 'b' : 'a';
|
side = func_unit_side == 2 ? 'b' : 'a';
|
snprintf (base, 4, "%c%u", side, mem_base_reg);
|
snprintf (base, 4, "%c%u", side, mem_base_reg);
|
|
|
offset_is_reg = ((mem_mode & 4) ? TRUE : FALSE);
|
offset_is_reg = ((mem_mode & 4) ? TRUE : FALSE);
|
if (offset_is_reg)
|
if (offset_is_reg)
|
{
|
{
|
snprintf (offset, 4, "%c%u", side, mem_offset);
|
snprintf (offset, 4, "%c%u", side, mem_offset);
|
if (opc->operand_info[op_num].form
|
if (opc->operand_info[op_num].form
|
== tic6x_operand_mem_ndw)
|
== tic6x_operand_mem_ndw)
|
offset_scaled = mem_scaled ? TRUE : FALSE;
|
offset_scaled = mem_scaled ? TRUE : FALSE;
|
else
|
else
|
offset_scaled = TRUE;
|
offset_scaled = TRUE;
|
}
|
}
|
else
|
else
|
{
|
{
|
if (opc->operand_info[op_num].form
|
if (opc->operand_info[op_num].form
|
== tic6x_operand_mem_ndw)
|
== tic6x_operand_mem_ndw)
|
{
|
{
|
offset_scaled = mem_scaled ? TRUE : FALSE;
|
offset_scaled = mem_scaled ? TRUE : FALSE;
|
snprintf (offset, 4, "%u", mem_offset);
|
snprintf (offset, 4, "%u", mem_offset);
|
}
|
}
|
else
|
else
|
{
|
{
|
offset_scaled = FALSE;
|
offset_scaled = FALSE;
|
snprintf (offset, 4, "%u",
|
snprintf (offset, 4, "%u",
|
(mem_offset
|
(mem_offset
|
* opc->operand_info[op_num].size));
|
* opc->operand_info[op_num].size));
|
}
|
}
|
}
|
}
|
|
|
if (offset_scaled)
|
if (offset_scaled)
|
snprintf (offsetp, 6, "[%s]", offset);
|
snprintf (offsetp, 6, "[%s]", offset);
|
else
|
else
|
snprintf (offsetp, 6, "(%s)", offset);
|
snprintf (offsetp, 6, "(%s)", offset);
|
|
|
operands_text[op_num] = TRUE;
|
operands_text[op_num] = TRUE;
|
switch (mem_mode & ~4u)
|
switch (mem_mode & ~4u)
|
{
|
{
|
case 0:
|
case 0:
|
snprintf (operands[op_num], 24, "*-%s%s", base, offsetp);
|
snprintf (operands[op_num], 24, "*-%s%s", base, offsetp);
|
break;
|
break;
|
|
|
case 1:
|
case 1:
|
snprintf (operands[op_num], 24, "*+%s%s", base, offsetp);
|
snprintf (operands[op_num], 24, "*+%s%s", base, offsetp);
|
break;
|
break;
|
|
|
case 2:
|
case 2:
|
case 3:
|
case 3:
|
operands_ok = FALSE;
|
operands_ok = FALSE;
|
break;
|
break;
|
|
|
case 8:
|
case 8:
|
snprintf (operands[op_num], 24, "*--%s%s", base,
|
snprintf (operands[op_num], 24, "*--%s%s", base,
|
offsetp);
|
offsetp);
|
break;
|
break;
|
|
|
case 9:
|
case 9:
|
snprintf (operands[op_num], 24, "*++%s%s", base,
|
snprintf (operands[op_num], 24, "*++%s%s", base,
|
offsetp);
|
offsetp);
|
break;
|
break;
|
|
|
case 10:
|
case 10:
|
snprintf (operands[op_num], 24, "*%s--%s", base,
|
snprintf (operands[op_num], 24, "*%s--%s", base,
|
offsetp);
|
offsetp);
|
break;
|
break;
|
|
|
case 11:
|
case 11:
|
snprintf (operands[op_num], 24, "*%s++%s", base,
|
snprintf (operands[op_num], 24, "*%s++%s", base,
|
offsetp);
|
offsetp);
|
break;
|
break;
|
|
|
default:
|
default:
|
abort ();
|
abort ();
|
}
|
}
|
}
|
}
|
|
|
if (crlo_known && crhi_known)
|
if (crlo_known && crhi_known)
|
{
|
{
|
tic6x_rw rw;
|
tic6x_rw rw;
|
tic6x_ctrl_id crid;
|
tic6x_ctrl_id crid;
|
|
|
if (operands_text[op_num] || operands_pcrel[op_num])
|
if (operands_text[op_num] || operands_pcrel[op_num])
|
abort ();
|
abort ();
|
|
|
rw = opc->operand_info[op_num].rw;
|
rw = opc->operand_info[op_num].rw;
|
if (rw != tic6x_rw_read
|
if (rw != tic6x_rw_read
|
&& rw != tic6x_rw_write)
|
&& rw != tic6x_rw_write)
|
abort ();
|
abort ();
|
|
|
for (crid = 0; crid < tic6x_ctrl_max; crid++)
|
for (crid = 0; crid < tic6x_ctrl_max; crid++)
|
{
|
{
|
if (crlo == tic6x_ctrl_table[crid].crlo
|
if (crlo == tic6x_ctrl_table[crid].crlo
|
&& (crhi & tic6x_ctrl_table[crid].crhi_mask) == 0
|
&& (crhi & tic6x_ctrl_table[crid].crhi_mask) == 0
|
&& (rw == tic6x_rw_read
|
&& (rw == tic6x_rw_read
|
? (tic6x_ctrl_table[crid].rw == tic6x_rw_read
|
? (tic6x_ctrl_table[crid].rw == tic6x_rw_read
|
|| (tic6x_ctrl_table[crid].rw
|
|| (tic6x_ctrl_table[crid].rw
|
== tic6x_rw_read_write))
|
== tic6x_rw_read_write))
|
: (tic6x_ctrl_table[crid].rw == tic6x_rw_write
|
: (tic6x_ctrl_table[crid].rw == tic6x_rw_write
|
|| (tic6x_ctrl_table[crid].rw
|
|| (tic6x_ctrl_table[crid].rw
|
== tic6x_rw_read_write))))
|
== tic6x_rw_read_write))))
|
break;
|
break;
|
}
|
}
|
if (crid == tic6x_ctrl_max)
|
if (crid == tic6x_ctrl_max)
|
{
|
{
|
operands_text[op_num] = TRUE;
|
operands_text[op_num] = TRUE;
|
operands_ok = FALSE;
|
operands_ok = FALSE;
|
}
|
}
|
else
|
else
|
{
|
{
|
operands_text[op_num] = TRUE;
|
operands_text[op_num] = TRUE;
|
snprintf (operands[op_num], 24, "%s",
|
snprintf (operands[op_num], 24, "%s",
|
tic6x_ctrl_table[crid].name);
|
tic6x_ctrl_table[crid].name);
|
}
|
}
|
}
|
}
|
|
|
if (operands_text[op_num] || operands_pcrel[op_num]
|
if (operands_text[op_num] || operands_pcrel[op_num]
|
|| spmask_skip_operand)
|
|| spmask_skip_operand)
|
break;
|
break;
|
}
|
}
|
if (spmask_skip_operand)
|
if (spmask_skip_operand)
|
{
|
{
|
/* SPMASK operands are only valid as the single operand
|
/* SPMASK operands are only valid as the single operand
|
in the opcode table. */
|
in the opcode table. */
|
if (num_operands != 1)
|
if (num_operands != 1)
|
abort ();
|
abort ();
|
num_operands = 0;
|
num_operands = 0;
|
break;
|
break;
|
}
|
}
|
/* The operand must by now have been decoded. */
|
/* The operand must by now have been decoded. */
|
if (!operands_text[op_num] && !operands_pcrel[op_num])
|
if (!operands_text[op_num] && !operands_pcrel[op_num])
|
abort ();
|
abort ();
|
}
|
}
|
|
|
if (!operands_ok)
|
if (!operands_ok)
|
continue;
|
continue;
|
|
|
info->bytes_per_chunk = num_bits / 8;
|
info->bytes_per_chunk = num_bits / 8;
|
info->fprintf_func (info->stream, "%s%s%s%s", parallel, cond,
|
info->fprintf_func (info->stream, "%s%s%s%s", parallel, cond,
|
opc->name, func_unit);
|
opc->name, func_unit);
|
for (op_num = 0; op_num < num_operands; op_num++)
|
for (op_num = 0; op_num < num_operands; op_num++)
|
{
|
{
|
info->fprintf_func (info->stream, "%c", (op_num == 0 ? ' ' : ','));
|
info->fprintf_func (info->stream, "%c", (op_num == 0 ? ' ' : ','));
|
if (operands_pcrel[op_num])
|
if (operands_pcrel[op_num])
|
info->print_address_func (operands_addresses[op_num], info);
|
info->print_address_func (operands_addresses[op_num], info);
|
else
|
else
|
info->fprintf_func (info->stream, "%s", operands[op_num]);
|
info->fprintf_func (info->stream, "%s", operands[op_num]);
|
}
|
}
|
if (fetch_packet_header_based && header.prot)
|
if (fetch_packet_header_based && header.prot)
|
info->fprintf_func (info->stream, " || nop 5");
|
info->fprintf_func (info->stream, " || nop 5");
|
|
|
return num_bits / 8;
|
return num_bits / 8;
|
}
|
}
|
|
|
info->bytes_per_chunk = num_bits / 8;
|
info->bytes_per_chunk = num_bits / 8;
|
info->fprintf_func (info->stream, "<undefined instruction 0x%.*x>",
|
info->fprintf_func (info->stream, "<undefined instruction 0x%.*x>",
|
(int) num_bits / 4, opcode);
|
(int) num_bits / 4, opcode);
|
return num_bits / 8;
|
return num_bits / 8;
|
}
|
}
|
|
|
