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[/] [openrisc/] [trunk/] [gnu-stable/] [gdb-7.2/] [sim/] [common/] [cgen-utils.c] - Diff between revs 835 and 841

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/* Support code for various pieces of CGEN simulators.
/* Support code for various pieces of CGEN simulators.
   Copyright (C) 1996, 1997, 1998, 1999, 2007, 2008, 2009, 2010
   Copyright (C) 1996, 1997, 1998, 1999, 2007, 2008, 2009, 2010
   Free Software Foundation, Inc.
   Free Software Foundation, Inc.
   Contributed by Cygnus Support.
   Contributed by Cygnus Support.
 
 
This file is part of GDB, the GNU debugger.
This file is part of GDB, the GNU debugger.
 
 
This program is free software; you can redistribute it and/or modify
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
(at your option) any later version.
 
 
This program is distributed in the hope that it will be useful,
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.
GNU General Public License for more details.
 
 
You should have received a copy of the GNU General Public License
You should have received a copy of the GNU General Public License
along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
 
 
#include "bfd.h"
#include "bfd.h"
#include "sim-main.h"
#include "sim-main.h"
#include "dis-asm.h"
#include "dis-asm.h"
 
 
#define MEMOPS_DEFINE_INLINE
#define MEMOPS_DEFINE_INLINE
#include "cgen-mem.h"
#include "cgen-mem.h"
 
 
#define SEMOPS_DEFINE_INLINE
#define SEMOPS_DEFINE_INLINE
#include "cgen-ops.h"
#include "cgen-ops.h"
 
 
#undef min
#undef min
#define min(a,b) ((a) < (b) ? (a) : (b))
#define min(a,b) ((a) < (b) ? (a) : (b))
 
 
const char *mode_names[] = {
const char *mode_names[] = {
  "VOID",
  "VOID",
  "BI",
  "BI",
  "QI",
  "QI",
  "HI",
  "HI",
  "SI",
  "SI",
  "DI",
  "DI",
  "UQI",
  "UQI",
  "UHI",
  "UHI",
  "USI",
  "USI",
  "UDI",
  "UDI",
  "SF",
  "SF",
  "DF",
  "DF",
  "XF",
  "XF",
  "TF",
  "TF",
  0, /* MODE_TARGET_MAX */
  0, /* MODE_TARGET_MAX */
  "INT",
  "INT",
  "UINT",
  "UINT",
  "PTR"
  "PTR"
};
};
 
 
/* Opcode table for virtual insns used by the simulator.  */
/* Opcode table for virtual insns used by the simulator.  */
 
 
#define V CGEN_ATTR_MASK (CGEN_INSN_VIRTUAL)
#define V CGEN_ATTR_MASK (CGEN_INSN_VIRTUAL)
 
 
static const CGEN_IBASE virtual_insn_entries[] =
static const CGEN_IBASE virtual_insn_entries[] =
{
{
  {
  {
    VIRTUAL_INSN_X_INVALID, "--invalid--", NULL, 0, { V, { 0 } }
    VIRTUAL_INSN_X_INVALID, "--invalid--", NULL, 0, { V, { 0 } }
  },
  },
  {
  {
    VIRTUAL_INSN_X_BEFORE, "--before--", NULL, 0, { V, { 0 } }
    VIRTUAL_INSN_X_BEFORE, "--before--", NULL, 0, { V, { 0 } }
  },
  },
  {
  {
    VIRTUAL_INSN_X_AFTER, "--after--", NULL, 0, { V, { 0 } }
    VIRTUAL_INSN_X_AFTER, "--after--", NULL, 0, { V, { 0 } }
  },
  },
  {
  {
    VIRTUAL_INSN_X_BEGIN, "--begin--", NULL, 0, { V, { 0 } }
    VIRTUAL_INSN_X_BEGIN, "--begin--", NULL, 0, { V, { 0 } }
  },
  },
  {
  {
    VIRTUAL_INSN_X_CHAIN, "--chain--", NULL, 0, { V, { 0 } }
    VIRTUAL_INSN_X_CHAIN, "--chain--", NULL, 0, { V, { 0 } }
  },
  },
  {
  {
    VIRTUAL_INSN_X_CTI_CHAIN, "--cti-chain--", NULL, 0, { V, { 0 } }
    VIRTUAL_INSN_X_CTI_CHAIN, "--cti-chain--", NULL, 0, { V, { 0 } }
  }
  }
};
};
 
 
#undef V
#undef V
 
 
const CGEN_INSN cgen_virtual_insn_table[] =
const CGEN_INSN cgen_virtual_insn_table[] =
{
{
  { & virtual_insn_entries[0] },
  { & virtual_insn_entries[0] },
  { & virtual_insn_entries[1] },
  { & virtual_insn_entries[1] },
  { & virtual_insn_entries[2] },
  { & virtual_insn_entries[2] },
  { & virtual_insn_entries[3] },
  { & virtual_insn_entries[3] },
  { & virtual_insn_entries[4] },
  { & virtual_insn_entries[4] },
  { & virtual_insn_entries[5] }
  { & virtual_insn_entries[5] }
};
};
 
 
/* Initialize cgen things.
/* Initialize cgen things.
   This is called after sim_post_argv_init.  */
   This is called after sim_post_argv_init.  */
 
 
void
void
cgen_init (SIM_DESC sd)
cgen_init (SIM_DESC sd)
{
{
  int i, c;
  int i, c;
 
 
  /* If no profiling or tracing has been enabled, run in fast mode.  */
  /* If no profiling or tracing has been enabled, run in fast mode.  */
  {
  {
    int run_fast_p = 1;
    int run_fast_p = 1;
 
 
    for (c = 0; c < MAX_NR_PROCESSORS; ++c)
    for (c = 0; c < MAX_NR_PROCESSORS; ++c)
      {
      {
        SIM_CPU *cpu = STATE_CPU (sd, c);
        SIM_CPU *cpu = STATE_CPU (sd, c);
 
 
        for (i = 0; i < MAX_PROFILE_VALUES; ++i)
        for (i = 0; i < MAX_PROFILE_VALUES; ++i)
          if (CPU_PROFILE_FLAGS (cpu) [i])
          if (CPU_PROFILE_FLAGS (cpu) [i])
            {
            {
              run_fast_p = 0;
              run_fast_p = 0;
              break;
              break;
            }
            }
        for (i = 0; i < MAX_TRACE_VALUES; ++i)
        for (i = 0; i < MAX_TRACE_VALUES; ++i)
          if (CPU_TRACE_FLAGS (cpu) [i])
          if (CPU_TRACE_FLAGS (cpu) [i])
            {
            {
              run_fast_p = 0;
              run_fast_p = 0;
              break;
              break;
            }
            }
        if (! run_fast_p)
        if (! run_fast_p)
          break;
          break;
      }
      }
    STATE_RUN_FAST_P (sd) = run_fast_p;
    STATE_RUN_FAST_P (sd) = run_fast_p;
  }
  }
}
}
 
 
/* Return the name of insn number I.  */
/* Return the name of insn number I.  */
 
 
const char *
const char *
cgen_insn_name (SIM_CPU *cpu, int i)
cgen_insn_name (SIM_CPU *cpu, int i)
{
{
  return CGEN_INSN_NAME ((* CPU_GET_IDATA (cpu)) ((cpu), (i)));
  return CGEN_INSN_NAME ((* CPU_GET_IDATA (cpu)) ((cpu), (i)));
}
}
 
 
/* Return the maximum number of extra bytes required for a SIM_CPU struct.  */
/* Return the maximum number of extra bytes required for a SIM_CPU struct.  */
 
 
int
int
cgen_cpu_max_extra_bytes (void)
cgen_cpu_max_extra_bytes (void)
{
{
  int i;
  int i;
  int extra = 0;
  int extra = 0;
 
 
  for (i = 0; sim_machs[i] != 0; ++i)
  for (i = 0; sim_machs[i] != 0; ++i)
    {
    {
      int size = IMP_PROPS_SIM_CPU_SIZE (MACH_IMP_PROPS (sim_machs[i]));
      int size = IMP_PROPS_SIM_CPU_SIZE (MACH_IMP_PROPS (sim_machs[i]));
      if (size > extra)
      if (size > extra)
        extra = size;
        extra = size;
    }
    }
  return extra;
  return extra;
}
}


#ifdef DI_FN_SUPPORT
#ifdef DI_FN_SUPPORT
 
 
DI
DI
make_struct_di (hi, lo)
make_struct_di (hi, lo)
     SI hi, lo;
     SI hi, lo;
{
{
  DI result;
  DI result;
 
 
  result.hi = hi;
  result.hi = hi;
  result.lo = lo;
  result.lo = lo;
  return result;
  return result;
}
}
 
 
DI
DI
ANDDI (a, b)
ANDDI (a, b)
     DI a, b;
     DI a, b;
{
{
  SI ahi = GETHIDI (a);
  SI ahi = GETHIDI (a);
  SI alo = GETLODI (a);
  SI alo = GETLODI (a);
  SI bhi = GETHIDI (b);
  SI bhi = GETHIDI (b);
  SI blo = GETLODI (b);
  SI blo = GETLODI (b);
  return MAKEDI (ahi & bhi, alo & blo);
  return MAKEDI (ahi & bhi, alo & blo);
}
}
 
 
DI
DI
ORDI (a, b)
ORDI (a, b)
     DI a, b;
     DI a, b;
{
{
  SI ahi = GETHIDI (a);
  SI ahi = GETHIDI (a);
  SI alo = GETLODI (a);
  SI alo = GETLODI (a);
  SI bhi = GETHIDI (b);
  SI bhi = GETHIDI (b);
  SI blo = GETLODI (b);
  SI blo = GETLODI (b);
  return MAKEDI (ahi | bhi, alo | blo);
  return MAKEDI (ahi | bhi, alo | blo);
}
}
 
 
DI
DI
ADDDI (a, b)
ADDDI (a, b)
     DI a, b;
     DI a, b;
{
{
  USI ahi = GETHIDI (a);
  USI ahi = GETHIDI (a);
  USI alo = GETLODI (a);
  USI alo = GETLODI (a);
  USI bhi = GETHIDI (b);
  USI bhi = GETHIDI (b);
  USI blo = GETLODI (b);
  USI blo = GETLODI (b);
  USI x = alo + blo;
  USI x = alo + blo;
  return MAKEDI (ahi + bhi + (x < alo), x);
  return MAKEDI (ahi + bhi + (x < alo), x);
}
}
 
 
DI
DI
MULDI (a, b)
MULDI (a, b)
     DI a, b;
     DI a, b;
{
{
  USI ahi = GETHIDI (a);
  USI ahi = GETHIDI (a);
  USI alo = GETLODI (a);
  USI alo = GETLODI (a);
  USI bhi = GETHIDI (b);
  USI bhi = GETHIDI (b);
  USI blo = GETLODI (b);
  USI blo = GETLODI (b);
  USI rhi,rlo;
  USI rhi,rlo;
  USI x0, x1, x2, x3;
  USI x0, x1, x2, x3;
 
 
  x0 = alo * blo;
  x0 = alo * blo;
  x1 = alo * bhi;
  x1 = alo * bhi;
  x2 = ahi * blo;
  x2 = ahi * blo;
  x3 = ahi * bhi;
  x3 = ahi * bhi;
 
 
#define SI_TYPE_SIZE 32
#define SI_TYPE_SIZE 32
#define BITS4 (SI_TYPE_SIZE / 4)
#define BITS4 (SI_TYPE_SIZE / 4)
#define ll_B (1L << (SI_TYPE_SIZE / 2))
#define ll_B (1L << (SI_TYPE_SIZE / 2))
#define ll_lowpart(t) ((USI) (t) % ll_B)
#define ll_lowpart(t) ((USI) (t) % ll_B)
#define ll_highpart(t) ((USI) (t) / ll_B)
#define ll_highpart(t) ((USI) (t) / ll_B)
  x1 += ll_highpart (x0);       /* this can't give carry */
  x1 += ll_highpart (x0);       /* this can't give carry */
  x1 += x2;                     /* but this indeed can */
  x1 += x2;                     /* but this indeed can */
  if (x1 < x2)                  /* did we get it? */
  if (x1 < x2)                  /* did we get it? */
    x3 += ll_B;                 /* yes, add it in the proper pos. */
    x3 += ll_B;                 /* yes, add it in the proper pos. */
 
 
  rhi = x3 + ll_highpart (x1);
  rhi = x3 + ll_highpart (x1);
  rlo = ll_lowpart (x1) * ll_B + ll_lowpart (x0);
  rlo = ll_lowpart (x1) * ll_B + ll_lowpart (x0);
  return MAKEDI (rhi + (alo * bhi) + (ahi * blo), rlo);
  return MAKEDI (rhi + (alo * bhi) + (ahi * blo), rlo);
}
}
 
 
DI
DI
SHLDI (val, shift)
SHLDI (val, shift)
     DI val;
     DI val;
     SI shift;
     SI shift;
{
{
  USI hi = GETHIDI (val);
  USI hi = GETHIDI (val);
  USI lo = GETLODI (val);
  USI lo = GETLODI (val);
  /* FIXME: Need to worry about shift < 0 || shift >= 32.  */
  /* FIXME: Need to worry about shift < 0 || shift >= 32.  */
  return MAKEDI ((hi << shift) | (lo >> (32 - shift)), lo << shift);
  return MAKEDI ((hi << shift) | (lo >> (32 - shift)), lo << shift);
}
}
 
 
DI
DI
SLADI (val, shift)
SLADI (val, shift)
     DI val;
     DI val;
     SI shift;
     SI shift;
{
{
  SI hi = GETHIDI (val);
  SI hi = GETHIDI (val);
  USI lo = GETLODI (val);
  USI lo = GETLODI (val);
  /* FIXME: Need to worry about shift < 0 || shift >= 32.  */
  /* FIXME: Need to worry about shift < 0 || shift >= 32.  */
  return MAKEDI ((hi << shift) | (lo >> (32 - shift)), lo << shift);
  return MAKEDI ((hi << shift) | (lo >> (32 - shift)), lo << shift);
}
}
 
 
DI
DI
SRADI (val, shift)
SRADI (val, shift)
     DI val;
     DI val;
     SI shift;
     SI shift;
{
{
  SI hi = GETHIDI (val);
  SI hi = GETHIDI (val);
  USI lo = GETLODI (val);
  USI lo = GETLODI (val);
  /* We use SRASI because the result is implementation defined if hi < 0.  */
  /* We use SRASI because the result is implementation defined if hi < 0.  */
  /* FIXME: Need to worry about shift < 0 || shift >= 32.  */
  /* FIXME: Need to worry about shift < 0 || shift >= 32.  */
  return MAKEDI (SRASI (hi, shift), (hi << (32 - shift)) | (lo >> shift));
  return MAKEDI (SRASI (hi, shift), (hi << (32 - shift)) | (lo >> shift));
}
}
 
 
int
int
GEDI (a, b)
GEDI (a, b)
     DI a, b;
     DI a, b;
{
{
  SI ahi = GETHIDI (a);
  SI ahi = GETHIDI (a);
  USI alo = GETLODI (a);
  USI alo = GETLODI (a);
  SI bhi = GETHIDI (b);
  SI bhi = GETHIDI (b);
  USI blo = GETLODI (b);
  USI blo = GETLODI (b);
  if (ahi > bhi)
  if (ahi > bhi)
    return 1;
    return 1;
  if (ahi == bhi)
  if (ahi == bhi)
    return alo >= blo;
    return alo >= blo;
  return 0;
  return 0;
}
}
 
 
int
int
LEDI (a, b)
LEDI (a, b)
     DI a, b;
     DI a, b;
{
{
  SI ahi = GETHIDI (a);
  SI ahi = GETHIDI (a);
  USI alo = GETLODI (a);
  USI alo = GETLODI (a);
  SI bhi = GETHIDI (b);
  SI bhi = GETHIDI (b);
  USI blo = GETLODI (b);
  USI blo = GETLODI (b);
  if (ahi < bhi)
  if (ahi < bhi)
    return 1;
    return 1;
  if (ahi == bhi)
  if (ahi == bhi)
    return alo <= blo;
    return alo <= blo;
  return 0;
  return 0;
}
}
 
 
DI
DI
CONVHIDI (val)
CONVHIDI (val)
     HI val;
     HI val;
{
{
  if (val < 0)
  if (val < 0)
    return MAKEDI (-1, val);
    return MAKEDI (-1, val);
  else
  else
    return MAKEDI (0, val);
    return MAKEDI (0, val);
}
}
 
 
DI
DI
CONVSIDI (val)
CONVSIDI (val)
     SI val;
     SI val;
{
{
  if (val < 0)
  if (val < 0)
    return MAKEDI (-1, val);
    return MAKEDI (-1, val);
  else
  else
    return MAKEDI (0, val);
    return MAKEDI (0, val);
}
}
 
 
SI
SI
CONVDISI (val)
CONVDISI (val)
     DI val;
     DI val;
{
{
  return GETLODI (val);
  return GETLODI (val);
}
}
 
 
#endif /* DI_FN_SUPPORT */
#endif /* DI_FN_SUPPORT */


QI
QI
RORQI (val, shift)
RORQI (val, shift)
     QI  val;
     QI  val;
     int shift;
     int shift;
{
{
  if (shift != 0)
  if (shift != 0)
    {
    {
      int remain = 8 - shift;
      int remain = 8 - shift;
      int mask = (1 << shift) - 1;
      int mask = (1 << shift) - 1;
      QI result = (val & mask) << remain;
      QI result = (val & mask) << remain;
      mask = (1 << remain) - 1;
      mask = (1 << remain) - 1;
      result |= (val >> shift) & mask;
      result |= (val >> shift) & mask;
      return result;
      return result;
    }
    }
  return val;
  return val;
}
}
 
 
QI
QI
ROLQI (val, shift)
ROLQI (val, shift)
     QI  val;
     QI  val;
     int shift;
     int shift;
{
{
  if (shift != 0)
  if (shift != 0)
    {
    {
      int remain = 8 - shift;
      int remain = 8 - shift;
      int mask = (1 << remain) - 1;
      int mask = (1 << remain) - 1;
      QI result = (val & mask) << shift;
      QI result = (val & mask) << shift;
      mask = (1 << shift) - 1;
      mask = (1 << shift) - 1;
      result |= (val >> remain) & mask;
      result |= (val >> remain) & mask;
      return result;
      return result;
    }
    }
  return val;
  return val;
}
}
 
 
HI
HI
RORHI (val, shift)
RORHI (val, shift)
     HI  val;
     HI  val;
     int shift;
     int shift;
{
{
  if (shift != 0)
  if (shift != 0)
    {
    {
      int remain = 16 - shift;
      int remain = 16 - shift;
      int mask = (1 << shift) - 1;
      int mask = (1 << shift) - 1;
      HI result = (val & mask) << remain;
      HI result = (val & mask) << remain;
      mask = (1 << remain) - 1;
      mask = (1 << remain) - 1;
      result |= (val >> shift) & mask;
      result |= (val >> shift) & mask;
      return result;
      return result;
    }
    }
  return val;
  return val;
}
}
 
 
HI
HI
ROLHI (val, shift)
ROLHI (val, shift)
     HI  val;
     HI  val;
     int shift;
     int shift;
{
{
  if (shift != 0)
  if (shift != 0)
    {
    {
      int remain = 16 - shift;
      int remain = 16 - shift;
      int mask = (1 << remain) - 1;
      int mask = (1 << remain) - 1;
      HI result = (val & mask) << shift;
      HI result = (val & mask) << shift;
      mask = (1 << shift) - 1;
      mask = (1 << shift) - 1;
      result |= (val >> remain) & mask;
      result |= (val >> remain) & mask;
      return result;
      return result;
    }
    }
  return val;
  return val;
}
}
 
 
SI
SI
RORSI (val, shift)
RORSI (val, shift)
     SI  val;
     SI  val;
     int shift;
     int shift;
{
{
  if (shift != 0)
  if (shift != 0)
    {
    {
      int remain = 32 - shift;
      int remain = 32 - shift;
      int mask = (1 << shift) - 1;
      int mask = (1 << shift) - 1;
      SI result = (val & mask) << remain;
      SI result = (val & mask) << remain;
      mask = (1 << remain) - 1;
      mask = (1 << remain) - 1;
      result |= (val >> shift) & mask;
      result |= (val >> shift) & mask;
      return result;
      return result;
    }
    }
  return val;
  return val;
}
}
 
 
SI
SI
ROLSI (val, shift)
ROLSI (val, shift)
     SI  val;
     SI  val;
     int shift;
     int shift;
{
{
  if (shift != 0)
  if (shift != 0)
    {
    {
      int remain = 32 - shift;
      int remain = 32 - shift;
      int mask = (1 << remain) - 1;
      int mask = (1 << remain) - 1;
      SI result = (val & mask) << shift;
      SI result = (val & mask) << shift;
      mask = (1 << shift) - 1;
      mask = (1 << shift) - 1;
      result |= (val >> remain) & mask;
      result |= (val >> remain) & mask;
      return result;
      return result;
    }
    }
 
 
  return val;
  return val;
}
}
 
 
/* Emit an error message from CGEN RTL.  */
/* Emit an error message from CGEN RTL.  */
 
 
void
void
cgen_rtx_error (SIM_CPU *cpu, const char * msg)
cgen_rtx_error (SIM_CPU *cpu, const char * msg)
{
{
  SIM_DESC sd = CPU_STATE (cpu);
  SIM_DESC sd = CPU_STATE (cpu);
 
 
  sim_io_printf (sd, msg);
  sim_io_printf (sd, msg);
  sim_io_printf (sd, "\n");
  sim_io_printf (sd, "\n");
 
 
  sim_engine_halt (sd, cpu, NULL, CIA_GET (cpu), sim_stopped, SIM_SIGTRAP);
  sim_engine_halt (sd, cpu, NULL, CIA_GET (cpu), sim_stopped, SIM_SIGTRAP);
}
}
 
 

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