#include <signal.h>
|
#include <signal.h>
|
#include "sysdep.h"
|
#include "sysdep.h"
|
#include "bfd.h"
|
#include "bfd.h"
|
#include "gdb/callback.h"
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#include "gdb/callback.h"
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#include "gdb/remote-sim.h"
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#include "gdb/remote-sim.h"
|
|
|
#include "d10v_sim.h"
|
#include "d10v_sim.h"
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#include "gdb/sim-d10v.h"
|
#include "gdb/sim-d10v.h"
|
#include "gdb/signals.h"
|
#include "gdb/signals.h"
|
|
|
enum _leftright { LEFT_FIRST, RIGHT_FIRST };
|
enum _leftright { LEFT_FIRST, RIGHT_FIRST };
|
|
|
static char *myname;
|
static char *myname;
|
static SIM_OPEN_KIND sim_kind;
|
static SIM_OPEN_KIND sim_kind;
|
int d10v_debug;
|
int d10v_debug;
|
|
|
/* Set this to true to get the previous segment layout. */
|
/* Set this to true to get the previous segment layout. */
|
|
|
int old_segment_mapping;
|
int old_segment_mapping;
|
|
|
host_callback *d10v_callback;
|
host_callback *d10v_callback;
|
unsigned long ins_type_counters[ (int)INS_MAX ];
|
unsigned long ins_type_counters[ (int)INS_MAX ];
|
|
|
uint16 OP[4];
|
uint16 OP[4];
|
|
|
static int init_text_p = 0;
|
static int init_text_p = 0;
|
/* non-zero if we opened prog_bfd */
|
/* non-zero if we opened prog_bfd */
|
static int prog_bfd_was_opened_p;
|
static int prog_bfd_was_opened_p;
|
bfd *prog_bfd;
|
bfd *prog_bfd;
|
asection *text;
|
asection *text;
|
bfd_vma text_start;
|
bfd_vma text_start;
|
bfd_vma text_end;
|
bfd_vma text_end;
|
|
|
static long hash PARAMS ((long insn, int format));
|
static long hash PARAMS ((long insn, int format));
|
static struct hash_entry *lookup_hash PARAMS ((uint32 ins, int size));
|
static struct hash_entry *lookup_hash PARAMS ((uint32 ins, int size));
|
static void get_operands PARAMS ((struct simops *s, uint32 ins));
|
static void get_operands PARAMS ((struct simops *s, uint32 ins));
|
static void do_long PARAMS ((uint32 ins));
|
static void do_long PARAMS ((uint32 ins));
|
static void do_2_short PARAMS ((uint16 ins1, uint16 ins2, enum _leftright leftright));
|
static void do_2_short PARAMS ((uint16 ins1, uint16 ins2, enum _leftright leftright));
|
static void do_parallel PARAMS ((uint16 ins1, uint16 ins2));
|
static void do_parallel PARAMS ((uint16 ins1, uint16 ins2));
|
static char *add_commas PARAMS ((char *buf, int sizeof_buf, unsigned long value));
|
static char *add_commas PARAMS ((char *buf, int sizeof_buf, unsigned long value));
|
extern void sim_set_profile PARAMS ((int n));
|
extern void sim_set_profile PARAMS ((int n));
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extern void sim_set_profile_size PARAMS ((int n));
|
extern void sim_set_profile_size PARAMS ((int n));
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static INLINE uint8 *map_memory (unsigned phys_addr);
|
static INLINE uint8 *map_memory (unsigned phys_addr);
|
|
|
#ifdef NEED_UI_LOOP_HOOK
|
#ifdef NEED_UI_LOOP_HOOK
|
/* How often to run the ui_loop update, when in use */
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/* How often to run the ui_loop update, when in use */
|
#define UI_LOOP_POLL_INTERVAL 0x14000
|
#define UI_LOOP_POLL_INTERVAL 0x14000
|
|
|
/* Counter for the ui_loop_hook update */
|
/* Counter for the ui_loop_hook update */
|
static long ui_loop_hook_counter = UI_LOOP_POLL_INTERVAL;
|
static long ui_loop_hook_counter = UI_LOOP_POLL_INTERVAL;
|
|
|
/* Actual hook to call to run through gdb's gui event loop */
|
/* Actual hook to call to run through gdb's gui event loop */
|
extern int (*deprecated_ui_loop_hook) PARAMS ((int signo));
|
extern int (*deprecated_ui_loop_hook) PARAMS ((int signo));
|
#endif /* NEED_UI_LOOP_HOOK */
|
#endif /* NEED_UI_LOOP_HOOK */
|
|
|
#ifndef INLINE
|
#ifndef INLINE
|
#if defined(__GNUC__) && defined(__OPTIMIZE__)
|
#if defined(__GNUC__) && defined(__OPTIMIZE__)
|
#define INLINE __inline__
|
#define INLINE __inline__
|
#else
|
#else
|
#define INLINE
|
#define INLINE
|
#endif
|
#endif
|
#endif
|
#endif
|
|
|
#define MAX_HASH 63
|
#define MAX_HASH 63
|
struct hash_entry
|
struct hash_entry
|
{
|
{
|
struct hash_entry *next;
|
struct hash_entry *next;
|
uint32 opcode;
|
uint32 opcode;
|
uint32 mask;
|
uint32 mask;
|
int size;
|
int size;
|
struct simops *ops;
|
struct simops *ops;
|
};
|
};
|
|
|
struct hash_entry hash_table[MAX_HASH+1];
|
struct hash_entry hash_table[MAX_HASH+1];
|
|
|
INLINE static long
|
INLINE static long
|
hash(insn, format)
|
hash(insn, format)
|
long insn;
|
long insn;
|
int format;
|
int format;
|
{
|
{
|
if (format & LONG_OPCODE)
|
if (format & LONG_OPCODE)
|
return ((insn & 0x3F000000) >> 24);
|
return ((insn & 0x3F000000) >> 24);
|
else
|
else
|
return((insn & 0x7E00) >> 9);
|
return((insn & 0x7E00) >> 9);
|
}
|
}
|
|
|
INLINE static struct hash_entry *
|
INLINE static struct hash_entry *
|
lookup_hash (ins, size)
|
lookup_hash (ins, size)
|
uint32 ins;
|
uint32 ins;
|
int size;
|
int size;
|
{
|
{
|
struct hash_entry *h;
|
struct hash_entry *h;
|
|
|
if (size)
|
if (size)
|
h = &hash_table[(ins & 0x3F000000) >> 24];
|
h = &hash_table[(ins & 0x3F000000) >> 24];
|
else
|
else
|
h = &hash_table[(ins & 0x7E00) >> 9];
|
h = &hash_table[(ins & 0x7E00) >> 9];
|
|
|
while ((ins & h->mask) != h->opcode || h->size != size)
|
while ((ins & h->mask) != h->opcode || h->size != size)
|
{
|
{
|
if (h->next == NULL)
|
if (h->next == NULL)
|
{
|
{
|
State.exception = SIGILL;
|
State.exception = SIGILL;
|
State.pc_changed = 1; /* Don't increment the PC. */
|
State.pc_changed = 1; /* Don't increment the PC. */
|
return NULL;
|
return NULL;
|
}
|
}
|
h = h->next;
|
h = h->next;
|
}
|
}
|
return (h);
|
return (h);
|
}
|
}
|
|
|
INLINE static void
|
INLINE static void
|
get_operands (struct simops *s, uint32 ins)
|
get_operands (struct simops *s, uint32 ins)
|
{
|
{
|
int i, shift, bits, flags;
|
int i, shift, bits, flags;
|
uint32 mask;
|
uint32 mask;
|
for (i=0; i < s->numops; i++)
|
for (i=0; i < s->numops; i++)
|
{
|
{
|
shift = s->operands[3*i];
|
shift = s->operands[3*i];
|
bits = s->operands[3*i+1];
|
bits = s->operands[3*i+1];
|
flags = s->operands[3*i+2];
|
flags = s->operands[3*i+2];
|
mask = 0x7FFFFFFF >> (31 - bits);
|
mask = 0x7FFFFFFF >> (31 - bits);
|
OP[i] = (ins >> shift) & mask;
|
OP[i] = (ins >> shift) & mask;
|
}
|
}
|
/* FIXME: for tracing, update values that need to be updated each
|
/* FIXME: for tracing, update values that need to be updated each
|
instruction decode cycle */
|
instruction decode cycle */
|
State.trace.psw = PSW;
|
State.trace.psw = PSW;
|
}
|
}
|
|
|
bfd_vma
|
bfd_vma
|
decode_pc ()
|
decode_pc ()
|
{
|
{
|
asection *s;
|
asection *s;
|
if (!init_text_p && prog_bfd != NULL)
|
if (!init_text_p && prog_bfd != NULL)
|
{
|
{
|
init_text_p = 1;
|
init_text_p = 1;
|
for (s = prog_bfd->sections; s; s = s->next)
|
for (s = prog_bfd->sections; s; s = s->next)
|
if (strcmp (bfd_get_section_name (prog_bfd, s), ".text") == 0)
|
if (strcmp (bfd_get_section_name (prog_bfd, s), ".text") == 0)
|
{
|
{
|
text = s;
|
text = s;
|
text_start = bfd_get_section_vma (prog_bfd, s);
|
text_start = bfd_get_section_vma (prog_bfd, s);
|
text_end = text_start + bfd_section_size (prog_bfd, s);
|
text_end = text_start + bfd_section_size (prog_bfd, s);
|
break;
|
break;
|
}
|
}
|
}
|
}
|
|
|
return (PC << 2) + text_start;
|
return (PC << 2) + text_start;
|
}
|
}
|
|
|
static void
|
static void
|
do_long (ins)
|
do_long (ins)
|
uint32 ins;
|
uint32 ins;
|
{
|
{
|
struct hash_entry *h;
|
struct hash_entry *h;
|
#ifdef DEBUG
|
#ifdef DEBUG
|
if ((d10v_debug & DEBUG_INSTRUCTION) != 0)
|
if ((d10v_debug & DEBUG_INSTRUCTION) != 0)
|
(*d10v_callback->printf_filtered) (d10v_callback, "do_long 0x%x\n", ins);
|
(*d10v_callback->printf_filtered) (d10v_callback, "do_long 0x%x\n", ins);
|
#endif
|
#endif
|
h = lookup_hash (ins, 1);
|
h = lookup_hash (ins, 1);
|
if (h == NULL)
|
if (h == NULL)
|
return;
|
return;
|
get_operands (h->ops, ins);
|
get_operands (h->ops, ins);
|
State.ins_type = INS_LONG;
|
State.ins_type = INS_LONG;
|
ins_type_counters[ (int)State.ins_type ]++;
|
ins_type_counters[ (int)State.ins_type ]++;
|
(h->ops->func)();
|
(h->ops->func)();
|
}
|
}
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|
|
static void
|
static void
|
do_2_short (ins1, ins2, leftright)
|
do_2_short (ins1, ins2, leftright)
|
uint16 ins1, ins2;
|
uint16 ins1, ins2;
|
enum _leftright leftright;
|
enum _leftright leftright;
|
{
|
{
|
struct hash_entry *h;
|
struct hash_entry *h;
|
enum _ins_type first, second;
|
enum _ins_type first, second;
|
|
|
#ifdef DEBUG
|
#ifdef DEBUG
|
if ((d10v_debug & DEBUG_INSTRUCTION) != 0)
|
if ((d10v_debug & DEBUG_INSTRUCTION) != 0)
|
(*d10v_callback->printf_filtered) (d10v_callback, "do_2_short 0x%x (%s) -> 0x%x\n",
|
(*d10v_callback->printf_filtered) (d10v_callback, "do_2_short 0x%x (%s) -> 0x%x\n",
|
ins1, (leftright) ? "left" : "right", ins2);
|
ins1, (leftright) ? "left" : "right", ins2);
|
#endif
|
#endif
|
|
|
if (leftright == LEFT_FIRST)
|
if (leftright == LEFT_FIRST)
|
{
|
{
|
first = INS_LEFT;
|
first = INS_LEFT;
|
second = INS_RIGHT;
|
second = INS_RIGHT;
|
ins_type_counters[ (int)INS_LEFTRIGHT ]++;
|
ins_type_counters[ (int)INS_LEFTRIGHT ]++;
|
}
|
}
|
else
|
else
|
{
|
{
|
first = INS_RIGHT;
|
first = INS_RIGHT;
|
second = INS_LEFT;
|
second = INS_LEFT;
|
ins_type_counters[ (int)INS_RIGHTLEFT ]++;
|
ins_type_counters[ (int)INS_RIGHTLEFT ]++;
|
}
|
}
|
|
|
/* Issue the first instruction */
|
/* Issue the first instruction */
|
h = lookup_hash (ins1, 0);
|
h = lookup_hash (ins1, 0);
|
if (h == NULL)
|
if (h == NULL)
|
return;
|
return;
|
get_operands (h->ops, ins1);
|
get_operands (h->ops, ins1);
|
State.ins_type = first;
|
State.ins_type = first;
|
ins_type_counters[ (int)State.ins_type ]++;
|
ins_type_counters[ (int)State.ins_type ]++;
|
(h->ops->func)();
|
(h->ops->func)();
|
|
|
/* Issue the second instruction (if the PC hasn't changed) */
|
/* Issue the second instruction (if the PC hasn't changed) */
|
if (!State.pc_changed && !State.exception)
|
if (!State.pc_changed && !State.exception)
|
{
|
{
|
/* finish any existing instructions */
|
/* finish any existing instructions */
|
SLOT_FLUSH ();
|
SLOT_FLUSH ();
|
h = lookup_hash (ins2, 0);
|
h = lookup_hash (ins2, 0);
|
if (h == NULL)
|
if (h == NULL)
|
return;
|
return;
|
get_operands (h->ops, ins2);
|
get_operands (h->ops, ins2);
|
State.ins_type = second;
|
State.ins_type = second;
|
ins_type_counters[ (int)State.ins_type ]++;
|
ins_type_counters[ (int)State.ins_type ]++;
|
ins_type_counters[ (int)INS_CYCLES ]++;
|
ins_type_counters[ (int)INS_CYCLES ]++;
|
(h->ops->func)();
|
(h->ops->func)();
|
}
|
}
|
else if (!State.exception)
|
else if (!State.exception)
|
ins_type_counters[ (int)INS_COND_JUMP ]++;
|
ins_type_counters[ (int)INS_COND_JUMP ]++;
|
}
|
}
|
|
|
static void
|
static void
|
do_parallel (ins1, ins2)
|
do_parallel (ins1, ins2)
|
uint16 ins1, ins2;
|
uint16 ins1, ins2;
|
{
|
{
|
struct hash_entry *h1, *h2;
|
struct hash_entry *h1, *h2;
|
#ifdef DEBUG
|
#ifdef DEBUG
|
if ((d10v_debug & DEBUG_INSTRUCTION) != 0)
|
if ((d10v_debug & DEBUG_INSTRUCTION) != 0)
|
(*d10v_callback->printf_filtered) (d10v_callback, "do_parallel 0x%x || 0x%x\n", ins1, ins2);
|
(*d10v_callback->printf_filtered) (d10v_callback, "do_parallel 0x%x || 0x%x\n", ins1, ins2);
|
#endif
|
#endif
|
ins_type_counters[ (int)INS_PARALLEL ]++;
|
ins_type_counters[ (int)INS_PARALLEL ]++;
|
h1 = lookup_hash (ins1, 0);
|
h1 = lookup_hash (ins1, 0);
|
if (h1 == NULL)
|
if (h1 == NULL)
|
return;
|
return;
|
h2 = lookup_hash (ins2, 0);
|
h2 = lookup_hash (ins2, 0);
|
if (h2 == NULL)
|
if (h2 == NULL)
|
return;
|
return;
|
|
|
if (h1->ops->exec_type == PARONLY)
|
if (h1->ops->exec_type == PARONLY)
|
{
|
{
|
get_operands (h1->ops, ins1);
|
get_operands (h1->ops, ins1);
|
State.ins_type = INS_LEFT_COND_TEST;
|
State.ins_type = INS_LEFT_COND_TEST;
|
ins_type_counters[ (int)State.ins_type ]++;
|
ins_type_counters[ (int)State.ins_type ]++;
|
(h1->ops->func)();
|
(h1->ops->func)();
|
if (State.exe)
|
if (State.exe)
|
{
|
{
|
ins_type_counters[ (int)INS_COND_TRUE ]++;
|
ins_type_counters[ (int)INS_COND_TRUE ]++;
|
get_operands (h2->ops, ins2);
|
get_operands (h2->ops, ins2);
|
State.ins_type = INS_RIGHT_COND_EXE;
|
State.ins_type = INS_RIGHT_COND_EXE;
|
ins_type_counters[ (int)State.ins_type ]++;
|
ins_type_counters[ (int)State.ins_type ]++;
|
(h2->ops->func)();
|
(h2->ops->func)();
|
}
|
}
|
else
|
else
|
ins_type_counters[ (int)INS_COND_FALSE ]++;
|
ins_type_counters[ (int)INS_COND_FALSE ]++;
|
}
|
}
|
else if (h2->ops->exec_type == PARONLY)
|
else if (h2->ops->exec_type == PARONLY)
|
{
|
{
|
get_operands (h2->ops, ins2);
|
get_operands (h2->ops, ins2);
|
State.ins_type = INS_RIGHT_COND_TEST;
|
State.ins_type = INS_RIGHT_COND_TEST;
|
ins_type_counters[ (int)State.ins_type ]++;
|
ins_type_counters[ (int)State.ins_type ]++;
|
(h2->ops->func)();
|
(h2->ops->func)();
|
if (State.exe)
|
if (State.exe)
|
{
|
{
|
ins_type_counters[ (int)INS_COND_TRUE ]++;
|
ins_type_counters[ (int)INS_COND_TRUE ]++;
|
get_operands (h1->ops, ins1);
|
get_operands (h1->ops, ins1);
|
State.ins_type = INS_LEFT_COND_EXE;
|
State.ins_type = INS_LEFT_COND_EXE;
|
ins_type_counters[ (int)State.ins_type ]++;
|
ins_type_counters[ (int)State.ins_type ]++;
|
(h1->ops->func)();
|
(h1->ops->func)();
|
}
|
}
|
else
|
else
|
ins_type_counters[ (int)INS_COND_FALSE ]++;
|
ins_type_counters[ (int)INS_COND_FALSE ]++;
|
}
|
}
|
else
|
else
|
{
|
{
|
get_operands (h1->ops, ins1);
|
get_operands (h1->ops, ins1);
|
State.ins_type = INS_LEFT_PARALLEL;
|
State.ins_type = INS_LEFT_PARALLEL;
|
ins_type_counters[ (int)State.ins_type ]++;
|
ins_type_counters[ (int)State.ins_type ]++;
|
(h1->ops->func)();
|
(h1->ops->func)();
|
if (!State.exception)
|
if (!State.exception)
|
{
|
{
|
get_operands (h2->ops, ins2);
|
get_operands (h2->ops, ins2);
|
State.ins_type = INS_RIGHT_PARALLEL;
|
State.ins_type = INS_RIGHT_PARALLEL;
|
ins_type_counters[ (int)State.ins_type ]++;
|
ins_type_counters[ (int)State.ins_type ]++;
|
(h2->ops->func)();
|
(h2->ops->func)();
|
}
|
}
|
}
|
}
|
}
|
}
|
|
|
static char *
|
static char *
|
add_commas(buf, sizeof_buf, value)
|
add_commas(buf, sizeof_buf, value)
|
char *buf;
|
char *buf;
|
int sizeof_buf;
|
int sizeof_buf;
|
unsigned long value;
|
unsigned long value;
|
{
|
{
|
int comma = 3;
|
int comma = 3;
|
char *endbuf = buf + sizeof_buf - 1;
|
char *endbuf = buf + sizeof_buf - 1;
|
|
|
*--endbuf = '\0';
|
*--endbuf = '\0';
|
do {
|
do {
|
if (comma-- == 0)
|
if (comma-- == 0)
|
{
|
{
|
*--endbuf = ',';
|
*--endbuf = ',';
|
comma = 2;
|
comma = 2;
|
}
|
}
|
|
|
*--endbuf = (value % 10) + '0';
|
*--endbuf = (value % 10) + '0';
|
} while ((value /= 10) != 0);
|
} while ((value /= 10) != 0);
|
|
|
return endbuf;
|
return endbuf;
|
}
|
}
|
|
|
void
|
void
|
sim_size (power)
|
sim_size (power)
|
int power;
|
int power;
|
|
|
{
|
{
|
int i;
|
int i;
|
for (i = 0; i < IMEM_SEGMENTS; i++)
|
for (i = 0; i < IMEM_SEGMENTS; i++)
|
{
|
{
|
if (State.mem.insn[i])
|
if (State.mem.insn[i])
|
free (State.mem.insn[i]);
|
free (State.mem.insn[i]);
|
}
|
}
|
for (i = 0; i < DMEM_SEGMENTS; i++)
|
for (i = 0; i < DMEM_SEGMENTS; i++)
|
{
|
{
|
if (State.mem.data[i])
|
if (State.mem.data[i])
|
free (State.mem.data[i]);
|
free (State.mem.data[i]);
|
}
|
}
|
for (i = 0; i < UMEM_SEGMENTS; i++)
|
for (i = 0; i < UMEM_SEGMENTS; i++)
|
{
|
{
|
if (State.mem.unif[i])
|
if (State.mem.unif[i])
|
free (State.mem.unif[i]);
|
free (State.mem.unif[i]);
|
}
|
}
|
/* Always allocate dmem segment 0. This contains the IMAP and DMAP
|
/* Always allocate dmem segment 0. This contains the IMAP and DMAP
|
registers. */
|
registers. */
|
State.mem.data[0] = calloc (1, SEGMENT_SIZE);
|
State.mem.data[0] = calloc (1, SEGMENT_SIZE);
|
}
|
}
|
|
|
/* For tracing - leave info on last access around. */
|
/* For tracing - leave info on last access around. */
|
static char *last_segname = "invalid";
|
static char *last_segname = "invalid";
|
static char *last_from = "invalid";
|
static char *last_from = "invalid";
|
static char *last_to = "invalid";
|
static char *last_to = "invalid";
|
|
|
enum
|
enum
|
{
|
{
|
IMAP0_OFFSET = 0xff00,
|
IMAP0_OFFSET = 0xff00,
|
DMAP0_OFFSET = 0xff08,
|
DMAP0_OFFSET = 0xff08,
|
DMAP2_SHADDOW = 0xff04,
|
DMAP2_SHADDOW = 0xff04,
|
DMAP2_OFFSET = 0xff0c
|
DMAP2_OFFSET = 0xff0c
|
};
|
};
|
|
|
static void
|
static void
|
set_dmap_register (int reg_nr, unsigned long value)
|
set_dmap_register (int reg_nr, unsigned long value)
|
{
|
{
|
uint8 *raw = map_memory (SIM_D10V_MEMORY_DATA
|
uint8 *raw = map_memory (SIM_D10V_MEMORY_DATA
|
+ DMAP0_OFFSET + 2 * reg_nr);
|
+ DMAP0_OFFSET + 2 * reg_nr);
|
WRITE_16 (raw, value);
|
WRITE_16 (raw, value);
|
#ifdef DEBUG
|
#ifdef DEBUG
|
if ((d10v_debug & DEBUG_MEMORY))
|
if ((d10v_debug & DEBUG_MEMORY))
|
{
|
{
|
(*d10v_callback->printf_filtered)
|
(*d10v_callback->printf_filtered)
|
(d10v_callback, "mem: dmap%d=0x%04lx\n", reg_nr, value);
|
(d10v_callback, "mem: dmap%d=0x%04lx\n", reg_nr, value);
|
}
|
}
|
#endif
|
#endif
|
}
|
}
|
|
|
static unsigned long
|
static unsigned long
|
dmap_register (void *regcache, int reg_nr)
|
dmap_register (void *regcache, int reg_nr)
|
{
|
{
|
uint8 *raw = map_memory (SIM_D10V_MEMORY_DATA
|
uint8 *raw = map_memory (SIM_D10V_MEMORY_DATA
|
+ DMAP0_OFFSET + 2 * reg_nr);
|
+ DMAP0_OFFSET + 2 * reg_nr);
|
return READ_16 (raw);
|
return READ_16 (raw);
|
}
|
}
|
|
|
static void
|
static void
|
set_imap_register (int reg_nr, unsigned long value)
|
set_imap_register (int reg_nr, unsigned long value)
|
{
|
{
|
uint8 *raw = map_memory (SIM_D10V_MEMORY_DATA
|
uint8 *raw = map_memory (SIM_D10V_MEMORY_DATA
|
+ IMAP0_OFFSET + 2 * reg_nr);
|
+ IMAP0_OFFSET + 2 * reg_nr);
|
WRITE_16 (raw, value);
|
WRITE_16 (raw, value);
|
#ifdef DEBUG
|
#ifdef DEBUG
|
if ((d10v_debug & DEBUG_MEMORY))
|
if ((d10v_debug & DEBUG_MEMORY))
|
{
|
{
|
(*d10v_callback->printf_filtered)
|
(*d10v_callback->printf_filtered)
|
(d10v_callback, "mem: imap%d=0x%04lx\n", reg_nr, value);
|
(d10v_callback, "mem: imap%d=0x%04lx\n", reg_nr, value);
|
}
|
}
|
#endif
|
#endif
|
}
|
}
|
|
|
static unsigned long
|
static unsigned long
|
imap_register (void *regcache, int reg_nr)
|
imap_register (void *regcache, int reg_nr)
|
{
|
{
|
uint8 *raw = map_memory (SIM_D10V_MEMORY_DATA
|
uint8 *raw = map_memory (SIM_D10V_MEMORY_DATA
|
+ IMAP0_OFFSET + 2 * reg_nr);
|
+ IMAP0_OFFSET + 2 * reg_nr);
|
return READ_16 (raw);
|
return READ_16 (raw);
|
}
|
}
|
|
|
enum
|
enum
|
{
|
{
|
HELD_SPI_IDX = 0,
|
HELD_SPI_IDX = 0,
|
HELD_SPU_IDX = 1
|
HELD_SPU_IDX = 1
|
};
|
};
|
|
|
static unsigned long
|
static unsigned long
|
spu_register (void)
|
spu_register (void)
|
{
|
{
|
if (PSW_SM)
|
if (PSW_SM)
|
return GPR (SP_IDX);
|
return GPR (SP_IDX);
|
else
|
else
|
return HELD_SP (HELD_SPU_IDX);
|
return HELD_SP (HELD_SPU_IDX);
|
}
|
}
|
|
|
static unsigned long
|
static unsigned long
|
spi_register (void)
|
spi_register (void)
|
{
|
{
|
if (!PSW_SM)
|
if (!PSW_SM)
|
return GPR (SP_IDX);
|
return GPR (SP_IDX);
|
else
|
else
|
return HELD_SP (HELD_SPI_IDX);
|
return HELD_SP (HELD_SPI_IDX);
|
}
|
}
|
|
|
static void
|
static void
|
set_spi_register (unsigned long value)
|
set_spi_register (unsigned long value)
|
{
|
{
|
if (!PSW_SM)
|
if (!PSW_SM)
|
SET_GPR (SP_IDX, value);
|
SET_GPR (SP_IDX, value);
|
SET_HELD_SP (HELD_SPI_IDX, value);
|
SET_HELD_SP (HELD_SPI_IDX, value);
|
}
|
}
|
|
|
static void
|
static void
|
set_spu_register (unsigned long value)
|
set_spu_register (unsigned long value)
|
{
|
{
|
if (PSW_SM)
|
if (PSW_SM)
|
SET_GPR (SP_IDX, value);
|
SET_GPR (SP_IDX, value);
|
SET_HELD_SP (HELD_SPU_IDX, value);
|
SET_HELD_SP (HELD_SPU_IDX, value);
|
}
|
}
|
|
|
/* Given a virtual address in the DMAP address space, translate it
|
/* Given a virtual address in the DMAP address space, translate it
|
into a physical address. */
|
into a physical address. */
|
|
|
unsigned long
|
unsigned long
|
sim_d10v_translate_dmap_addr (unsigned long offset,
|
sim_d10v_translate_dmap_addr (unsigned long offset,
|
int nr_bytes,
|
int nr_bytes,
|
unsigned long *phys,
|
unsigned long *phys,
|
void *regcache,
|
void *regcache,
|
unsigned long (*dmap_register) (void *regcache,
|
unsigned long (*dmap_register) (void *regcache,
|
int reg_nr))
|
int reg_nr))
|
{
|
{
|
short map;
|
short map;
|
int regno;
|
int regno;
|
last_from = "logical-data";
|
last_from = "logical-data";
|
if (offset >= DMAP_BLOCK_SIZE * SIM_D10V_NR_DMAP_REGS)
|
if (offset >= DMAP_BLOCK_SIZE * SIM_D10V_NR_DMAP_REGS)
|
{
|
{
|
/* Logical address out side of data segments, not supported */
|
/* Logical address out side of data segments, not supported */
|
return 0;
|
return 0;
|
}
|
}
|
regno = (offset / DMAP_BLOCK_SIZE);
|
regno = (offset / DMAP_BLOCK_SIZE);
|
offset = (offset % DMAP_BLOCK_SIZE);
|
offset = (offset % DMAP_BLOCK_SIZE);
|
if ((offset % DMAP_BLOCK_SIZE) + nr_bytes > DMAP_BLOCK_SIZE)
|
if ((offset % DMAP_BLOCK_SIZE) + nr_bytes > DMAP_BLOCK_SIZE)
|
{
|
{
|
/* Don't cross a BLOCK boundary */
|
/* Don't cross a BLOCK boundary */
|
nr_bytes = DMAP_BLOCK_SIZE - (offset % DMAP_BLOCK_SIZE);
|
nr_bytes = DMAP_BLOCK_SIZE - (offset % DMAP_BLOCK_SIZE);
|
}
|
}
|
map = dmap_register (regcache, regno);
|
map = dmap_register (regcache, regno);
|
if (regno == 3)
|
if (regno == 3)
|
{
|
{
|
/* Always maps to data memory */
|
/* Always maps to data memory */
|
int iospi = (offset / 0x1000) % 4;
|
int iospi = (offset / 0x1000) % 4;
|
int iosp = (map >> (4 * (3 - iospi))) % 0x10;
|
int iosp = (map >> (4 * (3 - iospi))) % 0x10;
|
last_to = "io-space";
|
last_to = "io-space";
|
*phys = (SIM_D10V_MEMORY_DATA + (iosp * 0x10000) + 0xc000 + offset);
|
*phys = (SIM_D10V_MEMORY_DATA + (iosp * 0x10000) + 0xc000 + offset);
|
}
|
}
|
else
|
else
|
{
|
{
|
int sp = ((map & 0x3000) >> 12);
|
int sp = ((map & 0x3000) >> 12);
|
int segno = (map & 0x3ff);
|
int segno = (map & 0x3ff);
|
switch (sp)
|
switch (sp)
|
{
|
{
|
case 0: /* 00: Unified memory */
|
case 0: /* 00: Unified memory */
|
*phys = SIM_D10V_MEMORY_UNIFIED + (segno * DMAP_BLOCK_SIZE) + offset;
|
*phys = SIM_D10V_MEMORY_UNIFIED + (segno * DMAP_BLOCK_SIZE) + offset;
|
last_to = "unified";
|
last_to = "unified";
|
break;
|
break;
|
case 1: /* 01: Instruction Memory */
|
case 1: /* 01: Instruction Memory */
|
*phys = SIM_D10V_MEMORY_INSN + (segno * DMAP_BLOCK_SIZE) + offset;
|
*phys = SIM_D10V_MEMORY_INSN + (segno * DMAP_BLOCK_SIZE) + offset;
|
last_to = "chip-insn";
|
last_to = "chip-insn";
|
break;
|
break;
|
case 2: /* 10: Internal data memory */
|
case 2: /* 10: Internal data memory */
|
*phys = SIM_D10V_MEMORY_DATA + (segno << 16) + (regno * DMAP_BLOCK_SIZE) + offset;
|
*phys = SIM_D10V_MEMORY_DATA + (segno << 16) + (regno * DMAP_BLOCK_SIZE) + offset;
|
last_to = "chip-data";
|
last_to = "chip-data";
|
break;
|
break;
|
case 3: /* 11: Reserved */
|
case 3: /* 11: Reserved */
|
return 0;
|
return 0;
|
}
|
}
|
}
|
}
|
return nr_bytes;
|
return nr_bytes;
|
}
|
}
|
|
|
/* Given a virtual address in the IMAP address space, translate it
|
/* Given a virtual address in the IMAP address space, translate it
|
into a physical address. */
|
into a physical address. */
|
|
|
unsigned long
|
unsigned long
|
sim_d10v_translate_imap_addr (unsigned long offset,
|
sim_d10v_translate_imap_addr (unsigned long offset,
|
int nr_bytes,
|
int nr_bytes,
|
unsigned long *phys,
|
unsigned long *phys,
|
void *regcache,
|
void *regcache,
|
unsigned long (*imap_register) (void *regcache,
|
unsigned long (*imap_register) (void *regcache,
|
int reg_nr))
|
int reg_nr))
|
{
|
{
|
short map;
|
short map;
|
int regno;
|
int regno;
|
int sp;
|
int sp;
|
int segno;
|
int segno;
|
last_from = "logical-insn";
|
last_from = "logical-insn";
|
if (offset >= (IMAP_BLOCK_SIZE * SIM_D10V_NR_IMAP_REGS))
|
if (offset >= (IMAP_BLOCK_SIZE * SIM_D10V_NR_IMAP_REGS))
|
{
|
{
|
/* Logical address outside of IMAP segments, not supported */
|
/* Logical address outside of IMAP segments, not supported */
|
return 0;
|
return 0;
|
}
|
}
|
regno = (offset / IMAP_BLOCK_SIZE);
|
regno = (offset / IMAP_BLOCK_SIZE);
|
offset = (offset % IMAP_BLOCK_SIZE);
|
offset = (offset % IMAP_BLOCK_SIZE);
|
if (offset + nr_bytes > IMAP_BLOCK_SIZE)
|
if (offset + nr_bytes > IMAP_BLOCK_SIZE)
|
{
|
{
|
/* Don't cross a BLOCK boundary */
|
/* Don't cross a BLOCK boundary */
|
nr_bytes = IMAP_BLOCK_SIZE - offset;
|
nr_bytes = IMAP_BLOCK_SIZE - offset;
|
}
|
}
|
map = imap_register (regcache, regno);
|
map = imap_register (regcache, regno);
|
sp = (map & 0x3000) >> 12;
|
sp = (map & 0x3000) >> 12;
|
segno = (map & 0x007f);
|
segno = (map & 0x007f);
|
switch (sp)
|
switch (sp)
|
{
|
{
|
case 0: /* 00: unified memory */
|
case 0: /* 00: unified memory */
|
*phys = SIM_D10V_MEMORY_UNIFIED + (segno << 17) + offset;
|
*phys = SIM_D10V_MEMORY_UNIFIED + (segno << 17) + offset;
|
last_to = "unified";
|
last_to = "unified";
|
break;
|
break;
|
case 1: /* 01: instruction memory */
|
case 1: /* 01: instruction memory */
|
*phys = SIM_D10V_MEMORY_INSN + (IMAP_BLOCK_SIZE * regno) + offset;
|
*phys = SIM_D10V_MEMORY_INSN + (IMAP_BLOCK_SIZE * regno) + offset;
|
last_to = "chip-insn";
|
last_to = "chip-insn";
|
break;
|
break;
|
case 2: /*10*/
|
case 2: /*10*/
|
/* Reserved. */
|
/* Reserved. */
|
return 0;
|
return 0;
|
case 3: /* 11: for testing - instruction memory */
|
case 3: /* 11: for testing - instruction memory */
|
offset = (offset % 0x800);
|
offset = (offset % 0x800);
|
*phys = SIM_D10V_MEMORY_INSN + offset;
|
*phys = SIM_D10V_MEMORY_INSN + offset;
|
if (offset + nr_bytes > 0x800)
|
if (offset + nr_bytes > 0x800)
|
/* don't cross VM boundary */
|
/* don't cross VM boundary */
|
nr_bytes = 0x800 - offset;
|
nr_bytes = 0x800 - offset;
|
last_to = "test-insn";
|
last_to = "test-insn";
|
break;
|
break;
|
}
|
}
|
return nr_bytes;
|
return nr_bytes;
|
}
|
}
|
|
|
unsigned long
|
unsigned long
|
sim_d10v_translate_addr (unsigned long memaddr,
|
sim_d10v_translate_addr (unsigned long memaddr,
|
int nr_bytes,
|
int nr_bytes,
|
unsigned long *targ_addr,
|
unsigned long *targ_addr,
|
void *regcache,
|
void *regcache,
|
unsigned long (*dmap_register) (void *regcache,
|
unsigned long (*dmap_register) (void *regcache,
|
int reg_nr),
|
int reg_nr),
|
unsigned long (*imap_register) (void *regcache,
|
unsigned long (*imap_register) (void *regcache,
|
int reg_nr))
|
int reg_nr))
|
{
|
{
|
unsigned long phys;
|
unsigned long phys;
|
unsigned long seg;
|
unsigned long seg;
|
unsigned long off;
|
unsigned long off;
|
|
|
last_from = "unknown";
|
last_from = "unknown";
|
last_to = "unknown";
|
last_to = "unknown";
|
|
|
seg = (memaddr >> 24);
|
seg = (memaddr >> 24);
|
off = (memaddr & 0xffffffL);
|
off = (memaddr & 0xffffffL);
|
|
|
/* However, if we've asked to use the previous generation of segment
|
/* However, if we've asked to use the previous generation of segment
|
mapping, rearrange the segments as follows. */
|
mapping, rearrange the segments as follows. */
|
|
|
if (old_segment_mapping)
|
if (old_segment_mapping)
|
{
|
{
|
switch (seg)
|
switch (seg)
|
{
|
{
|
case 0x00: /* DMAP translated memory */
|
case 0x00: /* DMAP translated memory */
|
seg = 0x10;
|
seg = 0x10;
|
break;
|
break;
|
case 0x01: /* IMAP translated memory */
|
case 0x01: /* IMAP translated memory */
|
seg = 0x11;
|
seg = 0x11;
|
break;
|
break;
|
case 0x10: /* On-chip data memory */
|
case 0x10: /* On-chip data memory */
|
seg = 0x02;
|
seg = 0x02;
|
break;
|
break;
|
case 0x11: /* On-chip insn memory */
|
case 0x11: /* On-chip insn memory */
|
seg = 0x01;
|
seg = 0x01;
|
break;
|
break;
|
case 0x12: /* Unified memory */
|
case 0x12: /* Unified memory */
|
seg = 0x00;
|
seg = 0x00;
|
break;
|
break;
|
}
|
}
|
}
|
}
|
|
|
switch (seg)
|
switch (seg)
|
{
|
{
|
case 0x00: /* Physical unified memory */
|
case 0x00: /* Physical unified memory */
|
last_from = "phys-unified";
|
last_from = "phys-unified";
|
last_to = "unified";
|
last_to = "unified";
|
phys = SIM_D10V_MEMORY_UNIFIED + off;
|
phys = SIM_D10V_MEMORY_UNIFIED + off;
|
if ((off % SEGMENT_SIZE) + nr_bytes > SEGMENT_SIZE)
|
if ((off % SEGMENT_SIZE) + nr_bytes > SEGMENT_SIZE)
|
nr_bytes = SEGMENT_SIZE - (off % SEGMENT_SIZE);
|
nr_bytes = SEGMENT_SIZE - (off % SEGMENT_SIZE);
|
break;
|
break;
|
|
|
case 0x01: /* Physical instruction memory */
|
case 0x01: /* Physical instruction memory */
|
last_from = "phys-insn";
|
last_from = "phys-insn";
|
last_to = "chip-insn";
|
last_to = "chip-insn";
|
phys = SIM_D10V_MEMORY_INSN + off;
|
phys = SIM_D10V_MEMORY_INSN + off;
|
if ((off % SEGMENT_SIZE) + nr_bytes > SEGMENT_SIZE)
|
if ((off % SEGMENT_SIZE) + nr_bytes > SEGMENT_SIZE)
|
nr_bytes = SEGMENT_SIZE - (off % SEGMENT_SIZE);
|
nr_bytes = SEGMENT_SIZE - (off % SEGMENT_SIZE);
|
break;
|
break;
|
|
|
case 0x02: /* Physical data memory segment */
|
case 0x02: /* Physical data memory segment */
|
last_from = "phys-data";
|
last_from = "phys-data";
|
last_to = "chip-data";
|
last_to = "chip-data";
|
phys = SIM_D10V_MEMORY_DATA + off;
|
phys = SIM_D10V_MEMORY_DATA + off;
|
if ((off % SEGMENT_SIZE) + nr_bytes > SEGMENT_SIZE)
|
if ((off % SEGMENT_SIZE) + nr_bytes > SEGMENT_SIZE)
|
nr_bytes = SEGMENT_SIZE - (off % SEGMENT_SIZE);
|
nr_bytes = SEGMENT_SIZE - (off % SEGMENT_SIZE);
|
break;
|
break;
|
|
|
case 0x10: /* in logical data address segment */
|
case 0x10: /* in logical data address segment */
|
nr_bytes = sim_d10v_translate_dmap_addr (off, nr_bytes, &phys, regcache,
|
nr_bytes = sim_d10v_translate_dmap_addr (off, nr_bytes, &phys, regcache,
|
dmap_register);
|
dmap_register);
|
break;
|
break;
|
|
|
case 0x11: /* in logical instruction address segment */
|
case 0x11: /* in logical instruction address segment */
|
nr_bytes = sim_d10v_translate_imap_addr (off, nr_bytes, &phys, regcache,
|
nr_bytes = sim_d10v_translate_imap_addr (off, nr_bytes, &phys, regcache,
|
imap_register);
|
imap_register);
|
break;
|
break;
|
|
|
default:
|
default:
|
return 0;
|
return 0;
|
}
|
}
|
|
|
*targ_addr = phys;
|
*targ_addr = phys;
|
return nr_bytes;
|
return nr_bytes;
|
}
|
}
|
|
|
/* Return a pointer into the raw buffer designated by phys_addr. It
|
/* Return a pointer into the raw buffer designated by phys_addr. It
|
is assumed that the client has already ensured that the access
|
is assumed that the client has already ensured that the access
|
isn't going to cross a segment boundary. */
|
isn't going to cross a segment boundary. */
|
|
|
uint8 *
|
uint8 *
|
map_memory (unsigned phys_addr)
|
map_memory (unsigned phys_addr)
|
{
|
{
|
uint8 **memory;
|
uint8 **memory;
|
uint8 *raw;
|
uint8 *raw;
|
unsigned offset;
|
unsigned offset;
|
int segment = ((phys_addr >> 24) & 0xff);
|
int segment = ((phys_addr >> 24) & 0xff);
|
|
|
switch (segment)
|
switch (segment)
|
{
|
{
|
|
|
case 0x00: /* Unified memory */
|
case 0x00: /* Unified memory */
|
{
|
{
|
memory = &State.mem.unif[(phys_addr / SEGMENT_SIZE) % UMEM_SEGMENTS];
|
memory = &State.mem.unif[(phys_addr / SEGMENT_SIZE) % UMEM_SEGMENTS];
|
last_segname = "umem";
|
last_segname = "umem";
|
break;
|
break;
|
}
|
}
|
|
|
case 0x01: /* On-chip insn memory */
|
case 0x01: /* On-chip insn memory */
|
{
|
{
|
memory = &State.mem.insn[(phys_addr / SEGMENT_SIZE) % IMEM_SEGMENTS];
|
memory = &State.mem.insn[(phys_addr / SEGMENT_SIZE) % IMEM_SEGMENTS];
|
last_segname = "imem";
|
last_segname = "imem";
|
break;
|
break;
|
}
|
}
|
|
|
case 0x02: /* On-chip data memory */
|
case 0x02: /* On-chip data memory */
|
{
|
{
|
if ((phys_addr & 0xff00) == 0xff00)
|
if ((phys_addr & 0xff00) == 0xff00)
|
{
|
{
|
phys_addr = (phys_addr & 0xffff);
|
phys_addr = (phys_addr & 0xffff);
|
if (phys_addr == DMAP2_SHADDOW)
|
if (phys_addr == DMAP2_SHADDOW)
|
{
|
{
|
phys_addr = DMAP2_OFFSET;
|
phys_addr = DMAP2_OFFSET;
|
last_segname = "dmap";
|
last_segname = "dmap";
|
}
|
}
|
else
|
else
|
last_segname = "reg";
|
last_segname = "reg";
|
}
|
}
|
else
|
else
|
last_segname = "dmem";
|
last_segname = "dmem";
|
memory = &State.mem.data[(phys_addr / SEGMENT_SIZE) % DMEM_SEGMENTS];
|
memory = &State.mem.data[(phys_addr / SEGMENT_SIZE) % DMEM_SEGMENTS];
|
break;
|
break;
|
}
|
}
|
|
|
default:
|
default:
|
/* OOPS! */
|
/* OOPS! */
|
last_segname = "scrap";
|
last_segname = "scrap";
|
return State.mem.fault;
|
return State.mem.fault;
|
}
|
}
|
|
|
if (*memory == NULL)
|
if (*memory == NULL)
|
{
|
{
|
*memory = calloc (1, SEGMENT_SIZE);
|
*memory = calloc (1, SEGMENT_SIZE);
|
if (*memory == NULL)
|
if (*memory == NULL)
|
{
|
{
|
(*d10v_callback->printf_filtered) (d10v_callback, "Malloc failed.\n");
|
(*d10v_callback->printf_filtered) (d10v_callback, "Malloc failed.\n");
|
return State.mem.fault;
|
return State.mem.fault;
|
}
|
}
|
}
|
}
|
|
|
offset = (phys_addr % SEGMENT_SIZE);
|
offset = (phys_addr % SEGMENT_SIZE);
|
raw = *memory + offset;
|
raw = *memory + offset;
|
return raw;
|
return raw;
|
}
|
}
|
|
|
/* Transfer data to/from simulated memory. Since a bug in either the
|
/* Transfer data to/from simulated memory. Since a bug in either the
|
simulated program or in gdb or the simulator itself may cause a
|
simulated program or in gdb or the simulator itself may cause a
|
bogus address to be passed in, we need to do some sanity checking
|
bogus address to be passed in, we need to do some sanity checking
|
on addresses to make sure they are within bounds. When an address
|
on addresses to make sure they are within bounds. When an address
|
fails the bounds check, treat it as a zero length read/write rather
|
fails the bounds check, treat it as a zero length read/write rather
|
than aborting the entire run. */
|
than aborting the entire run. */
|
|
|
static int
|
static int
|
xfer_mem (SIM_ADDR virt,
|
xfer_mem (SIM_ADDR virt,
|
unsigned char *buffer,
|
unsigned char *buffer,
|
int size,
|
int size,
|
int write_p)
|
int write_p)
|
{
|
{
|
uint8 *memory;
|
uint8 *memory;
|
unsigned long phys;
|
unsigned long phys;
|
int phys_size;
|
int phys_size;
|
phys_size = sim_d10v_translate_addr (virt, size, &phys, NULL,
|
phys_size = sim_d10v_translate_addr (virt, size, &phys, NULL,
|
dmap_register, imap_register);
|
dmap_register, imap_register);
|
if (phys_size == 0)
|
if (phys_size == 0)
|
return 0;
|
return 0;
|
|
|
memory = map_memory (phys);
|
memory = map_memory (phys);
|
|
|
#ifdef DEBUG
|
#ifdef DEBUG
|
if ((d10v_debug & DEBUG_INSTRUCTION) != 0)
|
if ((d10v_debug & DEBUG_INSTRUCTION) != 0)
|
{
|
{
|
(*d10v_callback->printf_filtered)
|
(*d10v_callback->printf_filtered)
|
(d10v_callback,
|
(d10v_callback,
|
"sim_%s %d bytes: 0x%08lx (%s) -> 0x%08lx (%s) -> 0x%08lx (%s)\n",
|
"sim_%s %d bytes: 0x%08lx (%s) -> 0x%08lx (%s) -> 0x%08lx (%s)\n",
|
(write_p ? "write" : "read"),
|
(write_p ? "write" : "read"),
|
phys_size, virt, last_from,
|
phys_size, virt, last_from,
|
phys, last_to,
|
phys, last_to,
|
(long) memory, last_segname);
|
(long) memory, last_segname);
|
}
|
}
|
#endif
|
#endif
|
|
|
if (write_p)
|
if (write_p)
|
{
|
{
|
memcpy (memory, buffer, phys_size);
|
memcpy (memory, buffer, phys_size);
|
}
|
}
|
else
|
else
|
{
|
{
|
memcpy (buffer, memory, phys_size);
|
memcpy (buffer, memory, phys_size);
|
}
|
}
|
|
|
return phys_size;
|
return phys_size;
|
}
|
}
|
|
|
|
|
int
|
int
|
sim_write (sd, addr, buffer, size)
|
sim_write (sd, addr, buffer, size)
|
SIM_DESC sd;
|
SIM_DESC sd;
|
SIM_ADDR addr;
|
SIM_ADDR addr;
|
const unsigned char *buffer;
|
const unsigned char *buffer;
|
int size;
|
int size;
|
{
|
{
|
/* FIXME: this should be performing a virtual transfer */
|
/* FIXME: this should be performing a virtual transfer */
|
return xfer_mem( addr, buffer, size, 1);
|
return xfer_mem( addr, buffer, size, 1);
|
}
|
}
|
|
|
int
|
int
|
sim_read (sd, addr, buffer, size)
|
sim_read (sd, addr, buffer, size)
|
SIM_DESC sd;
|
SIM_DESC sd;
|
SIM_ADDR addr;
|
SIM_ADDR addr;
|
unsigned char *buffer;
|
unsigned char *buffer;
|
int size;
|
int size;
|
{
|
{
|
/* FIXME: this should be performing a virtual transfer */
|
/* FIXME: this should be performing a virtual transfer */
|
return xfer_mem( addr, buffer, size, 0);
|
return xfer_mem( addr, buffer, size, 0);
|
}
|
}
|
|
|
|
|
SIM_DESC
|
SIM_DESC
|
sim_open (kind, callback, abfd, argv)
|
sim_open (kind, callback, abfd, argv)
|
SIM_OPEN_KIND kind;
|
SIM_OPEN_KIND kind;
|
host_callback *callback;
|
host_callback *callback;
|
struct bfd *abfd;
|
struct bfd *abfd;
|
char **argv;
|
char **argv;
|
{
|
{
|
struct simops *s;
|
struct simops *s;
|
struct hash_entry *h;
|
struct hash_entry *h;
|
static int init_p = 0;
|
static int init_p = 0;
|
char **p;
|
char **p;
|
|
|
sim_kind = kind;
|
sim_kind = kind;
|
d10v_callback = callback;
|
d10v_callback = callback;
|
myname = argv[0];
|
myname = argv[0];
|
old_segment_mapping = 0;
|
old_segment_mapping = 0;
|
|
|
/* NOTE: This argument parsing is only effective when this function
|
/* NOTE: This argument parsing is only effective when this function
|
is called by GDB. Standalone argument parsing is handled by
|
is called by GDB. Standalone argument parsing is handled by
|
sim/common/run.c. */
|
sim/common/run.c. */
|
for (p = argv + 1; *p; ++p)
|
for (p = argv + 1; *p; ++p)
|
{
|
{
|
if (strcmp (*p, "-oldseg") == 0)
|
if (strcmp (*p, "-oldseg") == 0)
|
old_segment_mapping = 1;
|
old_segment_mapping = 1;
|
#ifdef DEBUG
|
#ifdef DEBUG
|
else if (strcmp (*p, "-t") == 0)
|
else if (strcmp (*p, "-t") == 0)
|
d10v_debug = DEBUG;
|
d10v_debug = DEBUG;
|
else if (strncmp (*p, "-t", 2) == 0)
|
else if (strncmp (*p, "-t", 2) == 0)
|
d10v_debug = atoi (*p + 2);
|
d10v_debug = atoi (*p + 2);
|
#endif
|
#endif
|
else
|
else
|
(*d10v_callback->printf_filtered) (d10v_callback, "ERROR: unsupported option(s): %s\n",*p);
|
(*d10v_callback->printf_filtered) (d10v_callback, "ERROR: unsupported option(s): %s\n",*p);
|
}
|
}
|
|
|
/* put all the opcodes in the hash table */
|
/* put all the opcodes in the hash table */
|
if (!init_p++)
|
if (!init_p++)
|
{
|
{
|
for (s = Simops; s->func; s++)
|
for (s = Simops; s->func; s++)
|
{
|
{
|
h = &hash_table[hash(s->opcode,s->format)];
|
h = &hash_table[hash(s->opcode,s->format)];
|
|
|
/* go to the last entry in the chain */
|
/* go to the last entry in the chain */
|
while (h->next)
|
while (h->next)
|
h = h->next;
|
h = h->next;
|
|
|
if (h->ops)
|
if (h->ops)
|
{
|
{
|
h->next = (struct hash_entry *) calloc(1,sizeof(struct hash_entry));
|
h->next = (struct hash_entry *) calloc(1,sizeof(struct hash_entry));
|
if (!h->next)
|
if (!h->next)
|
perror ("malloc failure");
|
perror ("malloc failure");
|
|
|
h = h->next;
|
h = h->next;
|
}
|
}
|
h->ops = s;
|
h->ops = s;
|
h->mask = s->mask;
|
h->mask = s->mask;
|
h->opcode = s->opcode;
|
h->opcode = s->opcode;
|
h->size = s->is_long;
|
h->size = s->is_long;
|
}
|
}
|
}
|
}
|
|
|
/* reset the processor state */
|
/* reset the processor state */
|
if (!State.mem.data[0])
|
if (!State.mem.data[0])
|
sim_size (1);
|
sim_size (1);
|
sim_create_inferior ((SIM_DESC) 1, NULL, NULL, NULL);
|
sim_create_inferior ((SIM_DESC) 1, NULL, NULL, NULL);
|
|
|
/* Fudge our descriptor. */
|
/* Fudge our descriptor. */
|
return (SIM_DESC) 1;
|
return (SIM_DESC) 1;
|
}
|
}
|
|
|
|
|
void
|
void
|
sim_close (sd, quitting)
|
sim_close (sd, quitting)
|
SIM_DESC sd;
|
SIM_DESC sd;
|
int quitting;
|
int quitting;
|
{
|
{
|
if (prog_bfd != NULL && prog_bfd_was_opened_p)
|
if (prog_bfd != NULL && prog_bfd_was_opened_p)
|
{
|
{
|
bfd_close (prog_bfd);
|
bfd_close (prog_bfd);
|
prog_bfd = NULL;
|
prog_bfd = NULL;
|
prog_bfd_was_opened_p = 0;
|
prog_bfd_was_opened_p = 0;
|
}
|
}
|
}
|
}
|
|
|
void
|
void
|
sim_set_profile (n)
|
sim_set_profile (n)
|
int n;
|
int n;
|
{
|
{
|
(*d10v_callback->printf_filtered) (d10v_callback, "sim_set_profile %d\n",n);
|
(*d10v_callback->printf_filtered) (d10v_callback, "sim_set_profile %d\n",n);
|
}
|
}
|
|
|
void
|
void
|
sim_set_profile_size (n)
|
sim_set_profile_size (n)
|
int n;
|
int n;
|
{
|
{
|
(*d10v_callback->printf_filtered) (d10v_callback, "sim_set_profile_size %d\n",n);
|
(*d10v_callback->printf_filtered) (d10v_callback, "sim_set_profile_size %d\n",n);
|
}
|
}
|
|
|
uint8 *
|
uint8 *
|
dmem_addr (uint16 offset)
|
dmem_addr (uint16 offset)
|
{
|
{
|
unsigned long phys;
|
unsigned long phys;
|
uint8 *mem;
|
uint8 *mem;
|
int phys_size;
|
int phys_size;
|
|
|
/* Note: DMEM address range is 0..0x10000. Calling code can compute
|
/* Note: DMEM address range is 0..0x10000. Calling code can compute
|
things like ``0xfffe + 0x0e60 == 0x10e5d''. Since offset's type
|
things like ``0xfffe + 0x0e60 == 0x10e5d''. Since offset's type
|
is uint16 this is modulo'ed onto 0x0e5d. */
|
is uint16 this is modulo'ed onto 0x0e5d. */
|
|
|
phys_size = sim_d10v_translate_dmap_addr (offset, 1, &phys, NULL,
|
phys_size = sim_d10v_translate_dmap_addr (offset, 1, &phys, NULL,
|
dmap_register);
|
dmap_register);
|
if (phys_size == 0)
|
if (phys_size == 0)
|
{
|
{
|
mem = State.mem.fault;
|
mem = State.mem.fault;
|
}
|
}
|
else
|
else
|
mem = map_memory (phys);
|
mem = map_memory (phys);
|
#ifdef DEBUG
|
#ifdef DEBUG
|
if ((d10v_debug & DEBUG_MEMORY))
|
if ((d10v_debug & DEBUG_MEMORY))
|
{
|
{
|
(*d10v_callback->printf_filtered)
|
(*d10v_callback->printf_filtered)
|
(d10v_callback,
|
(d10v_callback,
|
"mem: 0x%08x (%s) -> 0x%08lx %d (%s) -> 0x%08lx (%s)\n",
|
"mem: 0x%08x (%s) -> 0x%08lx %d (%s) -> 0x%08lx (%s)\n",
|
offset, last_from,
|
offset, last_from,
|
phys, phys_size, last_to,
|
phys, phys_size, last_to,
|
(long) mem, last_segname);
|
(long) mem, last_segname);
|
}
|
}
|
#endif
|
#endif
|
return mem;
|
return mem;
|
}
|
}
|
|
|
uint8 *
|
uint8 *
|
imem_addr (uint32 offset)
|
imem_addr (uint32 offset)
|
{
|
{
|
unsigned long phys;
|
unsigned long phys;
|
uint8 *mem;
|
uint8 *mem;
|
int phys_size = sim_d10v_translate_imap_addr (offset, 1, &phys, NULL,
|
int phys_size = sim_d10v_translate_imap_addr (offset, 1, &phys, NULL,
|
imap_register);
|
imap_register);
|
if (phys_size == 0)
|
if (phys_size == 0)
|
{
|
{
|
return State.mem.fault;
|
return State.mem.fault;
|
}
|
}
|
mem = map_memory (phys);
|
mem = map_memory (phys);
|
#ifdef DEBUG
|
#ifdef DEBUG
|
if ((d10v_debug & DEBUG_MEMORY))
|
if ((d10v_debug & DEBUG_MEMORY))
|
{
|
{
|
(*d10v_callback->printf_filtered)
|
(*d10v_callback->printf_filtered)
|
(d10v_callback,
|
(d10v_callback,
|
"mem: 0x%08x (%s) -> 0x%08lx %d (%s) -> 0x%08lx (%s)\n",
|
"mem: 0x%08x (%s) -> 0x%08lx %d (%s) -> 0x%08lx (%s)\n",
|
offset, last_from,
|
offset, last_from,
|
phys, phys_size, last_to,
|
phys, phys_size, last_to,
|
(long) mem, last_segname);
|
(long) mem, last_segname);
|
}
|
}
|
#endif
|
#endif
|
return mem;
|
return mem;
|
}
|
}
|
|
|
static int stop_simulator = 0;
|
static int stop_simulator = 0;
|
|
|
int
|
int
|
sim_stop (sd)
|
sim_stop (sd)
|
SIM_DESC sd;
|
SIM_DESC sd;
|
{
|
{
|
stop_simulator = 1;
|
stop_simulator = 1;
|
return 1;
|
return 1;
|
}
|
}
|
|
|
|
|
/* Run (or resume) the program. */
|
/* Run (or resume) the program. */
|
void
|
void
|
sim_resume (sd, step, siggnal)
|
sim_resume (sd, step, siggnal)
|
SIM_DESC sd;
|
SIM_DESC sd;
|
int step, siggnal;
|
int step, siggnal;
|
{
|
{
|
uint32 inst;
|
uint32 inst;
|
uint8 *iaddr;
|
uint8 *iaddr;
|
|
|
/* (*d10v_callback->printf_filtered) (d10v_callback, "sim_resume (%d,%d) PC=0x%x\n",step,siggnal,PC); */
|
/* (*d10v_callback->printf_filtered) (d10v_callback, "sim_resume (%d,%d) PC=0x%x\n",step,siggnal,PC); */
|
State.exception = 0;
|
State.exception = 0;
|
if (step)
|
if (step)
|
sim_stop (sd);
|
sim_stop (sd);
|
|
|
switch (siggnal)
|
switch (siggnal)
|
{
|
{
|
case 0:
|
case 0:
|
break;
|
break;
|
#ifdef SIGBUS
|
#ifdef SIGBUS
|
case SIGBUS:
|
case SIGBUS:
|
#endif
|
#endif
|
case SIGSEGV:
|
case SIGSEGV:
|
SET_BPC (PC);
|
SET_BPC (PC);
|
SET_BPSW (PSW);
|
SET_BPSW (PSW);
|
SET_HW_PSW ((PSW & (PSW_F0_BIT | PSW_F1_BIT | PSW_C_BIT)));
|
SET_HW_PSW ((PSW & (PSW_F0_BIT | PSW_F1_BIT | PSW_C_BIT)));
|
JMP (AE_VECTOR_START);
|
JMP (AE_VECTOR_START);
|
SLOT_FLUSH ();
|
SLOT_FLUSH ();
|
break;
|
break;
|
case SIGILL:
|
case SIGILL:
|
SET_BPC (PC);
|
SET_BPC (PC);
|
SET_BPSW (PSW);
|
SET_BPSW (PSW);
|
SET_HW_PSW ((PSW & (PSW_F0_BIT | PSW_F1_BIT | PSW_C_BIT)));
|
SET_HW_PSW ((PSW & (PSW_F0_BIT | PSW_F1_BIT | PSW_C_BIT)));
|
JMP (RIE_VECTOR_START);
|
JMP (RIE_VECTOR_START);
|
SLOT_FLUSH ();
|
SLOT_FLUSH ();
|
break;
|
break;
|
default:
|
default:
|
/* just ignore it */
|
/* just ignore it */
|
break;
|
break;
|
}
|
}
|
|
|
do
|
do
|
{
|
{
|
iaddr = imem_addr ((uint32)PC << 2);
|
iaddr = imem_addr ((uint32)PC << 2);
|
if (iaddr == State.mem.fault)
|
if (iaddr == State.mem.fault)
|
{
|
{
|
State.exception = SIGBUS;
|
State.exception = SIGBUS;
|
break;
|
break;
|
}
|
}
|
|
|
inst = get_longword( iaddr );
|
inst = get_longword( iaddr );
|
|
|
State.pc_changed = 0;
|
State.pc_changed = 0;
|
ins_type_counters[ (int)INS_CYCLES ]++;
|
ins_type_counters[ (int)INS_CYCLES ]++;
|
|
|
switch (inst & 0xC0000000)
|
switch (inst & 0xC0000000)
|
{
|
{
|
case 0xC0000000:
|
case 0xC0000000:
|
/* long instruction */
|
/* long instruction */
|
do_long (inst & 0x3FFFFFFF);
|
do_long (inst & 0x3FFFFFFF);
|
break;
|
break;
|
case 0x80000000:
|
case 0x80000000:
|
/* R -> L */
|
/* R -> L */
|
do_2_short ( inst & 0x7FFF, (inst & 0x3FFF8000) >> 15, RIGHT_FIRST);
|
do_2_short ( inst & 0x7FFF, (inst & 0x3FFF8000) >> 15, RIGHT_FIRST);
|
break;
|
break;
|
case 0x40000000:
|
case 0x40000000:
|
/* L -> R */
|
/* L -> R */
|
do_2_short ((inst & 0x3FFF8000) >> 15, inst & 0x7FFF, LEFT_FIRST);
|
do_2_short ((inst & 0x3FFF8000) >> 15, inst & 0x7FFF, LEFT_FIRST);
|
break;
|
break;
|
case 0:
|
case 0:
|
do_parallel ((inst & 0x3FFF8000) >> 15, inst & 0x7FFF);
|
do_parallel ((inst & 0x3FFF8000) >> 15, inst & 0x7FFF);
|
break;
|
break;
|
}
|
}
|
|
|
/* If the PC of the current instruction matches RPT_E then
|
/* If the PC of the current instruction matches RPT_E then
|
schedule a branch to the loop start. If one of those
|
schedule a branch to the loop start. If one of those
|
instructions happens to be a branch, than that instruction
|
instructions happens to be a branch, than that instruction
|
will be ignored */
|
will be ignored */
|
if (!State.pc_changed)
|
if (!State.pc_changed)
|
{
|
{
|
if (PSW_RP && PC == RPT_E)
|
if (PSW_RP && PC == RPT_E)
|
{
|
{
|
/* Note: The behavour of a branch instruction at RPT_E
|
/* Note: The behavour of a branch instruction at RPT_E
|
is implementation dependant, this simulator takes the
|
is implementation dependant, this simulator takes the
|
branch. Branching to RPT_E is valid, the instruction
|
branch. Branching to RPT_E is valid, the instruction
|
must be executed before the loop is taken. */
|
must be executed before the loop is taken. */
|
if (RPT_C == 1)
|
if (RPT_C == 1)
|
{
|
{
|
SET_PSW_RP (0);
|
SET_PSW_RP (0);
|
SET_RPT_C (0);
|
SET_RPT_C (0);
|
SET_PC (PC + 1);
|
SET_PC (PC + 1);
|
}
|
}
|
else
|
else
|
{
|
{
|
SET_RPT_C (RPT_C - 1);
|
SET_RPT_C (RPT_C - 1);
|
SET_PC (RPT_S);
|
SET_PC (RPT_S);
|
}
|
}
|
}
|
}
|
else
|
else
|
SET_PC (PC + 1);
|
SET_PC (PC + 1);
|
}
|
}
|
|
|
/* Check for a breakpoint trap on this instruction. This
|
/* Check for a breakpoint trap on this instruction. This
|
overrides any pending branches or loops */
|
overrides any pending branches or loops */
|
if (PSW_DB && PC == IBA)
|
if (PSW_DB && PC == IBA)
|
{
|
{
|
SET_BPC (PC);
|
SET_BPC (PC);
|
SET_BPSW (PSW);
|
SET_BPSW (PSW);
|
SET_PSW (PSW & PSW_SM_BIT);
|
SET_PSW (PSW & PSW_SM_BIT);
|
SET_PC (SDBT_VECTOR_START);
|
SET_PC (SDBT_VECTOR_START);
|
}
|
}
|
|
|
/* Writeback all the DATA / PC changes */
|
/* Writeback all the DATA / PC changes */
|
SLOT_FLUSH ();
|
SLOT_FLUSH ();
|
|
|
#ifdef NEED_UI_LOOP_HOOK
|
#ifdef NEED_UI_LOOP_HOOK
|
if (deprecated_ui_loop_hook != NULL && ui_loop_hook_counter-- < 0)
|
if (deprecated_ui_loop_hook != NULL && ui_loop_hook_counter-- < 0)
|
{
|
{
|
ui_loop_hook_counter = UI_LOOP_POLL_INTERVAL;
|
ui_loop_hook_counter = UI_LOOP_POLL_INTERVAL;
|
deprecated_ui_loop_hook (0);
|
deprecated_ui_loop_hook (0);
|
}
|
}
|
#endif /* NEED_UI_LOOP_HOOK */
|
#endif /* NEED_UI_LOOP_HOOK */
|
}
|
}
|
while ( !State.exception && !stop_simulator);
|
while ( !State.exception && !stop_simulator);
|
|
|
if (step && !State.exception)
|
if (step && !State.exception)
|
State.exception = SIGTRAP;
|
State.exception = SIGTRAP;
|
}
|
}
|
|
|
void
|
void
|
sim_set_trace (void)
|
sim_set_trace (void)
|
{
|
{
|
#ifdef DEBUG
|
#ifdef DEBUG
|
d10v_debug = DEBUG;
|
d10v_debug = DEBUG;
|
#endif
|
#endif
|
}
|
}
|
|
|
void
|
void
|
sim_info (sd, verbose)
|
sim_info (sd, verbose)
|
SIM_DESC sd;
|
SIM_DESC sd;
|
int verbose;
|
int verbose;
|
{
|
{
|
char buf1[40];
|
char buf1[40];
|
char buf2[40];
|
char buf2[40];
|
char buf3[40];
|
char buf3[40];
|
char buf4[40];
|
char buf4[40];
|
char buf5[40];
|
char buf5[40];
|
unsigned long left = ins_type_counters[ (int)INS_LEFT ] + ins_type_counters[ (int)INS_LEFT_COND_EXE ];
|
unsigned long left = ins_type_counters[ (int)INS_LEFT ] + ins_type_counters[ (int)INS_LEFT_COND_EXE ];
|
unsigned long left_nops = ins_type_counters[ (int)INS_LEFT_NOPS ];
|
unsigned long left_nops = ins_type_counters[ (int)INS_LEFT_NOPS ];
|
unsigned long left_parallel = ins_type_counters[ (int)INS_LEFT_PARALLEL ];
|
unsigned long left_parallel = ins_type_counters[ (int)INS_LEFT_PARALLEL ];
|
unsigned long left_cond = ins_type_counters[ (int)INS_LEFT_COND_TEST ];
|
unsigned long left_cond = ins_type_counters[ (int)INS_LEFT_COND_TEST ];
|
unsigned long left_total = left + left_parallel + left_cond + left_nops;
|
unsigned long left_total = left + left_parallel + left_cond + left_nops;
|
|
|
unsigned long right = ins_type_counters[ (int)INS_RIGHT ] + ins_type_counters[ (int)INS_RIGHT_COND_EXE ];
|
unsigned long right = ins_type_counters[ (int)INS_RIGHT ] + ins_type_counters[ (int)INS_RIGHT_COND_EXE ];
|
unsigned long right_nops = ins_type_counters[ (int)INS_RIGHT_NOPS ];
|
unsigned long right_nops = ins_type_counters[ (int)INS_RIGHT_NOPS ];
|
unsigned long right_parallel = ins_type_counters[ (int)INS_RIGHT_PARALLEL ];
|
unsigned long right_parallel = ins_type_counters[ (int)INS_RIGHT_PARALLEL ];
|
unsigned long right_cond = ins_type_counters[ (int)INS_RIGHT_COND_TEST ];
|
unsigned long right_cond = ins_type_counters[ (int)INS_RIGHT_COND_TEST ];
|
unsigned long right_total = right + right_parallel + right_cond + right_nops;
|
unsigned long right_total = right + right_parallel + right_cond + right_nops;
|
|
|
unsigned long unknown = ins_type_counters[ (int)INS_UNKNOWN ];
|
unsigned long unknown = ins_type_counters[ (int)INS_UNKNOWN ];
|
unsigned long ins_long = ins_type_counters[ (int)INS_LONG ];
|
unsigned long ins_long = ins_type_counters[ (int)INS_LONG ];
|
unsigned long parallel = ins_type_counters[ (int)INS_PARALLEL ];
|
unsigned long parallel = ins_type_counters[ (int)INS_PARALLEL ];
|
unsigned long leftright = ins_type_counters[ (int)INS_LEFTRIGHT ];
|
unsigned long leftright = ins_type_counters[ (int)INS_LEFTRIGHT ];
|
unsigned long rightleft = ins_type_counters[ (int)INS_RIGHTLEFT ];
|
unsigned long rightleft = ins_type_counters[ (int)INS_RIGHTLEFT ];
|
unsigned long cond_true = ins_type_counters[ (int)INS_COND_TRUE ];
|
unsigned long cond_true = ins_type_counters[ (int)INS_COND_TRUE ];
|
unsigned long cond_false = ins_type_counters[ (int)INS_COND_FALSE ];
|
unsigned long cond_false = ins_type_counters[ (int)INS_COND_FALSE ];
|
unsigned long cond_jump = ins_type_counters[ (int)INS_COND_JUMP ];
|
unsigned long cond_jump = ins_type_counters[ (int)INS_COND_JUMP ];
|
unsigned long cycles = ins_type_counters[ (int)INS_CYCLES ];
|
unsigned long cycles = ins_type_counters[ (int)INS_CYCLES ];
|
unsigned long total = (unknown + left_total + right_total + ins_long);
|
unsigned long total = (unknown + left_total + right_total + ins_long);
|
|
|
int size = strlen (add_commas (buf1, sizeof (buf1), total));
|
int size = strlen (add_commas (buf1, sizeof (buf1), total));
|
int parallel_size = strlen (add_commas (buf1, sizeof (buf1),
|
int parallel_size = strlen (add_commas (buf1, sizeof (buf1),
|
(left_parallel > right_parallel) ? left_parallel : right_parallel));
|
(left_parallel > right_parallel) ? left_parallel : right_parallel));
|
int cond_size = strlen (add_commas (buf1, sizeof (buf1), (left_cond > right_cond) ? left_cond : right_cond));
|
int cond_size = strlen (add_commas (buf1, sizeof (buf1), (left_cond > right_cond) ? left_cond : right_cond));
|
int nop_size = strlen (add_commas (buf1, sizeof (buf1), (left_nops > right_nops) ? left_nops : right_nops));
|
int nop_size = strlen (add_commas (buf1, sizeof (buf1), (left_nops > right_nops) ? left_nops : right_nops));
|
int normal_size = strlen (add_commas (buf1, sizeof (buf1), (left > right) ? left : right));
|
int normal_size = strlen (add_commas (buf1, sizeof (buf1), (left > right) ? left : right));
|
|
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
"executed %*s left instruction(s), %*s normal, %*s parallel, %*s EXExxx, %*s nops\n",
|
"executed %*s left instruction(s), %*s normal, %*s parallel, %*s EXExxx, %*s nops\n",
|
size, add_commas (buf1, sizeof (buf1), left_total),
|
size, add_commas (buf1, sizeof (buf1), left_total),
|
normal_size, add_commas (buf2, sizeof (buf2), left),
|
normal_size, add_commas (buf2, sizeof (buf2), left),
|
parallel_size, add_commas (buf3, sizeof (buf3), left_parallel),
|
parallel_size, add_commas (buf3, sizeof (buf3), left_parallel),
|
cond_size, add_commas (buf4, sizeof (buf4), left_cond),
|
cond_size, add_commas (buf4, sizeof (buf4), left_cond),
|
nop_size, add_commas (buf5, sizeof (buf5), left_nops));
|
nop_size, add_commas (buf5, sizeof (buf5), left_nops));
|
|
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
"executed %*s right instruction(s), %*s normal, %*s parallel, %*s EXExxx, %*s nops\n",
|
"executed %*s right instruction(s), %*s normal, %*s parallel, %*s EXExxx, %*s nops\n",
|
size, add_commas (buf1, sizeof (buf1), right_total),
|
size, add_commas (buf1, sizeof (buf1), right_total),
|
normal_size, add_commas (buf2, sizeof (buf2), right),
|
normal_size, add_commas (buf2, sizeof (buf2), right),
|
parallel_size, add_commas (buf3, sizeof (buf3), right_parallel),
|
parallel_size, add_commas (buf3, sizeof (buf3), right_parallel),
|
cond_size, add_commas (buf4, sizeof (buf4), right_cond),
|
cond_size, add_commas (buf4, sizeof (buf4), right_cond),
|
nop_size, add_commas (buf5, sizeof (buf5), right_nops));
|
nop_size, add_commas (buf5, sizeof (buf5), right_nops));
|
|
|
if (ins_long)
|
if (ins_long)
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
"executed %*s long instruction(s)\n",
|
"executed %*s long instruction(s)\n",
|
size, add_commas (buf1, sizeof (buf1), ins_long));
|
size, add_commas (buf1, sizeof (buf1), ins_long));
|
|
|
if (parallel)
|
if (parallel)
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
"executed %*s parallel instruction(s)\n",
|
"executed %*s parallel instruction(s)\n",
|
size, add_commas (buf1, sizeof (buf1), parallel));
|
size, add_commas (buf1, sizeof (buf1), parallel));
|
|
|
if (leftright)
|
if (leftright)
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
"executed %*s instruction(s) encoded L->R\n",
|
"executed %*s instruction(s) encoded L->R\n",
|
size, add_commas (buf1, sizeof (buf1), leftright));
|
size, add_commas (buf1, sizeof (buf1), leftright));
|
|
|
if (rightleft)
|
if (rightleft)
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
"executed %*s instruction(s) encoded R->L\n",
|
"executed %*s instruction(s) encoded R->L\n",
|
size, add_commas (buf1, sizeof (buf1), rightleft));
|
size, add_commas (buf1, sizeof (buf1), rightleft));
|
|
|
if (unknown)
|
if (unknown)
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
"executed %*s unknown instruction(s)\n",
|
"executed %*s unknown instruction(s)\n",
|
size, add_commas (buf1, sizeof (buf1), unknown));
|
size, add_commas (buf1, sizeof (buf1), unknown));
|
|
|
if (cond_true)
|
if (cond_true)
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
"executed %*s instruction(s) due to EXExxx condition being true\n",
|
"executed %*s instruction(s) due to EXExxx condition being true\n",
|
size, add_commas (buf1, sizeof (buf1), cond_true));
|
size, add_commas (buf1, sizeof (buf1), cond_true));
|
|
|
if (cond_false)
|
if (cond_false)
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
"skipped %*s instruction(s) due to EXExxx condition being false\n",
|
"skipped %*s instruction(s) due to EXExxx condition being false\n",
|
size, add_commas (buf1, sizeof (buf1), cond_false));
|
size, add_commas (buf1, sizeof (buf1), cond_false));
|
|
|
if (cond_jump)
|
if (cond_jump)
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
"skipped %*s instruction(s) due to conditional branch succeeding\n",
|
"skipped %*s instruction(s) due to conditional branch succeeding\n",
|
size, add_commas (buf1, sizeof (buf1), cond_jump));
|
size, add_commas (buf1, sizeof (buf1), cond_jump));
|
|
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
"executed %*s cycle(s)\n",
|
"executed %*s cycle(s)\n",
|
size, add_commas (buf1, sizeof (buf1), cycles));
|
size, add_commas (buf1, sizeof (buf1), cycles));
|
|
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
"executed %*s total instructions\n",
|
"executed %*s total instructions\n",
|
size, add_commas (buf1, sizeof (buf1), total));
|
size, add_commas (buf1, sizeof (buf1), total));
|
}
|
}
|
|
|
SIM_RC
|
SIM_RC
|
sim_create_inferior (sd, abfd, argv, env)
|
sim_create_inferior (sd, abfd, argv, env)
|
SIM_DESC sd;
|
SIM_DESC sd;
|
struct bfd *abfd;
|
struct bfd *abfd;
|
char **argv;
|
char **argv;
|
char **env;
|
char **env;
|
{
|
{
|
bfd_vma start_address;
|
bfd_vma start_address;
|
|
|
/* reset all state information */
|
/* reset all state information */
|
memset (&State.regs, 0, (int)&State.mem - (int)&State.regs);
|
memset (&State.regs, 0, (int)&State.mem - (int)&State.regs);
|
|
|
/* There was a hack here to copy the values of argc and argv into r0
|
/* There was a hack here to copy the values of argc and argv into r0
|
and r1. The values were also saved into some high memory that
|
and r1. The values were also saved into some high memory that
|
won't be overwritten by the stack (0x7C00). The reason for doing
|
won't be overwritten by the stack (0x7C00). The reason for doing
|
this was to allow the 'run' program to accept arguments. Without
|
this was to allow the 'run' program to accept arguments. Without
|
the hack, this is not possible anymore. If the simulator is run
|
the hack, this is not possible anymore. If the simulator is run
|
from the debugger, arguments cannot be passed in, so this makes
|
from the debugger, arguments cannot be passed in, so this makes
|
no difference. */
|
no difference. */
|
|
|
/* set PC */
|
/* set PC */
|
if (abfd != NULL)
|
if (abfd != NULL)
|
start_address = bfd_get_start_address (abfd);
|
start_address = bfd_get_start_address (abfd);
|
else
|
else
|
start_address = 0xffc0 << 2;
|
start_address = 0xffc0 << 2;
|
#ifdef DEBUG
|
#ifdef DEBUG
|
if (d10v_debug)
|
if (d10v_debug)
|
(*d10v_callback->printf_filtered) (d10v_callback, "sim_create_inferior: PC=0x%lx\n", (long) start_address);
|
(*d10v_callback->printf_filtered) (d10v_callback, "sim_create_inferior: PC=0x%lx\n", (long) start_address);
|
#endif
|
#endif
|
SET_CREG (PC_CR, start_address >> 2);
|
SET_CREG (PC_CR, start_address >> 2);
|
|
|
/* cpu resets imap0 to 0 and imap1 to 0x7f, but D10V-EVA board
|
/* cpu resets imap0 to 0 and imap1 to 0x7f, but D10V-EVA board
|
initializes imap0 and imap1 to 0x1000 as part of its ROM
|
initializes imap0 and imap1 to 0x1000 as part of its ROM
|
initialization. */
|
initialization. */
|
if (old_segment_mapping)
|
if (old_segment_mapping)
|
{
|
{
|
/* External memory startup. This is the HARD reset state. */
|
/* External memory startup. This is the HARD reset state. */
|
set_imap_register (0, 0x0000);
|
set_imap_register (0, 0x0000);
|
set_imap_register (1, 0x007f);
|
set_imap_register (1, 0x007f);
|
set_dmap_register (0, 0x2000);
|
set_dmap_register (0, 0x2000);
|
set_dmap_register (1, 0x2000);
|
set_dmap_register (1, 0x2000);
|
set_dmap_register (2, 0x0000); /* Old DMAP */
|
set_dmap_register (2, 0x0000); /* Old DMAP */
|
set_dmap_register (3, 0x0000);
|
set_dmap_register (3, 0x0000);
|
}
|
}
|
else
|
else
|
{
|
{
|
/* Internal memory startup. This is the ROM intialized state. */
|
/* Internal memory startup. This is the ROM intialized state. */
|
set_imap_register (0, 0x1000);
|
set_imap_register (0, 0x1000);
|
set_imap_register (1, 0x1000);
|
set_imap_register (1, 0x1000);
|
set_dmap_register (0, 0x2000);
|
set_dmap_register (0, 0x2000);
|
set_dmap_register (1, 0x2000);
|
set_dmap_register (1, 0x2000);
|
set_dmap_register (2, 0x2000); /* DMAP2 initial internal value is
|
set_dmap_register (2, 0x2000); /* DMAP2 initial internal value is
|
0x2000 on the new board. */
|
0x2000 on the new board. */
|
set_dmap_register (3, 0x0000);
|
set_dmap_register (3, 0x0000);
|
}
|
}
|
|
|
SLOT_FLUSH ();
|
SLOT_FLUSH ();
|
return SIM_RC_OK;
|
return SIM_RC_OK;
|
}
|
}
|
|
|
|
|
void
|
void
|
sim_set_callbacks (p)
|
sim_set_callbacks (p)
|
host_callback *p;
|
host_callback *p;
|
{
|
{
|
d10v_callback = p;
|
d10v_callback = p;
|
}
|
}
|
|
|
void
|
void
|
sim_stop_reason (sd, reason, sigrc)
|
sim_stop_reason (sd, reason, sigrc)
|
SIM_DESC sd;
|
SIM_DESC sd;
|
enum sim_stop *reason;
|
enum sim_stop *reason;
|
int *sigrc;
|
int *sigrc;
|
{
|
{
|
/* (*d10v_callback->printf_filtered) (d10v_callback, "sim_stop_reason: PC=0x%x\n",PC<<2); */
|
/* (*d10v_callback->printf_filtered) (d10v_callback, "sim_stop_reason: PC=0x%x\n",PC<<2); */
|
|
|
switch (State.exception)
|
switch (State.exception)
|
{
|
{
|
case SIG_D10V_STOP: /* stop instruction */
|
case SIG_D10V_STOP: /* stop instruction */
|
*reason = sim_exited;
|
*reason = sim_exited;
|
*sigrc = 0;
|
*sigrc = 0;
|
break;
|
break;
|
|
|
case SIG_D10V_EXIT: /* exit trap */
|
case SIG_D10V_EXIT: /* exit trap */
|
*reason = sim_exited;
|
*reason = sim_exited;
|
*sigrc = GPR (0);
|
*sigrc = GPR (0);
|
break;
|
break;
|
|
|
case SIG_D10V_BUS:
|
case SIG_D10V_BUS:
|
*reason = sim_stopped;
|
*reason = sim_stopped;
|
*sigrc = TARGET_SIGNAL_BUS;
|
*sigrc = TARGET_SIGNAL_BUS;
|
break;
|
break;
|
|
|
default: /* some signal */
|
default: /* some signal */
|
*reason = sim_stopped;
|
*reason = sim_stopped;
|
if (stop_simulator && !State.exception)
|
if (stop_simulator && !State.exception)
|
*sigrc = TARGET_SIGNAL_INT;
|
*sigrc = TARGET_SIGNAL_INT;
|
else
|
else
|
*sigrc = State.exception;
|
*sigrc = State.exception;
|
break;
|
break;
|
}
|
}
|
|
|
stop_simulator = 0;
|
stop_simulator = 0;
|
}
|
}
|
|
|
int
|
int
|
sim_fetch_register (sd, rn, memory, length)
|
sim_fetch_register (sd, rn, memory, length)
|
SIM_DESC sd;
|
SIM_DESC sd;
|
int rn;
|
int rn;
|
unsigned char *memory;
|
unsigned char *memory;
|
int length;
|
int length;
|
{
|
{
|
int size;
|
int size;
|
switch ((enum sim_d10v_regs) rn)
|
switch ((enum sim_d10v_regs) rn)
|
{
|
{
|
case SIM_D10V_R0_REGNUM:
|
case SIM_D10V_R0_REGNUM:
|
case SIM_D10V_R1_REGNUM:
|
case SIM_D10V_R1_REGNUM:
|
case SIM_D10V_R2_REGNUM:
|
case SIM_D10V_R2_REGNUM:
|
case SIM_D10V_R3_REGNUM:
|
case SIM_D10V_R3_REGNUM:
|
case SIM_D10V_R4_REGNUM:
|
case SIM_D10V_R4_REGNUM:
|
case SIM_D10V_R5_REGNUM:
|
case SIM_D10V_R5_REGNUM:
|
case SIM_D10V_R6_REGNUM:
|
case SIM_D10V_R6_REGNUM:
|
case SIM_D10V_R7_REGNUM:
|
case SIM_D10V_R7_REGNUM:
|
case SIM_D10V_R8_REGNUM:
|
case SIM_D10V_R8_REGNUM:
|
case SIM_D10V_R9_REGNUM:
|
case SIM_D10V_R9_REGNUM:
|
case SIM_D10V_R10_REGNUM:
|
case SIM_D10V_R10_REGNUM:
|
case SIM_D10V_R11_REGNUM:
|
case SIM_D10V_R11_REGNUM:
|
case SIM_D10V_R12_REGNUM:
|
case SIM_D10V_R12_REGNUM:
|
case SIM_D10V_R13_REGNUM:
|
case SIM_D10V_R13_REGNUM:
|
case SIM_D10V_R14_REGNUM:
|
case SIM_D10V_R14_REGNUM:
|
case SIM_D10V_R15_REGNUM:
|
case SIM_D10V_R15_REGNUM:
|
WRITE_16 (memory, GPR (rn - SIM_D10V_R0_REGNUM));
|
WRITE_16 (memory, GPR (rn - SIM_D10V_R0_REGNUM));
|
size = 2;
|
size = 2;
|
break;
|
break;
|
case SIM_D10V_CR0_REGNUM:
|
case SIM_D10V_CR0_REGNUM:
|
case SIM_D10V_CR1_REGNUM:
|
case SIM_D10V_CR1_REGNUM:
|
case SIM_D10V_CR2_REGNUM:
|
case SIM_D10V_CR2_REGNUM:
|
case SIM_D10V_CR3_REGNUM:
|
case SIM_D10V_CR3_REGNUM:
|
case SIM_D10V_CR4_REGNUM:
|
case SIM_D10V_CR4_REGNUM:
|
case SIM_D10V_CR5_REGNUM:
|
case SIM_D10V_CR5_REGNUM:
|
case SIM_D10V_CR6_REGNUM:
|
case SIM_D10V_CR6_REGNUM:
|
case SIM_D10V_CR7_REGNUM:
|
case SIM_D10V_CR7_REGNUM:
|
case SIM_D10V_CR8_REGNUM:
|
case SIM_D10V_CR8_REGNUM:
|
case SIM_D10V_CR9_REGNUM:
|
case SIM_D10V_CR9_REGNUM:
|
case SIM_D10V_CR10_REGNUM:
|
case SIM_D10V_CR10_REGNUM:
|
case SIM_D10V_CR11_REGNUM:
|
case SIM_D10V_CR11_REGNUM:
|
case SIM_D10V_CR12_REGNUM:
|
case SIM_D10V_CR12_REGNUM:
|
case SIM_D10V_CR13_REGNUM:
|
case SIM_D10V_CR13_REGNUM:
|
case SIM_D10V_CR14_REGNUM:
|
case SIM_D10V_CR14_REGNUM:
|
case SIM_D10V_CR15_REGNUM:
|
case SIM_D10V_CR15_REGNUM:
|
WRITE_16 (memory, CREG (rn - SIM_D10V_CR0_REGNUM));
|
WRITE_16 (memory, CREG (rn - SIM_D10V_CR0_REGNUM));
|
size = 2;
|
size = 2;
|
break;
|
break;
|
case SIM_D10V_A0_REGNUM:
|
case SIM_D10V_A0_REGNUM:
|
case SIM_D10V_A1_REGNUM:
|
case SIM_D10V_A1_REGNUM:
|
WRITE_64 (memory, ACC (rn - SIM_D10V_A0_REGNUM));
|
WRITE_64 (memory, ACC (rn - SIM_D10V_A0_REGNUM));
|
size = 8;
|
size = 8;
|
break;
|
break;
|
case SIM_D10V_SPI_REGNUM:
|
case SIM_D10V_SPI_REGNUM:
|
/* PSW_SM indicates that the current SP is the USER
|
/* PSW_SM indicates that the current SP is the USER
|
stack-pointer. */
|
stack-pointer. */
|
WRITE_16 (memory, spi_register ());
|
WRITE_16 (memory, spi_register ());
|
size = 2;
|
size = 2;
|
break;
|
break;
|
case SIM_D10V_SPU_REGNUM:
|
case SIM_D10V_SPU_REGNUM:
|
/* PSW_SM indicates that the current SP is the USER
|
/* PSW_SM indicates that the current SP is the USER
|
stack-pointer. */
|
stack-pointer. */
|
WRITE_16 (memory, spu_register ());
|
WRITE_16 (memory, spu_register ());
|
size = 2;
|
size = 2;
|
break;
|
break;
|
case SIM_D10V_IMAP0_REGNUM:
|
case SIM_D10V_IMAP0_REGNUM:
|
case SIM_D10V_IMAP1_REGNUM:
|
case SIM_D10V_IMAP1_REGNUM:
|
WRITE_16 (memory, imap_register (NULL, rn - SIM_D10V_IMAP0_REGNUM));
|
WRITE_16 (memory, imap_register (NULL, rn - SIM_D10V_IMAP0_REGNUM));
|
size = 2;
|
size = 2;
|
break;
|
break;
|
case SIM_D10V_DMAP0_REGNUM:
|
case SIM_D10V_DMAP0_REGNUM:
|
case SIM_D10V_DMAP1_REGNUM:
|
case SIM_D10V_DMAP1_REGNUM:
|
case SIM_D10V_DMAP2_REGNUM:
|
case SIM_D10V_DMAP2_REGNUM:
|
case SIM_D10V_DMAP3_REGNUM:
|
case SIM_D10V_DMAP3_REGNUM:
|
WRITE_16 (memory, dmap_register (NULL, rn - SIM_D10V_DMAP0_REGNUM));
|
WRITE_16 (memory, dmap_register (NULL, rn - SIM_D10V_DMAP0_REGNUM));
|
size = 2;
|
size = 2;
|
break;
|
break;
|
case SIM_D10V_TS2_DMAP_REGNUM:
|
case SIM_D10V_TS2_DMAP_REGNUM:
|
size = 0;
|
size = 0;
|
break;
|
break;
|
default:
|
default:
|
size = 0;
|
size = 0;
|
break;
|
break;
|
}
|
}
|
return size;
|
return size;
|
}
|
}
|
|
|
int
|
int
|
sim_store_register (sd, rn, memory, length)
|
sim_store_register (sd, rn, memory, length)
|
SIM_DESC sd;
|
SIM_DESC sd;
|
int rn;
|
int rn;
|
unsigned char *memory;
|
unsigned char *memory;
|
int length;
|
int length;
|
{
|
{
|
int size;
|
int size;
|
switch ((enum sim_d10v_regs) rn)
|
switch ((enum sim_d10v_regs) rn)
|
{
|
{
|
case SIM_D10V_R0_REGNUM:
|
case SIM_D10V_R0_REGNUM:
|
case SIM_D10V_R1_REGNUM:
|
case SIM_D10V_R1_REGNUM:
|
case SIM_D10V_R2_REGNUM:
|
case SIM_D10V_R2_REGNUM:
|
case SIM_D10V_R3_REGNUM:
|
case SIM_D10V_R3_REGNUM:
|
case SIM_D10V_R4_REGNUM:
|
case SIM_D10V_R4_REGNUM:
|
case SIM_D10V_R5_REGNUM:
|
case SIM_D10V_R5_REGNUM:
|
case SIM_D10V_R6_REGNUM:
|
case SIM_D10V_R6_REGNUM:
|
case SIM_D10V_R7_REGNUM:
|
case SIM_D10V_R7_REGNUM:
|
case SIM_D10V_R8_REGNUM:
|
case SIM_D10V_R8_REGNUM:
|
case SIM_D10V_R9_REGNUM:
|
case SIM_D10V_R9_REGNUM:
|
case SIM_D10V_R10_REGNUM:
|
case SIM_D10V_R10_REGNUM:
|
case SIM_D10V_R11_REGNUM:
|
case SIM_D10V_R11_REGNUM:
|
case SIM_D10V_R12_REGNUM:
|
case SIM_D10V_R12_REGNUM:
|
case SIM_D10V_R13_REGNUM:
|
case SIM_D10V_R13_REGNUM:
|
case SIM_D10V_R14_REGNUM:
|
case SIM_D10V_R14_REGNUM:
|
case SIM_D10V_R15_REGNUM:
|
case SIM_D10V_R15_REGNUM:
|
SET_GPR (rn - SIM_D10V_R0_REGNUM, READ_16 (memory));
|
SET_GPR (rn - SIM_D10V_R0_REGNUM, READ_16 (memory));
|
size = 2;
|
size = 2;
|
break;
|
break;
|
case SIM_D10V_CR0_REGNUM:
|
case SIM_D10V_CR0_REGNUM:
|
case SIM_D10V_CR1_REGNUM:
|
case SIM_D10V_CR1_REGNUM:
|
case SIM_D10V_CR2_REGNUM:
|
case SIM_D10V_CR2_REGNUM:
|
case SIM_D10V_CR3_REGNUM:
|
case SIM_D10V_CR3_REGNUM:
|
case SIM_D10V_CR4_REGNUM:
|
case SIM_D10V_CR4_REGNUM:
|
case SIM_D10V_CR5_REGNUM:
|
case SIM_D10V_CR5_REGNUM:
|
case SIM_D10V_CR6_REGNUM:
|
case SIM_D10V_CR6_REGNUM:
|
case SIM_D10V_CR7_REGNUM:
|
case SIM_D10V_CR7_REGNUM:
|
case SIM_D10V_CR8_REGNUM:
|
case SIM_D10V_CR8_REGNUM:
|
case SIM_D10V_CR9_REGNUM:
|
case SIM_D10V_CR9_REGNUM:
|
case SIM_D10V_CR10_REGNUM:
|
case SIM_D10V_CR10_REGNUM:
|
case SIM_D10V_CR11_REGNUM:
|
case SIM_D10V_CR11_REGNUM:
|
case SIM_D10V_CR12_REGNUM:
|
case SIM_D10V_CR12_REGNUM:
|
case SIM_D10V_CR13_REGNUM:
|
case SIM_D10V_CR13_REGNUM:
|
case SIM_D10V_CR14_REGNUM:
|
case SIM_D10V_CR14_REGNUM:
|
case SIM_D10V_CR15_REGNUM:
|
case SIM_D10V_CR15_REGNUM:
|
SET_CREG (rn - SIM_D10V_CR0_REGNUM, READ_16 (memory));
|
SET_CREG (rn - SIM_D10V_CR0_REGNUM, READ_16 (memory));
|
size = 2;
|
size = 2;
|
break;
|
break;
|
case SIM_D10V_A0_REGNUM:
|
case SIM_D10V_A0_REGNUM:
|
case SIM_D10V_A1_REGNUM:
|
case SIM_D10V_A1_REGNUM:
|
SET_ACC (rn - SIM_D10V_A0_REGNUM, READ_64 (memory) & MASK40);
|
SET_ACC (rn - SIM_D10V_A0_REGNUM, READ_64 (memory) & MASK40);
|
size = 8;
|
size = 8;
|
break;
|
break;
|
case SIM_D10V_SPI_REGNUM:
|
case SIM_D10V_SPI_REGNUM:
|
/* PSW_SM indicates that the current SP is the USER
|
/* PSW_SM indicates that the current SP is the USER
|
stack-pointer. */
|
stack-pointer. */
|
set_spi_register (READ_16 (memory));
|
set_spi_register (READ_16 (memory));
|
size = 2;
|
size = 2;
|
break;
|
break;
|
case SIM_D10V_SPU_REGNUM:
|
case SIM_D10V_SPU_REGNUM:
|
set_spu_register (READ_16 (memory));
|
set_spu_register (READ_16 (memory));
|
size = 2;
|
size = 2;
|
break;
|
break;
|
case SIM_D10V_IMAP0_REGNUM:
|
case SIM_D10V_IMAP0_REGNUM:
|
case SIM_D10V_IMAP1_REGNUM:
|
case SIM_D10V_IMAP1_REGNUM:
|
set_imap_register (rn - SIM_D10V_IMAP0_REGNUM, READ_16(memory));
|
set_imap_register (rn - SIM_D10V_IMAP0_REGNUM, READ_16(memory));
|
size = 2;
|
size = 2;
|
break;
|
break;
|
case SIM_D10V_DMAP0_REGNUM:
|
case SIM_D10V_DMAP0_REGNUM:
|
case SIM_D10V_DMAP1_REGNUM:
|
case SIM_D10V_DMAP1_REGNUM:
|
case SIM_D10V_DMAP2_REGNUM:
|
case SIM_D10V_DMAP2_REGNUM:
|
case SIM_D10V_DMAP3_REGNUM:
|
case SIM_D10V_DMAP3_REGNUM:
|
set_dmap_register (rn - SIM_D10V_DMAP0_REGNUM, READ_16(memory));
|
set_dmap_register (rn - SIM_D10V_DMAP0_REGNUM, READ_16(memory));
|
size = 2;
|
size = 2;
|
break;
|
break;
|
case SIM_D10V_TS2_DMAP_REGNUM:
|
case SIM_D10V_TS2_DMAP_REGNUM:
|
size = 0;
|
size = 0;
|
break;
|
break;
|
default:
|
default:
|
size = 0;
|
size = 0;
|
break;
|
break;
|
}
|
}
|
SLOT_FLUSH ();
|
SLOT_FLUSH ();
|
return size;
|
return size;
|
}
|
}
|
|
|
|
|
void
|
void
|
sim_do_command (sd, cmd)
|
sim_do_command (sd, cmd)
|
SIM_DESC sd;
|
SIM_DESC sd;
|
char *cmd;
|
char *cmd;
|
{
|
{
|
(*d10v_callback->printf_filtered) (d10v_callback, "sim_do_command: %s\n",cmd);
|
(*d10v_callback->printf_filtered) (d10v_callback, "sim_do_command: %s\n",cmd);
|
}
|
}
|
|
|
SIM_RC
|
SIM_RC
|
sim_load (sd, prog, abfd, from_tty)
|
sim_load (sd, prog, abfd, from_tty)
|
SIM_DESC sd;
|
SIM_DESC sd;
|
char *prog;
|
char *prog;
|
bfd *abfd;
|
bfd *abfd;
|
int from_tty;
|
int from_tty;
|
{
|
{
|
extern bfd *sim_load_file (); /* ??? Don't know where this should live. */
|
extern bfd *sim_load_file (); /* ??? Don't know where this should live. */
|
|
|
if (prog_bfd != NULL && prog_bfd_was_opened_p)
|
if (prog_bfd != NULL && prog_bfd_was_opened_p)
|
{
|
{
|
bfd_close (prog_bfd);
|
bfd_close (prog_bfd);
|
prog_bfd_was_opened_p = 0;
|
prog_bfd_was_opened_p = 0;
|
}
|
}
|
prog_bfd = sim_load_file (sd, myname, d10v_callback, prog, abfd,
|
prog_bfd = sim_load_file (sd, myname, d10v_callback, prog, abfd,
|
sim_kind == SIM_OPEN_DEBUG,
|
sim_kind == SIM_OPEN_DEBUG,
|
1/*LMA*/, sim_write);
|
1/*LMA*/, sim_write);
|
if (prog_bfd == NULL)
|
if (prog_bfd == NULL)
|
return SIM_RC_FAIL;
|
return SIM_RC_FAIL;
|
prog_bfd_was_opened_p = abfd == NULL;
|
prog_bfd_was_opened_p = abfd == NULL;
|
return SIM_RC_OK;
|
return SIM_RC_OK;
|
}
|
}
|
|
|
