/* This file is part of the program psim.
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/* This file is part of the program psim.
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Copyright 1994, 1995, 2002 Andrew Cagney <cagney@highland.com.au>
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Copyright 1994, 1995, 2002 Andrew Cagney <cagney@highland.com.au>
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This program is free software; you can redistribute it and/or modify
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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*/
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#ifndef _PSIM_CONFIG_H_
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#ifndef _PSIM_CONFIG_H_
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#define _PSIM_CONFIG_H_
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#define _PSIM_CONFIG_H_
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/* endianness of the host/target:
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/* endianness of the host/target:
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If the build process is aware (at compile time) of the endianness
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If the build process is aware (at compile time) of the endianness
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of the host/target it is able to eliminate slower generic endian
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of the host/target it is able to eliminate slower generic endian
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handling code.
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handling code.
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Possible values are 0 (unknown), LITTLE_ENDIAN, BIG_ENDIAN */
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Possible values are 0 (unknown), LITTLE_ENDIAN, BIG_ENDIAN */
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#ifndef WITH_HOST_BYTE_ORDER
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#ifndef WITH_HOST_BYTE_ORDER
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#define WITH_HOST_BYTE_ORDER 0 /*unknown*/
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#define WITH_HOST_BYTE_ORDER 0 /*unknown*/
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#endif
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#endif
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#ifndef WITH_TARGET_BYTE_ORDER
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#ifndef WITH_TARGET_BYTE_ORDER
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#define WITH_TARGET_BYTE_ORDER 0 /*unknown*/
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#define WITH_TARGET_BYTE_ORDER 0 /*unknown*/
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#endif
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#endif
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extern int current_host_byte_order;
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extern int current_host_byte_order;
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#define CURRENT_HOST_BYTE_ORDER (WITH_HOST_BYTE_ORDER \
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#define CURRENT_HOST_BYTE_ORDER (WITH_HOST_BYTE_ORDER \
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? WITH_HOST_BYTE_ORDER \
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? WITH_HOST_BYTE_ORDER \
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: current_host_byte_order)
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: current_host_byte_order)
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extern int current_target_byte_order;
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extern int current_target_byte_order;
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#define CURRENT_TARGET_BYTE_ORDER (WITH_TARGET_BYTE_ORDER \
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#define CURRENT_TARGET_BYTE_ORDER (WITH_TARGET_BYTE_ORDER \
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? WITH_TARGET_BYTE_ORDER \
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? WITH_TARGET_BYTE_ORDER \
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: current_target_byte_order)
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: current_target_byte_order)
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/* PowerPC XOR endian.
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/* PowerPC XOR endian.
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In addition to the above, the simulator can support the PowerPC's
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In addition to the above, the simulator can support the PowerPC's
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horrible XOR endian mode. This feature makes it possible to
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horrible XOR endian mode. This feature makes it possible to
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control the endian mode of a processor using the MSR. */
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control the endian mode of a processor using the MSR. */
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#ifndef WITH_XOR_ENDIAN
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#ifndef WITH_XOR_ENDIAN
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#define WITH_XOR_ENDIAN 8
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#define WITH_XOR_ENDIAN 8
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#endif
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#endif
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/* Intel host BSWAP support:
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/* Intel host BSWAP support:
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|
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Whether to use bswap on the 486 and pentiums rather than the 386
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Whether to use bswap on the 486 and pentiums rather than the 386
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sequence that uses xchgb/rorl/xchgb */
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sequence that uses xchgb/rorl/xchgb */
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#ifndef WITH_BSWAP
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#ifndef WITH_BSWAP
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#define WITH_BSWAP 0
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#define WITH_BSWAP 0
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#endif
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#endif
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/* SMP support:
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/* SMP support:
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Sets a limit on the number of processors that can be simulated. If
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Sets a limit on the number of processors that can be simulated. If
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WITH_SMP is set to zero (0), the simulator is restricted to
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WITH_SMP is set to zero (0), the simulator is restricted to
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suporting only on processor (and as a consequence leaves the SMP
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suporting only on processor (and as a consequence leaves the SMP
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code out of the build process).
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code out of the build process).
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The actual number of processors is taken from the device
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The actual number of processors is taken from the device
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/options/smp@<nr-cpu> */
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/options/smp@<nr-cpu> */
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#ifndef WITH_SMP
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#ifndef WITH_SMP
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#define WITH_SMP 5
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#define WITH_SMP 5
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#endif
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#endif
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#if WITH_SMP
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#if WITH_SMP
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#define MAX_NR_PROCESSORS WITH_SMP
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#define MAX_NR_PROCESSORS WITH_SMP
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#else
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#else
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#define MAX_NR_PROCESSORS 1
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#define MAX_NR_PROCESSORS 1
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#endif
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#endif
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/* Word size of host/target:
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/* Word size of host/target:
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Set these according to your host and target requirements. At this
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Set these according to your host and target requirements. At this
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point in time, I've only compiled (not run) for a 64bit and never
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point in time, I've only compiled (not run) for a 64bit and never
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built for a 64bit host. This will always remain a compile time
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built for a 64bit host. This will always remain a compile time
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option */
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option */
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#ifndef WITH_TARGET_WORD_BITSIZE
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#ifndef WITH_TARGET_WORD_BITSIZE
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#define WITH_TARGET_WORD_BITSIZE 32 /* compiled only */
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#define WITH_TARGET_WORD_BITSIZE 32 /* compiled only */
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#endif
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#endif
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#ifndef WITH_HOST_WORD_BITSIZE
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#ifndef WITH_HOST_WORD_BITSIZE
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#define WITH_HOST_WORD_BITSIZE 32 /* 64bit ready? */
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#define WITH_HOST_WORD_BITSIZE 32 /* 64bit ready? */
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#endif
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#endif
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/* Program environment:
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/* Program environment:
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Three environments are available - UEA (user), VEA (virtual) and
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Three environments are available - UEA (user), VEA (virtual) and
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OEA (perating). The former two are environment that users would
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OEA (perating). The former two are environment that users would
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expect to see (VEA includes things like coherency and the time
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expect to see (VEA includes things like coherency and the time
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base) while OEA is what an operating system expects to see. By
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base) while OEA is what an operating system expects to see. By
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setting these to specific values, the build process is able to
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setting these to specific values, the build process is able to
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eliminate non relevent environment code
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eliminate non relevent environment code
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CURRENT_ENVIRONMENT specifies which of vea or oea is required for
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CURRENT_ENVIRONMENT specifies which of vea or oea is required for
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the current runtime. */
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the current runtime. */
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#define USER_ENVIRONMENT 1
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#define USER_ENVIRONMENT 1
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#define VIRTUAL_ENVIRONMENT 2
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#define VIRTUAL_ENVIRONMENT 2
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#define OPERATING_ENVIRONMENT 3
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#define OPERATING_ENVIRONMENT 3
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#ifndef WITH_ENVIRONMENT
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#ifndef WITH_ENVIRONMENT
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#define WITH_ENVIRONMENT 0
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#define WITH_ENVIRONMENT 0
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#endif
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#endif
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extern int current_environment;
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extern int current_environment;
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#define CURRENT_ENVIRONMENT (WITH_ENVIRONMENT \
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#define CURRENT_ENVIRONMENT (WITH_ENVIRONMENT \
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? WITH_ENVIRONMENT \
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? WITH_ENVIRONMENT \
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: current_environment)
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: current_environment)
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/* Optional VEA/OEA code:
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/* Optional VEA/OEA code:
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The below, required for the OEA model may also be included in the
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The below, required for the OEA model may also be included in the
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VEA model however, as far as I can tell only make things
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VEA model however, as far as I can tell only make things
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slower... */
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slower... */
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/* Events. Devices modeling real H/W need to be able to efficiently
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/* Events. Devices modeling real H/W need to be able to efficiently
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schedule things to do at known times in the future. The event
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schedule things to do at known times in the future. The event
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queue implements this. Unfortunatly this adds the need to check
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queue implements this. Unfortunatly this adds the need to check
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for any events once each full instruction cycle. */
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for any events once each full instruction cycle. */
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#define WITH_EVENTS (WITH_ENVIRONMENT != USER_ENVIRONMENT)
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#define WITH_EVENTS (WITH_ENVIRONMENT != USER_ENVIRONMENT)
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/* Time base:
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/* Time base:
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The PowerPC architecture includes the addition of both a time base
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The PowerPC architecture includes the addition of both a time base
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register and a decrement timer. Like events adds to the overhead
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register and a decrement timer. Like events adds to the overhead
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of of some instruction cycles. */
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of of some instruction cycles. */
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#ifndef WITH_TIME_BASE
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#ifndef WITH_TIME_BASE
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#define WITH_TIME_BASE (WITH_ENVIRONMENT != USER_ENVIRONMENT)
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#define WITH_TIME_BASE (WITH_ENVIRONMENT != USER_ENVIRONMENT)
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#endif
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#endif
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/* Callback/Default Memory.
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/* Callback/Default Memory.
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Core includes a builtin memory type (raw_memory) that is
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Core includes a builtin memory type (raw_memory) that is
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implemented using an array. raw_memory does not require any
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implemented using an array. raw_memory does not require any
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additional functions etc.
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additional functions etc.
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Callback memory is where the core calls a core device for the data
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Callback memory is where the core calls a core device for the data
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it requires.
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it requires.
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Default memory is an extenstion of this where for addresses that do
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Default memory is an extenstion of this where for addresses that do
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not map into either a callback or core memory range a default map
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not map into either a callback or core memory range a default map
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can be used.
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can be used.
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The OEA model uses callback memory for devices and default memory
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The OEA model uses callback memory for devices and default memory
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for buses.
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for buses.
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The VEA model uses callback memory to capture `page faults'.
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The VEA model uses callback memory to capture `page faults'.
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While it may be possible to eliminate callback/default memory (and
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While it may be possible to eliminate callback/default memory (and
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hence also eliminate an additional test per memory fetch) it
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hence also eliminate an additional test per memory fetch) it
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probably is not worth the effort.
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probably is not worth the effort.
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BTW, while raw_memory could have been implemented as a callback,
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BTW, while raw_memory could have been implemented as a callback,
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profiling has shown that there is a biger win (at least for the
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profiling has shown that there is a biger win (at least for the
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x86) in eliminating a function call for the most common
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x86) in eliminating a function call for the most common
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(raw_memory) case. */
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(raw_memory) case. */
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#define WITH_CALLBACK_MEMORY 1
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#define WITH_CALLBACK_MEMORY 1
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/* Alignment:
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/* Alignment:
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The PowerPC may or may not handle miss aligned transfers. An
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The PowerPC may or may not handle miss aligned transfers. An
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implementation normally handles miss aligned transfers in big
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implementation normally handles miss aligned transfers in big
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endian mode but generates an exception in little endian mode.
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endian mode but generates an exception in little endian mode.
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This model. Instead allows both little and big endian modes to
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This model. Instead allows both little and big endian modes to
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either take exceptions or handle miss aligned transfers.
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either take exceptions or handle miss aligned transfers.
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If 0 is specified then for big-endian mode miss alligned accesses
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If 0 is specified then for big-endian mode miss alligned accesses
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are permitted (NONSTRICT_ALIGNMENT) while in little-endian mode the
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are permitted (NONSTRICT_ALIGNMENT) while in little-endian mode the
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processor will fault on them (STRICT_ALIGNMENT). */
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processor will fault on them (STRICT_ALIGNMENT). */
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#define NONSTRICT_ALIGNMENT 1
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#define NONSTRICT_ALIGNMENT 1
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#define STRICT_ALIGNMENT 2
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#define STRICT_ALIGNMENT 2
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#ifndef WITH_ALIGNMENT
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#ifndef WITH_ALIGNMENT
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#define WITH_ALIGNMENT 0
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#define WITH_ALIGNMENT 0
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#endif
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#endif
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extern int current_alignment;
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extern int current_alignment;
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#define CURRENT_ALIGNMENT (WITH_ALIGNMENT \
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#define CURRENT_ALIGNMENT (WITH_ALIGNMENT \
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? WITH_ALIGNMENT \
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? WITH_ALIGNMENT \
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: current_alignment)
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: current_alignment)
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/* Floating point suport:
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/* Floating point suport:
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Still under development. */
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Still under development. */
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#define SOFT_FLOATING_POINT 1
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#define SOFT_FLOATING_POINT 1
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#define HARD_FLOATING_POINT 2
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#define HARD_FLOATING_POINT 2
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#ifndef WITH_FLOATING_POINT
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#ifndef WITH_FLOATING_POINT
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#define WITH_FLOATING_POINT HARD_FLOATING_POINT
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#define WITH_FLOATING_POINT HARD_FLOATING_POINT
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#endif
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#endif
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extern int current_floating_point;
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extern int current_floating_point;
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#define CURRENT_FLOATING_POINT (WITH_FLOATING_POINT \
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#define CURRENT_FLOATING_POINT (WITH_FLOATING_POINT \
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? WITH_FLOATING_POINT \
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? WITH_FLOATING_POINT \
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: current_floating_point)
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: current_floating_point)
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/* Debugging:
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/* Debugging:
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Control the inclusion of debugging code. */
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Control the inclusion of debugging code. */
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/* Include the tracing code. Disabling this eliminates all tracing
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/* Include the tracing code. Disabling this eliminates all tracing
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code */
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code */
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#ifndef WITH_TRACE
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#ifndef WITH_TRACE
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#define WITH_TRACE 1
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#define WITH_TRACE 1
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#endif
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#endif
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/* include code that checks assertions scattered through out the
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/* include code that checks assertions scattered through out the
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program */
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program */
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#ifndef WITH_ASSERT
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#ifndef WITH_ASSERT
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#define WITH_ASSERT 1
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#define WITH_ASSERT 1
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#endif
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#endif
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|
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/* Whether to check instructions for reserved bits being set */
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/* Whether to check instructions for reserved bits being set */
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|
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#ifndef WITH_RESERVED_BITS
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#ifndef WITH_RESERVED_BITS
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#define WITH_RESERVED_BITS 1
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#define WITH_RESERVED_BITS 1
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#endif
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#endif
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|
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/* include monitoring code */
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/* include monitoring code */
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#define MONITOR_INSTRUCTION_ISSUE 1
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#define MONITOR_INSTRUCTION_ISSUE 1
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#define MONITOR_LOAD_STORE_UNIT 2
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#define MONITOR_LOAD_STORE_UNIT 2
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#ifndef WITH_MON
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#ifndef WITH_MON
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#define WITH_MON (MONITOR_LOAD_STORE_UNIT \
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#define WITH_MON (MONITOR_LOAD_STORE_UNIT \
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| MONITOR_INSTRUCTION_ISSUE)
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| MONITOR_INSTRUCTION_ISSUE)
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#endif
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#endif
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|
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/* Current CPU model (models are in the generated models.h include file) */
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/* Current CPU model (models are in the generated models.h include file) */
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#ifndef WITH_MODEL
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#ifndef WITH_MODEL
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#define WITH_MODEL 0
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#define WITH_MODEL 0
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#endif
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#endif
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|
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#define CURRENT_MODEL (WITH_MODEL \
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#define CURRENT_MODEL (WITH_MODEL \
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? WITH_MODEL \
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? WITH_MODEL \
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: current_model)
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: current_model)
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|
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#ifndef WITH_DEFAULT_MODEL
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#ifndef WITH_DEFAULT_MODEL
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#define WITH_DEFAULT_MODEL DEFAULT_MODEL
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#define WITH_DEFAULT_MODEL DEFAULT_MODEL
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#endif
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#endif
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|
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#define MODEL_ISSUE_IGNORE (-1)
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#define MODEL_ISSUE_IGNORE (-1)
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#define MODEL_ISSUE_PROCESS 1
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#define MODEL_ISSUE_PROCESS 1
|
|
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#ifndef WITH_MODEL_ISSUE
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#ifndef WITH_MODEL_ISSUE
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#define WITH_MODEL_ISSUE 0
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#define WITH_MODEL_ISSUE 0
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#endif
|
#endif
|
|
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extern int current_model_issue;
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extern int current_model_issue;
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#define CURRENT_MODEL_ISSUE (WITH_MODEL_ISSUE \
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#define CURRENT_MODEL_ISSUE (WITH_MODEL_ISSUE \
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? WITH_MODEL_ISSUE \
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? WITH_MODEL_ISSUE \
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: current_model_issue)
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: current_model_issue)
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|
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/* Whether or not input/output just uses stdio, or uses printf_filtered for
|
/* Whether or not input/output just uses stdio, or uses printf_filtered for
|
output, and polling input for input. */
|
output, and polling input for input. */
|
|
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#define DONT_USE_STDIO 2
|
#define DONT_USE_STDIO 2
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#define DO_USE_STDIO 1
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#define DO_USE_STDIO 1
|
|
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#ifndef WITH_STDIO
|
#ifndef WITH_STDIO
|
#define WITH_STDIO 0
|
#define WITH_STDIO 0
|
#endif
|
#endif
|
|
|
extern int current_stdio;
|
extern int current_stdio;
|
#define CURRENT_STDIO (WITH_STDIO \
|
#define CURRENT_STDIO (WITH_STDIO \
|
? WITH_STDIO \
|
? WITH_STDIO \
|
: current_stdio)
|
: current_stdio)
|
|
|
|
|
|
|
/* INLINE CODE SELECTION:
|
/* INLINE CODE SELECTION:
|
|
|
GCC -O3 attempts to inline any function or procedure in scope. The
|
GCC -O3 attempts to inline any function or procedure in scope. The
|
options below facilitate fine grained control over what is and what
|
options below facilitate fine grained control over what is and what
|
isn't made inline. For instance it can control things down to a
|
isn't made inline. For instance it can control things down to a
|
specific modules static routines. Doing this allows the compiler
|
specific modules static routines. Doing this allows the compiler
|
to both eliminate the overhead of function calls and (as a
|
to both eliminate the overhead of function calls and (as a
|
consequence) also eliminate further dead code.
|
consequence) also eliminate further dead code.
|
|
|
On a CISC (x86) I've found that I can achieve an order of magnitude
|
On a CISC (x86) I've found that I can achieve an order of magnitude
|
speed improvement (x3-x5). In the case of RISC (sparc) while the
|
speed improvement (x3-x5). In the case of RISC (sparc) while the
|
performance gain isn't as great it is still significant.
|
performance gain isn't as great it is still significant.
|
|
|
Each module is controled by the macro <module>_INLINE which can
|
Each module is controled by the macro <module>_INLINE which can
|
have the values described below
|
have the values described below
|
|
|
0 Do not inline any thing for the given module
|
0 Do not inline any thing for the given module
|
|
|
The following additional values are `bit fields' and can be
|
The following additional values are `bit fields' and can be
|
combined.
|
combined.
|
|
|
REVEAL_MODULE:
|
REVEAL_MODULE:
|
|
|
Include the C file for the module into the file being compiled
|
Include the C file for the module into the file being compiled
|
but do not make the functions within the module inline.
|
but do not make the functions within the module inline.
|
|
|
While of no apparent benefit, this makes it possible for the
|
While of no apparent benefit, this makes it possible for the
|
included module, when compiled to inline its calls to what
|
included module, when compiled to inline its calls to what
|
would otherwize be external functions.
|
would otherwize be external functions.
|
|
|
INLINE_MODULE:
|
INLINE_MODULE:
|
|
|
Make external functions within the module `inline'. Thus if
|
Make external functions within the module `inline'. Thus if
|
the module is included into a file being compiled, calls to
|
the module is included into a file being compiled, calls to
|
its funtions can be eliminated. 2 implies 1.
|
its funtions can be eliminated. 2 implies 1.
|
|
|
PSIM_INLINE_LOCALS:
|
PSIM_INLINE_LOCALS:
|
|
|
Make internal (static) functions within the module `inline'.
|
Make internal (static) functions within the module `inline'.
|
|
|
The following abreviations are available:
|
The following abreviations are available:
|
|
|
INCLUDE_MODULE == (REVEAL_MODULE | INLINE_MODULE)
|
INCLUDE_MODULE == (REVEAL_MODULE | INLINE_MODULE)
|
|
|
ALL_INLINE == (REVEAL_MODULE | INLINE_MODULE | PSIM_INLINE_LOCALS)
|
ALL_INLINE == (REVEAL_MODULE | INLINE_MODULE | PSIM_INLINE_LOCALS)
|
|
|
In addition to this, modules have been put into two categories.
|
In addition to this, modules have been put into two categories.
|
|
|
Simple modules - eg sim-endian.h bits.h
|
Simple modules - eg sim-endian.h bits.h
|
|
|
Because these modules are small and simple and do not have
|
Because these modules are small and simple and do not have
|
any complex interpendencies they are configured, if
|
any complex interpendencies they are configured, if
|
<module>_INLINE is so enabled, to inline themselves in all
|
<module>_INLINE is so enabled, to inline themselves in all
|
modules that include those files.
|
modules that include those files.
|
|
|
For the default build, this is a real win as all byte
|
For the default build, this is a real win as all byte
|
conversion and bit manipulation functions are inlined.
|
conversion and bit manipulation functions are inlined.
|
|
|
Complex modules - the rest
|
Complex modules - the rest
|
|
|
These are all handled using the files inline.h and inline.c.
|
These are all handled using the files inline.h and inline.c.
|
psim.c includes the above which in turn include any remaining
|
psim.c includes the above which in turn include any remaining
|
code.
|
code.
|
|
|
IMPLEMENTATION:
|
IMPLEMENTATION:
|
|
|
The inline ability is enabled by prefixing every data / function
|
The inline ability is enabled by prefixing every data / function
|
declaration and definition with one of the following:
|
declaration and definition with one of the following:
|
|
|
|
|
INLINE_<module>
|
INLINE_<module>
|
|
|
Prefix to any global function that is a candidate for being
|
Prefix to any global function that is a candidate for being
|
inline.
|
inline.
|
|
|
values - `', `static', `static INLINE'
|
values - `', `static', `static INLINE'
|
|
|
|
|
EXTERN_<module>
|
EXTERN_<module>
|
|
|
Prefix to any global data structures for the module. Global
|
Prefix to any global data structures for the module. Global
|
functions that are not to be inlined shall also be prefixed
|
functions that are not to be inlined shall also be prefixed
|
with this.
|
with this.
|
|
|
values - `', `static', `static'
|
values - `', `static', `static'
|
|
|
|
|
STATIC_INLINE_<module>
|
STATIC_INLINE_<module>
|
|
|
Prefix to any local (static) function that is a candidate for
|
Prefix to any local (static) function that is a candidate for
|
being made inline.
|
being made inline.
|
|
|
values - `static', `static INLINE'
|
values - `static', `static INLINE'
|
|
|
|
|
static
|
static
|
|
|
Prefix all local data structures. Local functions that are not
|
Prefix all local data structures. Local functions that are not
|
to be inlined shall also be prefixed with this.
|
to be inlined shall also be prefixed with this.
|
|
|
values - `static', `static'
|
values - `static', `static'
|
|
|
nb: will not work for modules that are being inlined for every
|
nb: will not work for modules that are being inlined for every
|
use (white lie).
|
use (white lie).
|
|
|
|
|
extern
|
extern
|
#ifndef _INLINE_C_
|
#ifndef _INLINE_C_
|
#endif
|
#endif
|
|
|
Prefix to any declaration of a global object (function or
|
Prefix to any declaration of a global object (function or
|
variable) that should not be inlined and should have only one
|
variable) that should not be inlined and should have only one
|
definition. The #ifndef wrapper goes around the definition
|
definition. The #ifndef wrapper goes around the definition
|
propper to ensure that only one copy is generated.
|
propper to ensure that only one copy is generated.
|
|
|
nb: this will not work when a module is being inlined for every
|
nb: this will not work when a module is being inlined for every
|
use.
|
use.
|
|
|
|
|
STATIC_<module>
|
STATIC_<module>
|
|
|
Replaced by either `static' or `EXTERN_MODULE'.
|
Replaced by either `static' or `EXTERN_MODULE'.
|
|
|
|
|
REALITY CHECK:
|
REALITY CHECK:
|
|
|
This is not for the faint hearted. I've seen GCC get up to 500mb
|
This is not for the faint hearted. I've seen GCC get up to 500mb
|
trying to compile what this can create.
|
trying to compile what this can create.
|
|
|
Some of the modules do not yet implement the WITH_INLINE_STATIC
|
Some of the modules do not yet implement the WITH_INLINE_STATIC
|
option. Instead they use the macro STATIC_INLINE to control their
|
option. Instead they use the macro STATIC_INLINE to control their
|
local function.
|
local function.
|
|
|
Because of the way that GCC parses __attribute__(), the macro's
|
Because of the way that GCC parses __attribute__(), the macro's
|
need to be adjacent to the function name rather than at the start
|
need to be adjacent to the function name rather than at the start
|
of the line vis:
|
of the line vis:
|
|
|
int STATIC_INLINE_MODULE f(void);
|
int STATIC_INLINE_MODULE f(void);
|
void INLINE_MODULE *g(void);
|
void INLINE_MODULE *g(void);
|
|
|
*/
|
*/
|
|
|
#define REVEAL_MODULE 1
|
#define REVEAL_MODULE 1
|
#define INLINE_MODULE 2
|
#define INLINE_MODULE 2
|
#define INCLUDE_MODULE (INLINE_MODULE | REVEAL_MODULE)
|
#define INCLUDE_MODULE (INLINE_MODULE | REVEAL_MODULE)
|
#define PSIM_INLINE_LOCALS 4
|
#define PSIM_INLINE_LOCALS 4
|
#define ALL_INLINE 7
|
#define ALL_INLINE 7
|
|
|
/* Your compilers inline reserved word */
|
/* Your compilers inline reserved word */
|
|
|
#ifndef INLINE
|
#ifndef INLINE
|
#if defined(__GNUC__) && defined(__OPTIMIZE__)
|
#if defined(__GNUC__) && defined(__OPTIMIZE__)
|
#define INLINE __inline__
|
#define INLINE __inline__
|
#else
|
#else
|
#define INLINE /*inline*/
|
#define INLINE /*inline*/
|
#endif
|
#endif
|
#endif
|
#endif
|
|
|
|
|
/* Your compilers pass parameters in registers reserved word */
|
/* Your compilers pass parameters in registers reserved word */
|
|
|
#ifndef WITH_REGPARM
|
#ifndef WITH_REGPARM
|
#define WITH_REGPARM 0
|
#define WITH_REGPARM 0
|
#endif
|
#endif
|
|
|
/* Your compilers use an alternative calling sequence reserved word */
|
/* Your compilers use an alternative calling sequence reserved word */
|
|
|
#ifndef WITH_STDCALL
|
#ifndef WITH_STDCALL
|
#define WITH_STDCALL 0
|
#define WITH_STDCALL 0
|
#endif
|
#endif
|
|
|
#if !defined REGPARM
|
#if !defined REGPARM
|
#if defined(__GNUC__) && (defined(__i386__) || defined(__i486__) || defined(__i586__) || defined(__i686__))
|
#if defined(__GNUC__) && (defined(__i386__) || defined(__i486__) || defined(__i586__) || defined(__i686__))
|
#if (WITH_REGPARM && WITH_STDCALL)
|
#if (WITH_REGPARM && WITH_STDCALL)
|
#define REGPARM __attribute__((__regparm__(WITH_REGPARM),__stdcall__))
|
#define REGPARM __attribute__((__regparm__(WITH_REGPARM),__stdcall__))
|
#else
|
#else
|
#if (WITH_REGPARM && !WITH_STDCALL)
|
#if (WITH_REGPARM && !WITH_STDCALL)
|
#define REGPARM __attribute__((__regparm__(WITH_REGPARM)))
|
#define REGPARM __attribute__((__regparm__(WITH_REGPARM)))
|
#else
|
#else
|
#if (!WITH_REGPARM && WITH_STDCALL)
|
#if (!WITH_REGPARM && WITH_STDCALL)
|
#define REGPARM __attribute__((__stdcall__))
|
#define REGPARM __attribute__((__stdcall__))
|
#endif
|
#endif
|
#endif
|
#endif
|
#endif
|
#endif
|
#endif
|
#endif
|
#endif
|
#endif
|
|
|
#if !defined REGPARM
|
#if !defined REGPARM
|
#define REGPARM
|
#define REGPARM
|
#endif
|
#endif
|
|
|
|
|
|
|
/* Default prefix for static functions */
|
/* Default prefix for static functions */
|
|
|
#ifndef STATIC_INLINE
|
#ifndef STATIC_INLINE
|
#define STATIC_INLINE static INLINE
|
#define STATIC_INLINE static INLINE
|
#endif
|
#endif
|
|
|
/* Default macro to simplify control several of key the inlines */
|
/* Default macro to simplify control several of key the inlines */
|
|
|
#ifndef DEFAULT_INLINE
|
#ifndef DEFAULT_INLINE
|
#define DEFAULT_INLINE PSIM_INLINE_LOCALS
|
#define DEFAULT_INLINE PSIM_INLINE_LOCALS
|
#endif
|
#endif
|
|
|
/* Code that converts between hosts and target byte order. Used on
|
/* Code that converts between hosts and target byte order. Used on
|
every memory access (instruction and data). See sim-endian.h for
|
every memory access (instruction and data). See sim-endian.h for
|
additional byte swapping configuration information. This module
|
additional byte swapping configuration information. This module
|
can inline for all callers */
|
can inline for all callers */
|
|
|
#ifndef SIM_ENDIAN_INLINE
|
#ifndef SIM_ENDIAN_INLINE
|
#define SIM_ENDIAN_INLINE (DEFAULT_INLINE ? ALL_INLINE : 0)
|
#define SIM_ENDIAN_INLINE (DEFAULT_INLINE ? ALL_INLINE : 0)
|
#endif
|
#endif
|
|
|
/* Low level bit manipulation routines. This module can inline for all
|
/* Low level bit manipulation routines. This module can inline for all
|
callers */
|
callers */
|
|
|
#ifndef BITS_INLINE
|
#ifndef BITS_INLINE
|
#define BITS_INLINE (DEFAULT_INLINE ? ALL_INLINE : 0)
|
#define BITS_INLINE (DEFAULT_INLINE ? ALL_INLINE : 0)
|
#endif
|
#endif
|
|
|
/* Code that gives access to various CPU internals such as registers.
|
/* Code that gives access to various CPU internals such as registers.
|
Used every time an instruction is executed */
|
Used every time an instruction is executed */
|
|
|
#ifndef CPU_INLINE
|
#ifndef CPU_INLINE
|
#define CPU_INLINE (DEFAULT_INLINE ? ALL_INLINE : 0)
|
#define CPU_INLINE (DEFAULT_INLINE ? ALL_INLINE : 0)
|
#endif
|
#endif
|
|
|
/* Code that translates between an effective and real address. Used
|
/* Code that translates between an effective and real address. Used
|
by every load or store. */
|
by every load or store. */
|
|
|
#ifndef VM_INLINE
|
#ifndef VM_INLINE
|
#define VM_INLINE DEFAULT_INLINE
|
#define VM_INLINE DEFAULT_INLINE
|
#endif
|
#endif
|
|
|
/* Code that loads/stores data to/from the memory data structure.
|
/* Code that loads/stores data to/from the memory data structure.
|
Used by every load or store */
|
Used by every load or store */
|
|
|
#ifndef CORE_INLINE
|
#ifndef CORE_INLINE
|
#define CORE_INLINE DEFAULT_INLINE
|
#define CORE_INLINE DEFAULT_INLINE
|
#endif
|
#endif
|
|
|
/* Code to check for and process any events scheduled in the future.
|
/* Code to check for and process any events scheduled in the future.
|
Called once per instruction cycle */
|
Called once per instruction cycle */
|
|
|
#ifndef EVENTS_INLINE
|
#ifndef EVENTS_INLINE
|
#define EVENTS_INLINE (DEFAULT_INLINE ? ALL_INLINE : 0)
|
#define EVENTS_INLINE (DEFAULT_INLINE ? ALL_INLINE : 0)
|
#endif
|
#endif
|
|
|
/* Code monotoring the processors performance. It counts events on
|
/* Code monotoring the processors performance. It counts events on
|
every instruction cycle */
|
every instruction cycle */
|
|
|
#ifndef MON_INLINE
|
#ifndef MON_INLINE
|
#define MON_INLINE (DEFAULT_INLINE ? ALL_INLINE : 0)
|
#define MON_INLINE (DEFAULT_INLINE ? ALL_INLINE : 0)
|
#endif
|
#endif
|
|
|
/* Code called on the rare occasions that an interrupt occures. */
|
/* Code called on the rare occasions that an interrupt occures. */
|
|
|
#ifndef INTERRUPTS_INLINE
|
#ifndef INTERRUPTS_INLINE
|
#define INTERRUPTS_INLINE DEFAULT_INLINE
|
#define INTERRUPTS_INLINE DEFAULT_INLINE
|
#endif
|
#endif
|
|
|
/* Code called on the rare occasion that either gdb or the device tree
|
/* Code called on the rare occasion that either gdb or the device tree
|
need to manipulate a register within a processor */
|
need to manipulate a register within a processor */
|
|
|
#ifndef REGISTERS_INLINE
|
#ifndef REGISTERS_INLINE
|
#define REGISTERS_INLINE DEFAULT_INLINE
|
#define REGISTERS_INLINE DEFAULT_INLINE
|
#endif
|
#endif
|
|
|
/* Code called on the rare occasion that a processor is manipulating
|
/* Code called on the rare occasion that a processor is manipulating
|
real hardware instead of RAM.
|
real hardware instead of RAM.
|
|
|
Also, most of the functions in devices.c are always called through
|
Also, most of the functions in devices.c are always called through
|
a jump table. */
|
a jump table. */
|
|
|
#ifndef DEVICE_INLINE
|
#ifndef DEVICE_INLINE
|
#define DEVICE_INLINE (DEFAULT_INLINE ? PSIM_INLINE_LOCALS : 0)
|
#define DEVICE_INLINE (DEFAULT_INLINE ? PSIM_INLINE_LOCALS : 0)
|
#endif
|
#endif
|
|
|
/* Code called used while the device tree is being built.
|
/* Code called used while the device tree is being built.
|
|
|
Inlining this is of no benefit */
|
Inlining this is of no benefit */
|
|
|
#ifndef TREE_INLINE
|
#ifndef TREE_INLINE
|
#define TREE_INLINE (DEFAULT_INLINE ? PSIM_INLINE_LOCALS : 0)
|
#define TREE_INLINE (DEFAULT_INLINE ? PSIM_INLINE_LOCALS : 0)
|
#endif
|
#endif
|
|
|
/* Code called whenever information on a Special Purpose Register is
|
/* Code called whenever information on a Special Purpose Register is
|
required. Called by the mflr/mtlr pseudo instructions */
|
required. Called by the mflr/mtlr pseudo instructions */
|
|
|
#ifndef SPREG_INLINE
|
#ifndef SPREG_INLINE
|
#define SPREG_INLINE DEFAULT_INLINE
|
#define SPREG_INLINE DEFAULT_INLINE
|
#endif
|
#endif
|
|
|
/* Functions modeling the semantics of each instruction. Two cases to
|
/* Functions modeling the semantics of each instruction. Two cases to
|
consider, firstly of idecode is implemented with a switch then this
|
consider, firstly of idecode is implemented with a switch then this
|
allows the idecode function to inline each semantic function
|
allows the idecode function to inline each semantic function
|
(avoiding a call). The second case is when idecode is using a
|
(avoiding a call). The second case is when idecode is using a
|
table, even then while the semantic functions can't be inlined,
|
table, even then while the semantic functions can't be inlined,
|
setting it to one still enables each semantic function to inline
|
setting it to one still enables each semantic function to inline
|
anything they call (if that code is marked for being inlined).
|
anything they call (if that code is marked for being inlined).
|
|
|
WARNING: you need lots (like 200mb of swap) of swap. Setting this
|
WARNING: you need lots (like 200mb of swap) of swap. Setting this
|
to 1 is useful when using a table as it enables the sematic code to
|
to 1 is useful when using a table as it enables the sematic code to
|
inline all of their called functions */
|
inline all of their called functions */
|
|
|
#ifndef SEMANTICS_INLINE
|
#ifndef SEMANTICS_INLINE
|
#define SEMANTICS_INLINE (DEFAULT_INLINE & ~INLINE_MODULE)
|
#define SEMANTICS_INLINE (DEFAULT_INLINE & ~INLINE_MODULE)
|
#endif
|
#endif
|
|
|
/* When using the instruction cache, code to decode an instruction and
|
/* When using the instruction cache, code to decode an instruction and
|
install it into the cache. Normally called when ever there is a
|
install it into the cache. Normally called when ever there is a
|
miss in the instruction cache. */
|
miss in the instruction cache. */
|
|
|
#ifndef ICACHE_INLINE
|
#ifndef ICACHE_INLINE
|
#define ICACHE_INLINE (DEFAULT_INLINE & ~INLINE_MODULE)
|
#define ICACHE_INLINE (DEFAULT_INLINE & ~INLINE_MODULE)
|
#endif
|
#endif
|
|
|
/* General functions called by semantics functions but part of the
|
/* General functions called by semantics functions but part of the
|
instruction table. Although called by the semantic functions the
|
instruction table. Although called by the semantic functions the
|
frequency of calls is low. Consequently the need to inline this
|
frequency of calls is low. Consequently the need to inline this
|
code is reduced. */
|
code is reduced. */
|
|
|
#ifndef SUPPORT_INLINE
|
#ifndef SUPPORT_INLINE
|
#define SUPPORT_INLINE PSIM_INLINE_LOCALS
|
#define SUPPORT_INLINE PSIM_INLINE_LOCALS
|
#endif
|
#endif
|
|
|
/* Model specific code used in simulating functional units. Note, it actaully
|
/* Model specific code used in simulating functional units. Note, it actaully
|
pays NOT to inline the PowerPC model functions (at least on the x86). This
|
pays NOT to inline the PowerPC model functions (at least on the x86). This
|
is because if it is inlined, each PowerPC instruction gets a separate copy
|
is because if it is inlined, each PowerPC instruction gets a separate copy
|
of the code, which is not friendly to the cache. */
|
of the code, which is not friendly to the cache. */
|
|
|
#ifndef MODEL_INLINE
|
#ifndef MODEL_INLINE
|
#define MODEL_INLINE (DEFAULT_INLINE & ~INLINE_MODULE)
|
#define MODEL_INLINE (DEFAULT_INLINE & ~INLINE_MODULE)
|
#endif
|
#endif
|
|
|
/* Code to print out what options we were compiled with. Because this
|
/* Code to print out what options we were compiled with. Because this
|
is called at process startup, it doesn't have to be inlined, but
|
is called at process startup, it doesn't have to be inlined, but
|
if it isn't brought in and the model routines are inline, the model
|
if it isn't brought in and the model routines are inline, the model
|
routines will be pulled in twice. */
|
routines will be pulled in twice. */
|
|
|
#ifndef OPTIONS_INLINE
|
#ifndef OPTIONS_INLINE
|
#define OPTIONS_INLINE MODEL_INLINE
|
#define OPTIONS_INLINE MODEL_INLINE
|
#endif
|
#endif
|
|
|
/* idecode acts as the hub of the system, everything else is imported
|
/* idecode acts as the hub of the system, everything else is imported
|
into this file */
|
into this file */
|
|
|
#ifndef IDECOCE_INLINE
|
#ifndef IDECOCE_INLINE
|
#define IDECODE_INLINE PSIM_INLINE_LOCALS
|
#define IDECODE_INLINE PSIM_INLINE_LOCALS
|
#endif
|
#endif
|
|
|
/* psim, isn't actually inlined */
|
/* psim, isn't actually inlined */
|
|
|
#ifndef PSIM_INLINE
|
#ifndef PSIM_INLINE
|
#define PSIM_INLINE PSIM_INLINE_LOCALS
|
#define PSIM_INLINE PSIM_INLINE_LOCALS
|
#endif
|
#endif
|
|
|
/* Code to emulate os or rom compatibility. This code is called via a
|
/* Code to emulate os or rom compatibility. This code is called via a
|
table and hence there is little benefit in making it inline */
|
table and hence there is little benefit in making it inline */
|
|
|
#ifndef OS_EMUL_INLINE
|
#ifndef OS_EMUL_INLINE
|
#define OS_EMUL_INLINE 0
|
#define OS_EMUL_INLINE 0
|
#endif
|
#endif
|
|
|
#endif /* _PSIM_CONFIG_H */
|
#endif /* _PSIM_CONFIG_H */
|
|
|
