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[/] [openrisc/] [trunk/] [gnu-stable/] [gdb-7.2/] [sim/] [testsuite/] [sim/] [fr30/] [and.cgs] - Diff between revs 835 and 841

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Rev 835 Rev 841
# fr30 testcase for and $Rj,$Ri, and $Rj,@$Ri
# fr30 testcase for and $Rj,$Ri, and $Rj,@$Ri
# mach(): fr30
# mach(): fr30
        .include "testutils.inc"
        .include "testutils.inc"
        START
        START
        .text
        .text
        .global and
        .global and
and:
and:
        ; Test and $Rj,$Ri
        ; Test and $Rj,$Ri
        mvi_h_gr        0xaaaaaaaa,r7
        mvi_h_gr        0xaaaaaaaa,r7
        mvi_h_gr        0x55555555,r8
        mvi_h_gr        0x55555555,r8
        set_cc          0x0b            ; Set mask opposite of expected
        set_cc          0x0b            ; Set mask opposite of expected
        and             r7,r8
        and             r7,r8
        test_cc         0 1 1 1
        test_cc         0 1 1 1
        test_h_gr       0,r8
        test_h_gr       0,r8
        mvi_h_gr        0xffff0000,r8
        mvi_h_gr        0xffff0000,r8
        set_cc          0x04            ; Set mask opposite of expected
        set_cc          0x04            ; Set mask opposite of expected
        and             r7,r8
        and             r7,r8
        test_cc         1 0 0 0
        test_cc         1 0 0 0
        test_h_gr       0xaaaa0000,r8
        test_h_gr       0xaaaa0000,r8
        mvi_h_gr        0xffff,r8
        mvi_h_gr        0xffff,r8
        set_cc          0x0d            ; Set mask opposite of expected
        set_cc          0x0d            ; Set mask opposite of expected
        and             r7,r8
        and             r7,r8
        test_cc         0 0 0 1
        test_cc         0 0 0 1
        test_h_gr       0xaaaa,r8
        test_h_gr       0xaaaa,r8
        ; Test and $Rj,@$Ri
        ; Test and $Rj,@$Ri
        mvi_h_gr        0xaaaaaaaa,r7
        mvi_h_gr        0xaaaaaaaa,r7
        mvi_h_mem       0x55555555,sp
        mvi_h_mem       0x55555555,sp
        set_cc          0x0b            ; Set mask opposite of expected
        set_cc          0x0b            ; Set mask opposite of expected
        and             r7,@sp
        and             r7,@sp
        test_cc         0 1 1 1
        test_cc         0 1 1 1
        test_h_mem      0,sp
        test_h_mem      0,sp
        mvi_h_mem       0xffff0000,sp
        mvi_h_mem       0xffff0000,sp
        set_cc          0x04            ; Set mask opposite of expected
        set_cc          0x04            ; Set mask opposite of expected
        and             r7,@sp
        and             r7,@sp
        test_cc         1 0 0 0
        test_cc         1 0 0 0
        test_h_mem      0xaaaa0000,sp
        test_h_mem      0xaaaa0000,sp
        mvr_h_gr        sp,r9
        mvr_h_gr        sp,r9
        inci_h_gr       4,r9
        inci_h_gr       4,r9
        mvi_h_mem       0xffffffff,sp
        mvi_h_mem       0xffffffff,sp
        mvi_h_mem       0xffff0000,r9
        mvi_h_mem       0xffff0000,r9
        inci_h_gr       1,sp            ; test unaligned access
        inci_h_gr       1,sp            ; test unaligned access
        set_cc          0x05            ; Set mask opposite of expected
        set_cc          0x05            ; Set mask opposite of expected
        and             r7,@sp
        and             r7,@sp
        test_cc         1 0 0 1
        test_cc         1 0 0 1
        inci_h_gr       -1,sp
        inci_h_gr       -1,sp
        test_h_mem      0xaaaaaaaa,sp
        test_h_mem      0xaaaaaaaa,sp
        test_h_mem      0xffff0000,r9
        test_h_mem      0xffff0000,r9
        pass
        pass
 
 

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