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Rev 835 |
Rev 841 |
# fr30 testcase for and $Rj,$Ri, and $Rj,@$Ri
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# fr30 testcase for and $Rj,$Ri, and $Rj,@$Ri
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# mach(): fr30
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# mach(): fr30
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.include "testutils.inc"
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.include "testutils.inc"
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START
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START
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.text
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.text
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.global and
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.global and
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and:
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and:
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; Test and $Rj,$Ri
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; Test and $Rj,$Ri
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mvi_h_gr 0xaaaaaaaa,r7
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mvi_h_gr 0xaaaaaaaa,r7
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mvi_h_gr 0x55555555,r8
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mvi_h_gr 0x55555555,r8
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set_cc 0x0b ; Set mask opposite of expected
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set_cc 0x0b ; Set mask opposite of expected
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and r7,r8
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and r7,r8
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test_cc 0 1 1 1
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test_cc 0 1 1 1
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test_h_gr 0,r8
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test_h_gr 0,r8
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mvi_h_gr 0xffff0000,r8
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mvi_h_gr 0xffff0000,r8
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set_cc 0x04 ; Set mask opposite of expected
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set_cc 0x04 ; Set mask opposite of expected
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and r7,r8
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and r7,r8
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test_cc 1 0 0 0
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test_cc 1 0 0 0
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test_h_gr 0xaaaa0000,r8
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test_h_gr 0xaaaa0000,r8
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mvi_h_gr 0xffff,r8
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mvi_h_gr 0xffff,r8
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set_cc 0x0d ; Set mask opposite of expected
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set_cc 0x0d ; Set mask opposite of expected
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and r7,r8
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and r7,r8
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test_cc 0 0 0 1
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test_cc 0 0 0 1
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test_h_gr 0xaaaa,r8
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test_h_gr 0xaaaa,r8
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; Test and $Rj,@$Ri
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; Test and $Rj,@$Ri
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mvi_h_gr 0xaaaaaaaa,r7
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mvi_h_gr 0xaaaaaaaa,r7
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mvi_h_mem 0x55555555,sp
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mvi_h_mem 0x55555555,sp
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set_cc 0x0b ; Set mask opposite of expected
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set_cc 0x0b ; Set mask opposite of expected
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and r7,@sp
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and r7,@sp
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test_cc 0 1 1 1
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test_cc 0 1 1 1
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test_h_mem 0,sp
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test_h_mem 0,sp
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mvi_h_mem 0xffff0000,sp
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mvi_h_mem 0xffff0000,sp
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set_cc 0x04 ; Set mask opposite of expected
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set_cc 0x04 ; Set mask opposite of expected
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and r7,@sp
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and r7,@sp
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test_cc 1 0 0 0
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test_cc 1 0 0 0
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test_h_mem 0xaaaa0000,sp
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test_h_mem 0xaaaa0000,sp
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mvr_h_gr sp,r9
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mvr_h_gr sp,r9
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inci_h_gr 4,r9
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inci_h_gr 4,r9
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mvi_h_mem 0xffffffff,sp
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mvi_h_mem 0xffffffff,sp
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mvi_h_mem 0xffff0000,r9
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mvi_h_mem 0xffff0000,r9
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inci_h_gr 1,sp ; test unaligned access
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inci_h_gr 1,sp ; test unaligned access
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set_cc 0x05 ; Set mask opposite of expected
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set_cc 0x05 ; Set mask opposite of expected
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and r7,@sp
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and r7,@sp
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test_cc 1 0 0 1
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test_cc 1 0 0 1
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inci_h_gr -1,sp
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inci_h_gr -1,sp
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test_h_mem 0xaaaaaaaa,sp
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test_h_mem 0xaaaaaaaa,sp
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test_h_mem 0xffff0000,r9
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test_h_mem 0xffff0000,r9
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pass
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pass
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