/* Table of opcodes for the OpenRISC 1000 ISA.
|
/* Table of opcodes for the OpenRISC 1000 ISA.
|
|
|
Copyright 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
|
Copyright 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
|
Copyright (C) 2008 Embecosm Limited
|
Copyright (C) 2008 Embecosm Limited
|
|
|
Contributed by Damjan Lampret (lampret@opencores.org).
|
Contributed by Damjan Lampret (lampret@opencores.org).
|
Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
|
Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
|
|
|
This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator.
|
This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator.
|
This file is also part of or1k_gen_isa, GDB and GAS.
|
This file is also part of or1k_gen_isa, GDB and GAS.
|
|
|
This program is free software; you can redistribute it and/or modify it
|
This program is free software; you can redistribute it and/or modify it
|
under the terms of the GNU General Public License as published by the Free
|
under the terms of the GNU General Public License as published by the Free
|
Software Foundation; either version 3 of the License, or (at your option)
|
Software Foundation; either version 3 of the License, or (at your option)
|
any later version.
|
any later version.
|
|
|
This program is distributed in the hope that it will be useful, but WITHOUT
|
This program is distributed in the hope that it will be useful, but WITHOUT
|
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
more details.
|
more details.
|
|
|
You should have received a copy of the GNU General Public License along
|
You should have received a copy of the GNU General Public License along
|
with this program. If not, see <http://www.gnu.org/licenses/>. */
|
with this program. If not, see <http://www.gnu.org/licenses/>. */
|
|
|
/* This program is commented throughout in a fashion suitable for processing
|
/* This program is commented throughout in a fashion suitable for processing
|
with Doxygen. */
|
with Doxygen. */
|
|
|
/* We treat all letters the same in encode/decode routines so
|
/* We treat all letters the same in encode/decode routines so
|
we need to assign some characteristics to them like signess etc.*/
|
we need to assign some characteristics to them like signess etc.*/
|
|
|
#ifndef OR32_H_ISA
|
#ifndef OR32_H_ISA
|
#define OR32_H_ISA
|
#define OR32_H_ISA
|
|
|
#define NUM_UNSIGNED (0)
|
#define NUM_UNSIGNED (0)
|
#define NUM_SIGNED (1)
|
#define NUM_SIGNED (1)
|
|
|
#ifndef PARAMS
|
#ifndef PARAMS
|
#define PARAMS(x) x
|
#define PARAMS(x) x
|
#endif
|
#endif
|
|
|
#ifndef CONST
|
#ifndef CONST
|
#define CONST const
|
#define CONST const
|
#endif
|
#endif
|
|
|
#define MAX_GPRS 32
|
#define MAX_GPRS 32
|
#define PAGE_SIZE 8192
|
#define PAGE_SIZE 8192
|
#undef __HALF_WORD_INSN__
|
#undef __HALF_WORD_INSN__
|
|
|
#define OPERAND_DELIM (',')
|
#define OPERAND_DELIM (',')
|
|
|
#define OR32_IF_DELAY (1)
|
#define OR32_IF_DELAY (1)
|
#define OR32_W_FLAG (2)
|
#define OR32_W_FLAG (2)
|
#define OR32_R_FLAG (4)
|
#define OR32_R_FLAG (4)
|
|
|
#if defined(HAVE_EXECUTION)
|
#if defined(HAVE_EXECUTION)
|
# if SIMPLE_EXECUTION
|
# if SIMPLE_EXECUTION
|
# include "simpl32-defs.h"
|
# include "simpl32-defs.h"
|
# elif DYNAMIC_EXECUTION
|
# elif DYNAMIC_EXECUTION
|
# include "dyn32-defs.h"
|
# include "dyn32-defs.h"
|
# else
|
# else
|
extern void l_none PARAMS((void));
|
extern void l_none PARAMS((void));
|
# endif
|
# endif
|
#else
|
#else
|
extern void l_none PARAMS((void));
|
extern void l_none PARAMS((void));
|
#endif
|
#endif
|
|
|
|
|
struct or32_letter {
|
struct or32_letter {
|
char letter;
|
char letter;
|
int sign;
|
int sign;
|
/* int reloc; relocation per letter ??*/
|
/* int reloc; relocation per letter ??*/
|
};
|
};
|
|
|
enum insn_type {
|
enum insn_type {
|
it_unknown,
|
it_unknown,
|
it_exception,
|
it_exception,
|
it_arith,
|
it_arith,
|
it_shift,
|
it_shift,
|
it_compare,
|
it_compare,
|
it_branch,
|
it_branch,
|
it_jump,
|
it_jump,
|
it_load,
|
it_load,
|
it_store,
|
it_store,
|
it_movimm,
|
it_movimm,
|
it_move,
|
it_move,
|
it_extend,
|
it_extend,
|
it_nop,
|
it_nop,
|
it_mac,
|
it_mac,
|
it_float };
|
it_float };
|
|
|
/* Main instruction specification array. */
|
/* Main instruction specification array. */
|
struct or32_opcode {
|
struct or32_opcode {
|
/* Name of the instruction. */
|
/* Name of the instruction. */
|
char *name;
|
char *name;
|
|
|
/* A string of characters which describe the operands.
|
/* A string of characters which describe the operands.
|
Valid characters are:
|
Valid characters are:
|
,() Itself. Characters appears in the assembly code.
|
,() Itself. Characters appears in the assembly code.
|
rA Register operand.
|
rA Register operand.
|
rB Register operand.
|
rB Register operand.
|
rD Register operand (destination).
|
rD Register operand (destination).
|
I An immediate operand, range -32768 to 32767.
|
I An immediate operand, range -32768 to 32767.
|
J An immediate operand, range . (unused)
|
J An immediate operand, range . (unused)
|
K An immediate operand, range 0 to 65535.
|
K An immediate operand, range 0 to 65535.
|
L An immediate operand, range 0 to 63.
|
L An immediate operand, range 0 to 63.
|
M An immediate operand, range . (unused)
|
M An immediate operand, range . (unused)
|
N An immediate operand, range -33554432 to 33554431.
|
N An immediate operand, range -33554432 to 33554431.
|
O An immediate operand, range . (unused) */
|
O An immediate operand, range . (unused) */
|
char *args;
|
char *args;
|
|
|
/* Opcode and operand encoding. */
|
/* Opcode and operand encoding. */
|
char *encoding;
|
char *encoding;
|
|
|
#ifdef HAVE_EXECUTION
|
#ifdef HAVE_EXECUTION
|
# if COMPLEX_EXECUTION
|
# if COMPLEX_EXECUTION
|
char *function_name;
|
char *function_name;
|
# elif SIMPLE_EXECUTION
|
# elif SIMPLE_EXECUTION
|
void (*exec)(struct iqueue_entry *);
|
void (*exec)(struct iqueue_entry *);
|
# else /* DYNAMIC_EXECUTION */
|
# else /* DYNAMIC_EXECUTION */
|
void (*exec)(struct op_queue *opq, int param_t[3], int);
|
void (*exec)(struct op_queue *opq, int param_t[3], int);
|
# endif
|
# endif
|
#else /* HAVE_EXECUTION */
|
#else /* HAVE_EXECUTION */
|
void (*exec)(void);
|
void (*exec)(void);
|
#endif
|
#endif
|
|
|
unsigned int flags;
|
unsigned int flags;
|
enum insn_type func_unit;
|
enum insn_type func_unit;
|
};
|
};
|
|
|
/* This operand is the last in the list */
|
/* This operand is the last in the list */
|
#define OPTYPE_LAST (0x80000000)
|
#define OPTYPE_LAST (0x80000000)
|
/* This operand marks the end of the operand sequence (for things like I(rD)) */
|
/* This operand marks the end of the operand sequence (for things like I(rD)) */
|
#define OPTYPE_OP (0x40000000)
|
#define OPTYPE_OP (0x40000000)
|
/* The operand specifies a register index */
|
/* The operand specifies a register index */
|
#define OPTYPE_REG (0x20000000)
|
#define OPTYPE_REG (0x20000000)
|
/* The operand must be sign extended */
|
/* The operand must be sign extended */
|
#define OPTYPE_SIG (0x10000000)
|
#define OPTYPE_SIG (0x10000000)
|
/* Operand is a relative address, the `I' in `I(rD)' */
|
/* Operand is a relative address, the `I' in `I(rD)' */
|
#define OPTYPE_DIS (0x08000000)
|
#define OPTYPE_DIS (0x08000000)
|
/* The operand is a destination */
|
/* The operand is a destination */
|
#define OPTYPE_DST (0x04000000)
|
#define OPTYPE_DST (0x04000000)
|
/* Which bit of the operand is the sign bit */
|
/* Which bit of the operand is the sign bit */
|
#define OPTYPE_SBIT (0x00001F00)
|
#define OPTYPE_SBIT (0x00001F00)
|
/* Amount to shift the instruction word right to get the operand */
|
/* Amount to shift the instruction word right to get the operand */
|
#define OPTYPE_SHR (0x0000001F)
|
#define OPTYPE_SHR (0x0000001F)
|
#define OPTYPE_SBIT_SHR (8)
|
#define OPTYPE_SBIT_SHR (8)
|
|
|
/* MM: Data how to decode operands. */
|
/* MM: Data how to decode operands. */
|
extern struct insn_op_struct {
|
extern struct insn_op_struct {
|
unsigned long type;
|
unsigned long type;
|
unsigned long data;
|
unsigned long data;
|
} **op_start;
|
} **op_start;
|
|
|
/* Leaf flag used in automata building */
|
/* Leaf flag used in automata building */
|
#define LEAF_FLAG (0x80000000)
|
#define LEAF_FLAG (0x80000000)
|
|
|
struct temp_insn_struct
|
struct temp_insn_struct
|
{
|
{
|
unsigned long insn;
|
unsigned long insn;
|
unsigned long insn_mask;
|
unsigned long insn_mask;
|
int in_pass;
|
int in_pass;
|
};
|
};
|
|
|
extern unsigned long *automata;
|
extern unsigned long *automata;
|
extern struct temp_insn_struct *ti;
|
extern struct temp_insn_struct *ti;
|
|
|
extern CONST struct or32_letter or32_letters[];
|
extern CONST struct or32_letter or32_letters[];
|
|
|
extern CONST struct or32_opcode or32_opcodes[];
|
extern CONST struct or32_opcode or32_opcodes[];
|
|
|
extern CONST int num_opcodes;
|
extern CONST int num_opcodes;
|
|
|
extern char *disassembled;
|
extern char *disassembled;
|
|
|
/* Calculates instruction length in bytes. Always 4 for OR32. */
|
/* Calculates instruction length in bytes. Always 4 for OR32. */
|
extern int insn_len PARAMS((int insn_index));
|
extern int insn_len PARAMS((int insn_index));
|
|
|
/* Is individual insn's operand signed or unsigned? */
|
/* Is individual insn's operand signed or unsigned? */
|
extern int letter_signed PARAMS((char l));
|
extern int letter_signed PARAMS((char l));
|
|
|
/* Number of letters in the individual lettered operand. */
|
/* Number of letters in the individual lettered operand. */
|
extern int letter_range PARAMS((char l));
|
extern int letter_range PARAMS((char l));
|
|
|
/* MM: Returns index of given instruction name. */
|
/* MM: Returns index of given instruction name. */
|
extern int insn_index PARAMS((char *insn));
|
extern int insn_index PARAMS((char *insn));
|
|
|
/* MM: Returns instruction name from index. */
|
/* MM: Returns instruction name from index. */
|
extern CONST char *insn_name PARAMS ((int index));
|
extern CONST char *insn_name PARAMS ((int index));
|
|
|
/* MM: Constructs new FSM, based on or32_opcodes. */
|
/* MM: Constructs new FSM, based on or32_opcodes. */
|
extern void build_automata PARAMS ((void));
|
extern void build_automata PARAMS ((int quiet));
|
|
|
/* MM: Destructs FSM. */
|
/* MM: Destructs FSM. */
|
extern void destruct_automata PARAMS ((void));
|
extern void destruct_automata PARAMS ((void));
|
|
|
/* MM: Decodes instruction using FSM. Call build_automata first. */
|
/* MM: Decodes instruction using FSM. Call build_automata first. */
|
extern int insn_decode PARAMS((unsigned int insn));
|
extern int insn_decode PARAMS((unsigned int insn));
|
|
|
/* Disassemble one instruction from insn to disassemble.
|
/* Disassemble one instruction from insn to disassemble.
|
Return the size of the instruction. */
|
Return the size of the instruction. */
|
int disassemble_insn (unsigned long insn);
|
int disassemble_insn (unsigned long insn);
|
|
|
/* Disassemble one instruction from insn index.
|
/* Disassemble one instruction from insn index.
|
Return the size of the instruction. */
|
Return the size of the instruction. */
|
int disassemble_index (unsigned long insn, int index);
|
int disassemble_index (unsigned long insn, int index);
|
|
|
/* FOR INTERNAL USE ONLY */
|
/* FOR INTERNAL USE ONLY */
|
/* Automatically does zero- or sign- extension and also finds correct
|
/* Automatically does zero- or sign- extension and also finds correct
|
sign bit position if sign extension is correct extension. Which extension
|
sign bit position if sign extension is correct extension. Which extension
|
is proper is figured out from letter description. */
|
is proper is figured out from letter description. */
|
unsigned long extend_imm(unsigned long imm, char l);
|
unsigned long extend_imm(unsigned long imm, char l);
|
|
|
/* Extracts value from opcode */
|
/* Extracts value from opcode */
|
unsigned long or32_extract(char param_ch, char *enc_initial, unsigned long insn);
|
unsigned long or32_extract(char param_ch, char *enc_initial, unsigned long insn);
|
|
|
#endif
|
#endif
|
|
|
|
|
