/* load.c -- OpenRISC Custom Unit Compiler, instruction loading and converting
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/* load.c -- OpenRISC Custom Unit Compiler, instruction loading and converting
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* Copyright (C) 2002 Marko Mlinar, markom@opencores.org
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* Copyright (C) 2002 Marko Mlinar, markom@opencores.org
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*
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*
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* This file is part of OpenRISC 1000 Architectural Simulator.
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* This file is part of OpenRISC 1000 Architectural Simulator.
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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* (at your option) any later version.
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*
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*
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* This program is distributed in the hope that it will be useful,
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* GNU General Public License for more details.
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*
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*
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* You should have received a copy of the GNU General Public License
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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#include <stdio.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdlib.h>
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#include <stdarg.h>
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#include <stdarg.h>
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#include <assert.h>
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#include <assert.h>
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#include "config.h"
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#include "config.h"
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#include "port.h"
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#include "port.h"
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#include "arch.h"
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#include "arch.h"
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#include "abstract.h"
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#include "abstract.h"
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#include "sim-config.h"
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#include "sim-config.h"
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#include "cuc.h"
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#include "cuc.h"
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#include "opcode/or32.h"
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#include "opcode/or32.h"
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#include "insn.h"
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#include "insn.h"
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static const cuc_conv conv[] = {
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static const cuc_conv conv[] = {
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{"l.add", II_ADD}, {"l.addi", II_ADD},
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{"l.add", II_ADD}, {"l.addi", II_ADD},
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{"l.movhi", II_OR},
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{"l.movhi", II_OR},
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{"l.sub", II_SUB}, {"l.subi", II_SUB},
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{"l.sub", II_SUB}, {"l.subi", II_SUB},
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{"l.and", II_AND}, {"l.andi", II_AND},
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{"l.and", II_AND}, {"l.andi", II_AND},
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{"l.xor", II_XOR}, {"l.xori", II_XOR},
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{"l.xor", II_XOR}, {"l.xori", II_XOR},
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{"l.or", II_OR }, {"l.ori", II_OR},
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{"l.or", II_OR }, {"l.ori", II_OR},
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{"l.mul", II_MUL}, {"l.muli", II_MUL},
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{"l.mul", II_MUL}, {"l.muli", II_MUL},
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{"l.sra", II_SRA}, {"l.srai", II_SRA},
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{"l.sra", II_SRA}, {"l.srai", II_SRA},
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{"l.srl", II_SRL}, {"l.srli", II_SRL},
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{"l.srl", II_SRL}, {"l.srli", II_SRL},
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{"l.sll", II_SLL}, {"l.slli", II_SLL},
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{"l.sll", II_SLL}, {"l.slli", II_SLL},
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{"l.lbz",II_LB | II_MEM}, {"l.lbs", II_LB | II_MEM | II_SIGNED},
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{"l.lbz",II_LB | II_MEM}, {"l.lbs", II_LB | II_MEM | II_SIGNED},
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{"l.lhz",II_LH | II_MEM}, {"l.lhs", II_LH | II_MEM | II_SIGNED},
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{"l.lhz",II_LH | II_MEM}, {"l.lhs", II_LH | II_MEM | II_SIGNED},
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{"l.lwz",II_LW | II_MEM}, {"l.lws", II_LW | II_MEM | II_SIGNED},
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{"l.lwz",II_LW | II_MEM}, {"l.lws", II_LW | II_MEM | II_SIGNED},
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{"l.sb", II_SB | II_MEM}, {"l.sh", II_SH | II_MEM}, {"l.sw", II_SW | II_MEM},
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{"l.sb", II_SB | II_MEM}, {"l.sh", II_SH | II_MEM}, {"l.sw", II_SW | II_MEM},
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{"l.sfeq", II_SFEQ }, {"l.sfeqi", II_SFEQ},
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{"l.sfeq", II_SFEQ }, {"l.sfeqi", II_SFEQ},
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{"l.sfne", II_SFNE }, {"l.sfnei", II_SFNE},
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{"l.sfne", II_SFNE }, {"l.sfnei", II_SFNE},
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{"l.sflts", II_SFLT | II_SIGNED}, {"l.sfltis", II_SFLT | II_SIGNED},
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{"l.sflts", II_SFLT | II_SIGNED}, {"l.sfltis", II_SFLT | II_SIGNED},
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{"l.sfltu", II_SFLT}, {"l.sfltiu", II_SFLT},
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{"l.sfltu", II_SFLT}, {"l.sfltiu", II_SFLT},
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{"l.sfgts", II_SFGT | II_SIGNED}, {"l.sfgtis", II_SFGT | II_SIGNED},
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{"l.sfgts", II_SFGT | II_SIGNED}, {"l.sfgtis", II_SFGT | II_SIGNED},
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{"l.sfgtu", II_SFGT}, {"l.sfgtiu", II_SFGT},
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{"l.sfgtu", II_SFGT}, {"l.sfgtiu", II_SFGT},
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{"l.sfges", II_SFGE | II_SIGNED}, {"l.sfgeis", II_SFGE | II_SIGNED},
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{"l.sfges", II_SFGE | II_SIGNED}, {"l.sfgeis", II_SFGE | II_SIGNED},
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{"l.sfgeu", II_SFGE}, {"l.sfgeiu", II_SFGE},
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{"l.sfgeu", II_SFGE}, {"l.sfgeiu", II_SFGE},
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{"l.sfles", II_SFLE | II_SIGNED}, {"l.sfleis", II_SFLE | II_SIGNED},
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{"l.sfles", II_SFLE | II_SIGNED}, {"l.sfleis", II_SFLE | II_SIGNED},
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{"l.sfleu", II_SFLE}, {"l.sfleiu", II_SFLE},
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{"l.sfleu", II_SFLE}, {"l.sfleiu", II_SFLE},
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{"l.j", II_BF },
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{"l.j", II_BF },
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{"l.bf", II_BF },
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{"l.bf", II_BF },
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{"l.jal", II_CALL },
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{"l.jal", II_CALL },
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{"l.nop", II_NOP }
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{"l.nop", II_NOP }
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};
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};
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/* Instructions from function */
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/* Instructions from function */
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cuc_insn insn[MAX_INSNS];
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cuc_insn insn[MAX_INSNS];
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int num_insn;
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int num_insn;
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int reloc[MAX_INSNS];
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int reloc[MAX_INSNS];
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/* Prints out instructions */
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/* Prints out instructions */
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void print_cuc_insns (char *s, int verbose)
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void print_cuc_insns (char *s, int verbose)
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{
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{
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PRINTF ("****************** %s ******************\n", s);
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PRINTF ("****************** %s ******************\n", s);
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print_insns (0, insn, num_insn,verbose);
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print_insns (0, insn, num_insn,verbose);
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PRINTF ("\n\n");
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PRINTF ("\n\n");
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}
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}
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void xchg_insn (int i, int j)
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void xchg_insn (int i, int j)
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{
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{
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cuc_insn t;
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cuc_insn t;
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t = insn[i];
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t = insn[i];
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insn[i] = insn[j];
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insn[i] = insn[j];
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insn[j] = t;
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insn[j] = t;
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}
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}
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/* Negates conditional instruction */
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/* Negates conditional instruction */
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void negate_conditional (cuc_insn *ii)
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void negate_conditional (cuc_insn *ii)
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{
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{
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assert (ii->type & IT_COND);
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assert (ii->type & IT_COND);
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if (ii->index == II_SFEQ) change_insn_type (ii, II_SFNE);
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if (ii->index == II_SFEQ) change_insn_type (ii, II_SFNE);
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else if (ii->index == II_SFNE) change_insn_type (ii, II_SFEQ);
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else if (ii->index == II_SFNE) change_insn_type (ii, II_SFEQ);
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else if (ii->index == II_SFLT) change_insn_type (ii, II_SFGE);
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else if (ii->index == II_SFLT) change_insn_type (ii, II_SFGE);
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else if (ii->index == II_SFGT) change_insn_type (ii, II_SFLE);
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else if (ii->index == II_SFGT) change_insn_type (ii, II_SFLE);
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else if (ii->index == II_SFLE) change_insn_type (ii, II_SFGT);
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else if (ii->index == II_SFLE) change_insn_type (ii, II_SFGT);
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else if (ii->index == II_SFGE) change_insn_type (ii, II_SFLT);
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else if (ii->index == II_SFGE) change_insn_type (ii, II_SFLT);
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else assert (0);
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else assert (0);
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}
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}
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/* Remove delay slots */
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/* Remove delay slots */
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void remove_dslots ()
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void remove_dslots ()
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{
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{
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int i;
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int i;
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int in_delay = 0;
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int in_delay = 0;
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for (i = 0; i < num_insn; i++) {
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for (i = 0; i < num_insn; i++) {
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if (in_delay) insn[i].type |= IT_INDELAY;
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if (in_delay) insn[i].type |= IT_INDELAY;
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in_delay = 0;
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in_delay = 0;
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if (insn[i].type & IT_BRANCH) in_delay = 1;
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if (insn[i].type & IT_BRANCH) in_delay = 1;
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if (insn[i].type & IT_INDELAY) {
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if (insn[i].type & IT_INDELAY) {
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cuc_insn *ii;
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cuc_insn *ii;
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cuc_insn *bi;
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cuc_insn *bi;
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assert (i >= 2);
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assert (i >= 2);
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ii = &insn[i - 2];
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ii = &insn[i - 2];
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bi = &insn[i - 1];
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bi = &insn[i - 1];
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/* delay slot should not be a branch target! */
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/* delay slot should not be a branch target! */
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assert ((insn[i].type & IT_BBSTART) == 0);
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assert ((insn[i].type & IT_BBSTART) == 0);
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assert ((bi->type & IT_INDELAY) == 0);
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assert ((bi->type & IT_INDELAY) == 0);
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insn[i].type &= ~IT_INDELAY; /* no more in delay slot */
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insn[i].type &= ~IT_INDELAY; /* no more in delay slot */
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/* Get the value we need before the actual jump */
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/* Get the value we need before the actual jump */
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if (bi->opt[1] & OPT_REGISTER && bi->op[1] >= 0) {
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if (bi->opt[1] & OPT_REGISTER && bi->op[1] >= 0) {
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int r = bi->op[1];
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int r = bi->op[1];
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assert (ii->index == II_NOP);
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assert (ii->index == II_NOP);
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change_insn_type (ii, II_ADD);
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change_insn_type (ii, II_ADD);
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ii->type = IT_COND;
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ii->type = IT_COND;
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ii->dep = NULL;
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ii->dep = NULL;
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ii->op[0] = r; ii->opt[0] = OPT_REGISTER | OPT_DEST;
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ii->op[0] = r; ii->opt[0] = OPT_REGISTER | OPT_DEST;
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ii->op[1] = r; ii->opt[1] = OPT_REGISTER;
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ii->op[1] = r; ii->opt[1] = OPT_REGISTER;
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ii->op[2] = 0; ii->opt[2] = OPT_CONST;
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ii->op[2] = 0; ii->opt[2] = OPT_CONST;
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ii->opt[3] = OPT_NONE;
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ii->opt[3] = OPT_NONE;
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bi->op[1] = i - 2; bi->opt[1] = OPT_REF;
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bi->op[1] = i - 2; bi->opt[1] = OPT_REF;
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}
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}
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xchg_insn (i, i - 1);
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xchg_insn (i, i - 1);
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}
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}
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}
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}
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assert (in_delay == 0);
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assert (in_delay == 0);
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}
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}
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/* Convert local variables (uses stack frame -- r1) to internal values */
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/* Convert local variables (uses stack frame -- r1) to internal values */
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void detect_locals ()
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void detect_locals ()
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{
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{
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int stack[CUC_MAX_STACK];
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int stack[CUC_MAX_STACK];
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int i, can_remove_stack = 1;
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int i, can_remove_stack = 1;
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int real_stack_size = 0;
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int real_stack_size = 0;
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for (i = 0; i < CUC_MAX_STACK; i++) stack[i] = -1;
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for (i = 0; i < CUC_MAX_STACK; i++) stack[i] = -1;
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for (i = 0; i < num_insn; i++) {
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for (i = 0; i < num_insn; i++) {
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/* sw off (r1),rx */
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/* sw off (r1),rx */
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if (insn[i].index == II_SW
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if (insn[i].index == II_SW
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&& (insn[i].opt[0] & OPT_CONST)
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&& (insn[i].opt[0] & OPT_CONST)
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&& insn[i].op[1] == 1 && (insn[i].opt[1] & OPT_REGISTER)) {
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&& insn[i].op[1] == 1 && (insn[i].opt[1] & OPT_REGISTER)) {
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if (insn[i].op[0] < CUC_MAX_STACK/* && insn[i].op[1] >= 4*/) { /* Convert to normal move */
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if (insn[i].op[0] < CUC_MAX_STACK/* && insn[i].op[1] >= 4*/) { /* Convert to normal move */
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stack[insn[i].op[0]] = i;
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stack[insn[i].op[0]] = i;
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insn[i].type &= IT_INDELAY | IT_BBSTART;
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insn[i].type &= IT_INDELAY | IT_BBSTART;
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change_insn_type (&insn[i], II_ADD);
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change_insn_type (&insn[i], II_ADD);
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insn[i].op[0] = -1; insn[i].opt[0] = OPT_REGISTER | OPT_DEST;
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insn[i].op[0] = -1; insn[i].opt[0] = OPT_REGISTER | OPT_DEST;
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insn[i].op[1] = insn[i].op[2]; insn[i].opt[1] = insn[i].opt[2];
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insn[i].op[1] = insn[i].op[2]; insn[i].opt[1] = insn[i].opt[2];
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insn[i].op[2] = 0; insn[i].opt[2] = OPT_CONST;
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insn[i].op[2] = 0; insn[i].opt[2] = OPT_CONST;
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} else can_remove_stack = 0;
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} else can_remove_stack = 0;
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/* lw rx,off (r1) */
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/* lw rx,off (r1) */
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} else if (insn[i].index == II_LW
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} else if (insn[i].index == II_LW
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&& (insn[i].opt[1] & OPT_CONST)
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&& (insn[i].opt[1] & OPT_CONST)
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&& insn[i].op[2] == 1 && (insn[i].opt[2] & OPT_REGISTER)) {
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&& insn[i].op[2] == 1 && (insn[i].opt[2] & OPT_REGISTER)) {
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if (insn[i].op[1] < CUC_MAX_STACK && stack[insn[i].op[1]] >= 0) { /* Convert to normal move */
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if (insn[i].op[1] < CUC_MAX_STACK && stack[insn[i].op[1]] >= 0) { /* Convert to normal move */
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insn[i].type &= IT_INDELAY | IT_BBSTART;
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insn[i].type &= IT_INDELAY | IT_BBSTART;
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change_insn_type (&insn[i], II_ADD);
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change_insn_type (&insn[i], II_ADD);
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insn[i].op[1] = stack[insn[i].op[1]]; insn[i].opt[1] = OPT_REF;
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insn[i].op[1] = stack[insn[i].op[1]]; insn[i].opt[1] = OPT_REF;
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insn[i].op[2] = 0; insn[i].opt[2] = OPT_CONST;
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insn[i].op[2] = 0; insn[i].opt[2] = OPT_CONST;
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} else can_remove_stack = 0;
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} else can_remove_stack = 0;
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/* Check for defined stack size */
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/* Check for defined stack size */
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} else if (insn[i].index == II_ADD && !real_stack_size
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} else if (insn[i].index == II_ADD && !real_stack_size
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&& (insn[i].opt[0] & OPT_REGISTER) && insn[i].op[0] == 1
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&& (insn[i].opt[0] & OPT_REGISTER) && insn[i].op[0] == 1
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&& (insn[i].opt[1] & OPT_REGISTER) && insn[i].op[1] == 1
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&& (insn[i].opt[1] & OPT_REGISTER) && insn[i].op[1] == 1
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&& (insn[i].opt[2] & OPT_CONST)) {
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&& (insn[i].opt[2] & OPT_CONST)) {
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real_stack_size = -insn[i].op[2];
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real_stack_size = -insn[i].op[2];
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}
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}
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}
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}
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//assert (can_remove_stack); /* TODO */
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//assert (can_remove_stack); /* TODO */
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}
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}
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/* Disassemble one instruction from insn index and generate parameters */
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/* Disassemble one instruction from insn index and generate parameters */
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const char *build_insn (unsigned long data, cuc_insn *insn)
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const char *build_insn (unsigned long data, cuc_insn *insn)
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{
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{
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const char *name;
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const char *name;
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char *s;
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char *s;
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int index = insn_decode (data);
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int index = or1ksim_insn_decode (data);
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struct or32_opcode const *opcode;
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struct or32_opcode const *opcode;
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int i, argc = 0;
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int i, argc = 0;
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insn->insn = data;
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insn->insn = data;
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insn->index = -1;
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insn->index = -1;
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insn->type = 0;
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insn->type = 0;
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name = insn_name (index);
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name = or1ksim_insn_name (index);
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insn->index = index;
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insn->index = index;
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disassemble_index (data, index);
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or1ksim_disassemble_index (data, index);
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strcpy (insn->disasm, disassembled);
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strcpy (insn->disasm, or1ksim_disassembled);
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insn->dep = NULL;
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insn->dep = NULL;
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for (i = 0; i < MAX_OPERANDS; i++) insn->opt[i] = OPT_NONE;
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for (i = 0; i < MAX_OPERANDS; i++) insn->opt[i] = OPT_NONE;
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if (index < 0) {
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if (index < 0) {
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fprintf (stderr, "Invalid opcode 0x%08lx!\n", data);
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fprintf (stderr, "Invalid opcode 0x%08lx!\n", data);
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exit (1);
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exit (1);
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}
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}
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opcode = &or32_opcodes[index];
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opcode = &or1ksim_or32_opcodes[index];
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for (s = opcode->args; *s != '\0'; ++s) {
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for (s = opcode->args; *s != '\0'; ++s) {
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switch (*s) {
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switch (*s) {
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case '\0': return name;
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case '\0': return name;
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case 'r':
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case 'r':
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insn->opt[argc] = OPT_REGISTER | (argc ? 0 : OPT_DEST);
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insn->opt[argc] = OPT_REGISTER | (argc ? 0 : OPT_DEST);
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insn->op[argc++] = or32_extract(*++s, opcode->encoding, data);
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insn->op[argc++] = or1ksim_or32_extract(*++s, opcode->encoding, data);
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break;
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break;
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default:
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default:
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if (strchr (opcode->encoding, *s)) {
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if (strchr (opcode->encoding, *s)) {
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unsigned long imm = or32_extract (*s, opcode->encoding, data);
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unsigned long imm = or1ksim_or32_extract (*s, opcode->encoding, data);
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imm = extend_imm(imm, *s);
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imm = or1ksim_extend_imm(imm, *s);
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insn->opt[argc] = OPT_CONST;
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insn->opt[argc] = OPT_CONST;
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insn->op[argc++] = imm;
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insn->op[argc++] = imm;
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}
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}
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}
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}
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}
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}
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return name;
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return name;
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}
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}
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|
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/* inserts nop before branch */
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/* inserts nop before branch */
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void expand_branch ()
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void expand_branch ()
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{
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{
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int i, j, num_bra = 0, d;
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int i, j, num_bra = 0, d;
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for (i = 0; i < num_insn; i++) if (insn[i].type & IT_BRANCH) num_bra++;
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for (i = 0; i < num_insn; i++) if (insn[i].type & IT_BRANCH) num_bra++;
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|
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d = num_insn + 2 * num_bra;
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d = num_insn + 2 * num_bra;
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assert (d < MAX_INSNS);
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assert (d < MAX_INSNS);
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|
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/* Add nop before branch */
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/* Add nop before branch */
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for (i = num_insn - 1; i >= 0; i--) if (insn[i].type & IT_BRANCH) {
|
for (i = num_insn - 1; i >= 0; i--) if (insn[i].type & IT_BRANCH) {
|
insn[--d] = insn[i]; // for delay slot (later)
|
insn[--d] = insn[i]; // for delay slot (later)
|
if (insn[d].opt[1] & OPT_REGISTER) {
|
if (insn[d].opt[1] & OPT_REGISTER) {
|
assert (insn[d].op[1] == FLAG_REG);
|
assert (insn[d].op[1] == FLAG_REG);
|
insn[d].op[1] = i; insn[d].opt[1] = OPT_REF;
|
insn[d].op[1] = i; insn[d].opt[1] = OPT_REF;
|
}
|
}
|
insn[--d] = insn[i]; // for branch
|
insn[--d] = insn[i]; // for branch
|
change_insn_type (&insn[d], II_NOP);
|
change_insn_type (&insn[d], II_NOP);
|
insn[--d] = insn[i]; // save flag & negation of conditional, if required
|
insn[--d] = insn[i]; // save flag & negation of conditional, if required
|
change_insn_type (&insn[d], II_CMOV);
|
change_insn_type (&insn[d], II_CMOV);
|
insn[d].op[0] = -1; insn[d].opt[0] = OPT_REGISTER | OPT_DEST;
|
insn[d].op[0] = -1; insn[d].opt[0] = OPT_REGISTER | OPT_DEST;
|
insn[d].op[1] = insn[d].type & IT_FLAG1 ? 0 : 1; insn[d].opt[1] = OPT_CONST;
|
insn[d].op[1] = insn[d].type & IT_FLAG1 ? 0 : 1; insn[d].opt[1] = OPT_CONST;
|
insn[d].op[2] = insn[d].type & IT_FLAG1 ? 1 : 0; insn[d].opt[2] = OPT_CONST;
|
insn[d].op[2] = insn[d].type & IT_FLAG1 ? 1 : 0; insn[d].opt[2] = OPT_CONST;
|
insn[d].op[3] = FLAG_REG; insn[d].opt[3] = OPT_REGISTER;
|
insn[d].op[3] = FLAG_REG; insn[d].opt[3] = OPT_REGISTER;
|
insn[d].type = IT_COND;
|
insn[d].type = IT_COND;
|
if (insn[d].type)
|
if (insn[d].type)
|
reloc[i] = d;
|
reloc[i] = d;
|
} else {
|
} else {
|
insn[--d] = insn[i];
|
insn[--d] = insn[i];
|
reloc[i] = d;
|
reloc[i] = d;
|
}
|
}
|
num_insn += 2 * num_bra;
|
num_insn += 2 * num_bra;
|
for (i = 0; i < num_insn; i++)
|
for (i = 0; i < num_insn; i++)
|
for (j = 0; j < MAX_OPERANDS; j++)
|
for (j = 0; j < MAX_OPERANDS; j++)
|
if (insn[i].opt[j] & OPT_REF || insn[i].opt[j] & OPT_JUMP)
|
if (insn[i].opt[j] & OPT_REF || insn[i].opt[j] & OPT_JUMP)
|
insn[i].op[j] = reloc[insn[i].op[j]];
|
insn[i].op[j] = reloc[insn[i].op[j]];
|
}
|
}
|
|
|
/* expands immediate memory instructions to two */
|
/* expands immediate memory instructions to two */
|
void expand_memory ()
|
void expand_memory ()
|
{
|
{
|
int i, j, num_mem = 0, d;
|
int i, j, num_mem = 0, d;
|
for (i = 0; i < num_insn; i++) if (insn[i].type & IT_MEMORY) num_mem++;
|
for (i = 0; i < num_insn; i++) if (insn[i].type & IT_MEMORY) num_mem++;
|
|
|
d = num_insn + num_mem;
|
d = num_insn + num_mem;
|
assert (d < MAX_INSNS);
|
assert (d < MAX_INSNS);
|
|
|
/* Split memory commands */
|
/* Split memory commands */
|
for (i = num_insn - 1; i >= 0; i--) if (insn[i].type & IT_MEMORY) {
|
for (i = num_insn - 1; i >= 0; i--) if (insn[i].type & IT_MEMORY) {
|
insn[--d] = insn[i];
|
insn[--d] = insn[i];
|
insn[--d] = insn[i];
|
insn[--d] = insn[i];
|
reloc[i] = d;
|
reloc[i] = d;
|
switch (insn[d].index) {
|
switch (insn[d].index) {
|
case II_SW:
|
case II_SW:
|
case II_SH:
|
case II_SH:
|
case II_SB:
|
case II_SB:
|
insn[d + 1].op[1] = d; insn[d + 1].opt[1] = OPT_REF; /* sw rx,(t($-1)) */
|
insn[d + 1].op[1] = d; insn[d + 1].opt[1] = OPT_REF; /* sw rx,(t($-1)) */
|
insn[d + 1].op[0] = insn[i].op[2]; insn[d + 1].opt[0] = insn[d + 1].opt[2];
|
insn[d + 1].op[0] = insn[i].op[2]; insn[d + 1].opt[0] = insn[d + 1].opt[2];
|
insn[d + 1].opt[2] = OPT_NONE;
|
insn[d + 1].opt[2] = OPT_NONE;
|
insn[d + 1].type &= ~IT_BBSTART;
|
insn[d + 1].type &= ~IT_BBSTART;
|
insn[d].op[2] = insn[d].op[0]; insn[d].opt[2] = insn[d].opt[0];
|
insn[d].op[2] = insn[d].op[0]; insn[d].opt[2] = insn[d].opt[0];
|
insn[d].op[0] = -1; insn[d].opt[0] = OPT_REGISTER | OPT_DEST; /* add rd, ra, rb */
|
insn[d].op[0] = -1; insn[d].opt[0] = OPT_REGISTER | OPT_DEST; /* add rd, ra, rb */
|
insn[d].opt[3] = OPT_NONE;
|
insn[d].opt[3] = OPT_NONE;
|
insn[d].type &= IT_INDELAY | IT_BBSTART;
|
insn[d].type &= IT_INDELAY | IT_BBSTART;
|
insn[d].type |= IT_MEMADD;
|
insn[d].type |= IT_MEMADD;
|
change_insn_type (&insn[d], II_ADD);
|
change_insn_type (&insn[d], II_ADD);
|
break;
|
break;
|
case II_LW:
|
case II_LW:
|
case II_LH:
|
case II_LH:
|
case II_LB:
|
case II_LB:
|
insn[d].op[0] = -1; insn[d].opt[0] = OPT_REGISTER | OPT_DEST; /* add rd, ra, rb */
|
insn[d].op[0] = -1; insn[d].opt[0] = OPT_REGISTER | OPT_DEST; /* add rd, ra, rb */
|
insn[d].type &= IT_INDELAY | IT_BBSTART;
|
insn[d].type &= IT_INDELAY | IT_BBSTART;
|
insn[d].type |= IT_MEMADD;
|
insn[d].type |= IT_MEMADD;
|
change_insn_type (&insn[d], II_ADD);
|
change_insn_type (&insn[d], II_ADD);
|
insn[d + 1].op[1] = d; insn[d + 1].opt[1] = OPT_REF; /* lw (t($-1)),rx */
|
insn[d + 1].op[1] = d; insn[d + 1].opt[1] = OPT_REF; /* lw (t($-1)),rx */
|
insn[d + 1].opt[2] = OPT_NONE;
|
insn[d + 1].opt[2] = OPT_NONE;
|
insn[d + 1].opt[3] = OPT_NONE;
|
insn[d + 1].opt[3] = OPT_NONE;
|
insn[d + 1].type &= ~IT_BBSTART;
|
insn[d + 1].type &= ~IT_BBSTART;
|
break;
|
break;
|
default: fprintf (stderr, "%4i, %4i: %s\n", i, d, cuc_insn_name (&insn[d]));
|
default: fprintf (stderr, "%4i, %4i: %s\n", i, d, cuc_insn_name (&insn[d]));
|
assert (0);
|
assert (0);
|
}
|
}
|
} else {
|
} else {
|
insn[--d] = insn[i];
|
insn[--d] = insn[i];
|
reloc[i] = d;
|
reloc[i] = d;
|
}
|
}
|
num_insn += num_mem;
|
num_insn += num_mem;
|
for (i = 0; i < num_insn; i++) if (!(insn[i].type & IT_MEMORY))
|
for (i = 0; i < num_insn; i++) if (!(insn[i].type & IT_MEMORY))
|
for (j = 0; j < MAX_OPERANDS; j++)
|
for (j = 0; j < MAX_OPERANDS; j++)
|
if (insn[i].opt[j] & OPT_REF || insn[i].opt[j] & OPT_JUMP)
|
if (insn[i].opt[j] & OPT_REF || insn[i].opt[j] & OPT_JUMP)
|
insn[i].op[j] = reloc[insn[i].op[j]];
|
insn[i].op[j] = reloc[insn[i].op[j]];
|
}
|
}
|
|
|
/* expands signed comparisons to three instructions */
|
/* expands signed comparisons to three instructions */
|
void expand_signed ()
|
void expand_signed ()
|
{
|
{
|
int i, j, num_sig = 0, d;
|
int i, j, num_sig = 0, d;
|
for (i = 0; i < num_insn; i++)
|
for (i = 0; i < num_insn; i++)
|
if (insn[i].type & IT_SIGNED && !(insn[i].type & IT_MEMORY)) num_sig++;
|
if (insn[i].type & IT_SIGNED && !(insn[i].type & IT_MEMORY)) num_sig++;
|
|
|
d = num_insn + num_sig * 2;
|
d = num_insn + num_sig * 2;
|
assert (d < MAX_INSNS);
|
assert (d < MAX_INSNS);
|
|
|
/* Split signed instructions */
|
/* Split signed instructions */
|
for (i = num_insn - 1; i >= 0; i--)
|
for (i = num_insn - 1; i >= 0; i--)
|
/* We will expand signed memory later */
|
/* We will expand signed memory later */
|
if (insn[i].type & IT_SIGNED && !(insn[i].type & IT_MEMORY)) {
|
if (insn[i].type & IT_SIGNED && !(insn[i].type & IT_MEMORY)) {
|
insn[--d] = insn[i];
|
insn[--d] = insn[i];
|
insn[d].op[1] = d - 2; insn[d].opt[1] = OPT_REF;
|
insn[d].op[1] = d - 2; insn[d].opt[1] = OPT_REF;
|
insn[d].op[2] = d - 1; insn[d].opt[2] = OPT_REF;
|
insn[d].op[2] = d - 1; insn[d].opt[2] = OPT_REF;
|
|
|
insn[--d] = insn[i];
|
insn[--d] = insn[i];
|
change_insn_type (&insn[d], II_ADD);
|
change_insn_type (&insn[d], II_ADD);
|
insn[d].type = 0;
|
insn[d].type = 0;
|
insn[d].op[0] = -1; insn[d].opt[0] = OPT_REGISTER | OPT_DEST;
|
insn[d].op[0] = -1; insn[d].opt[0] = OPT_REGISTER | OPT_DEST;
|
insn[d].op[1] = insn[d].op[2]; insn[d].opt[1] = insn[d].opt[2];
|
insn[d].op[1] = insn[d].op[2]; insn[d].opt[1] = insn[d].opt[2];
|
insn[d].op[2] = 0x80000000; insn[d].opt[2] = OPT_CONST;
|
insn[d].op[2] = 0x80000000; insn[d].opt[2] = OPT_CONST;
|
insn[d].opt[3] = OPT_NONE;
|
insn[d].opt[3] = OPT_NONE;
|
|
|
insn[--d] = insn[i];
|
insn[--d] = insn[i];
|
change_insn_type (&insn[d], II_ADD);
|
change_insn_type (&insn[d], II_ADD);
|
insn[d].type = 0;
|
insn[d].type = 0;
|
insn[d].op[0] = -1; insn[d].opt[0] = OPT_REGISTER | OPT_DEST;
|
insn[d].op[0] = -1; insn[d].opt[0] = OPT_REGISTER | OPT_DEST;
|
insn[d].op[1] = insn[d].op[1]; insn[d].opt[1] = insn[d].opt[1];
|
insn[d].op[1] = insn[d].op[1]; insn[d].opt[1] = insn[d].opt[1];
|
insn[d].op[2] = 0x80000000; insn[d].opt[2] = OPT_CONST;
|
insn[d].op[2] = 0x80000000; insn[d].opt[2] = OPT_CONST;
|
insn[d].opt[3] = OPT_NONE;
|
insn[d].opt[3] = OPT_NONE;
|
|
|
reloc[i] = d;
|
reloc[i] = d;
|
} else {
|
} else {
|
insn[--d] = insn[i];
|
insn[--d] = insn[i];
|
reloc[i] = d;
|
reloc[i] = d;
|
}
|
}
|
num_insn += num_sig * 2;
|
num_insn += num_sig * 2;
|
for (i = 0; i < num_insn; i++) if (insn[i].type & IT_MEMORY || !(insn[i].type & IT_SIGNED)) {
|
for (i = 0; i < num_insn; i++) if (insn[i].type & IT_MEMORY || !(insn[i].type & IT_SIGNED)) {
|
for (j = 0; j < MAX_OPERANDS; j++)
|
for (j = 0; j < MAX_OPERANDS; j++)
|
if (insn[i].opt[j] & OPT_REF || insn[i].opt[j] & OPT_JUMP)
|
if (insn[i].opt[j] & OPT_REF || insn[i].opt[j] & OPT_JUMP)
|
insn[i].op[j] = reloc[insn[i].op[j]];
|
insn[i].op[j] = reloc[insn[i].op[j]];
|
} else insn[i].type &= ~IT_SIGNED;
|
} else insn[i].type &= ~IT_SIGNED;
|
}
|
}
|
|
|
/* expands calls to 7 instructions */
|
/* expands calls to 7 instructions */
|
void expand_calls ()
|
void expand_calls ()
|
{
|
{
|
int i, j, num_call = 0, d;
|
int i, j, num_call = 0, d;
|
for (i = 0; i < num_insn; i++)
|
for (i = 0; i < num_insn; i++)
|
if (insn[i].index == II_CALL) num_call++;
|
if (insn[i].index == II_CALL) num_call++;
|
|
|
d = num_insn + num_call * 6; /* 6 parameters */
|
d = num_insn + num_call * 6; /* 6 parameters */
|
assert (d < MAX_INSNS);
|
assert (d < MAX_INSNS);
|
|
|
/* Split call instructions */
|
/* Split call instructions */
|
for (i = num_insn - 1; i >= 0; i--)
|
for (i = num_insn - 1; i >= 0; i--)
|
/* We will expand signed memory later */
|
/* We will expand signed memory later */
|
if (insn[i].index == II_CALL) {
|
if (insn[i].index == II_CALL) {
|
insn[--d] = insn[i];
|
insn[--d] = insn[i];
|
insn[d].op[0] = insn[d].op[1]; insn[d].opt[0] = OPT_CONST;
|
insn[d].op[0] = insn[d].op[1]; insn[d].opt[0] = OPT_CONST;
|
insn[d].opt[1] = OPT_NONE;
|
insn[d].opt[1] = OPT_NONE;
|
insn[d].type |= IT_VOLATILE;
|
insn[d].type |= IT_VOLATILE;
|
|
|
for (j = 0; j < 6; j++) {
|
for (j = 0; j < 6; j++) {
|
insn[--d] = insn[i];
|
insn[--d] = insn[i];
|
change_insn_type (&insn[d], II_ADD);
|
change_insn_type (&insn[d], II_ADD);
|
insn[d].type = IT_VOLATILE;
|
insn[d].type = IT_VOLATILE;
|
insn[d].op[0] = 3 + j; insn[d].opt[0] = OPT_REGISTER | OPT_DEST;
|
insn[d].op[0] = 3 + j; insn[d].opt[0] = OPT_REGISTER | OPT_DEST;
|
insn[d].op[1] = 3 + j; insn[d].opt[1] = OPT_REGISTER;
|
insn[d].op[1] = 3 + j; insn[d].opt[1] = OPT_REGISTER;
|
insn[d].op[2] = 0x80000000; insn[d].opt[2] = OPT_CONST;
|
insn[d].op[2] = 0x80000000; insn[d].opt[2] = OPT_CONST;
|
insn[d].opt[3] = OPT_NONE;
|
insn[d].opt[3] = OPT_NONE;
|
}
|
}
|
|
|
reloc[i] = d;
|
reloc[i] = d;
|
} else {
|
} else {
|
insn[--d] = insn[i];
|
insn[--d] = insn[i];
|
reloc[i] = d;
|
reloc[i] = d;
|
}
|
}
|
num_insn += num_call * 6;
|
num_insn += num_call * 6;
|
for (i = 0; i < num_insn; i++)
|
for (i = 0; i < num_insn; i++)
|
for (j = 0; j < MAX_OPERANDS; j++)
|
for (j = 0; j < MAX_OPERANDS; j++)
|
if (insn[i].opt[j] & OPT_REF || insn[i].opt[j] & OPT_JUMP)
|
if (insn[i].opt[j] & OPT_REF || insn[i].opt[j] & OPT_JUMP)
|
insn[i].op[j] = reloc[insn[i].op[j]];
|
insn[i].op[j] = reloc[insn[i].op[j]];
|
}
|
}
|
|
|
/* Loads function from file into global array insn.
|
/* Loads function from file into global array insn.
|
Function returns nonzero if function cannot be converted. */
|
Function returns nonzero if function cannot be converted. */
|
int cuc_load (char *in_fn)
|
int cuc_load (char *in_fn)
|
{
|
{
|
int i, j;
|
int i, j;
|
FILE *fi;
|
FILE *fi;
|
int func_return = 0;
|
int func_return = 0;
|
num_insn = 0;
|
num_insn = 0;
|
|
|
log ("Loading filename %s\n", in_fn);
|
log ("Loading filename %s\n", in_fn);
|
if ((fi = fopen (in_fn, "rt")) == NULL) {
|
if ((fi = fopen (in_fn, "rt")) == NULL) {
|
fprintf (stderr, "Cannot open '%s'\n", in_fn);
|
fprintf (stderr, "Cannot open '%s'\n", in_fn);
|
exit (1);
|
exit (1);
|
}
|
}
|
/* Read in the function and decode the instructions */
|
/* Read in the function and decode the instructions */
|
for (i = 0;; i++) {
|
for (i = 0;; i++) {
|
unsigned long data;
|
unsigned long data;
|
const char *name;
|
const char *name;
|
|
|
if (fscanf (fi, "%08lx\n", &data) != 1) break;
|
if (fscanf (fi, "%08lx\n", &data) != 1) break;
|
|
|
/* build params */
|
/* build params */
|
name = build_insn (data, &insn[i]);
|
name = build_insn (data, &insn[i]);
|
if (func_return) func_return++;
|
if (func_return) func_return++;
|
//PRINTF ("%s\n", name);
|
//PRINTF ("%s\n", name);
|
|
|
if (or32_opcodes[insn[i].index].flags & OR32_IF_DELAY) {
|
if (or1ksim_or32_opcodes[insn[i].index].flags & OR32_IF_DELAY) {
|
int f;
|
int f;
|
if (strcmp (name, "l.bnf") == 0) f = 1;
|
if (strcmp (name, "l.bnf") == 0) f = 1;
|
else if (strcmp (name, "l.bf") == 0) f = 0;
|
else if (strcmp (name, "l.bf") == 0) f = 0;
|
else if (strcmp (name, "l.j") == 0) {
|
else if (strcmp (name, "l.j") == 0) {
|
f = -1;
|
f = -1;
|
} else if (strcmp (name, "l.jr") == 0 && func_return == 0) {
|
} else if (strcmp (name, "l.jr") == 0 && func_return == 0) {
|
func_return = 1;
|
func_return = 1;
|
change_insn_type (&insn[i], II_NOP);
|
change_insn_type (&insn[i], II_NOP);
|
continue;
|
continue;
|
} else {
|
} else {
|
cucdebug (1, "Instruction #%i: \"%s\" not supported.\n", i, name);
|
cucdebug (1, "Instruction #%i: \"%s\" not supported.\n", i, name);
|
log ("Instruction #%i: \"%s\" not supported.\n", i, name);
|
log ("Instruction #%i: \"%s\" not supported.\n", i, name);
|
return 1;
|
return 1;
|
}
|
}
|
if (f < 0) { /* l.j */
|
if (f < 0) { /* l.j */
|
/* repair params */
|
/* repair params */
|
change_insn_type (&insn[i], II_BF);
|
change_insn_type (&insn[i], II_BF);
|
insn[i].op[0] = i + insn[i].op[0]; insn[i].opt[0] = OPT_JUMP;
|
insn[i].op[0] = i + insn[i].op[0]; insn[i].opt[0] = OPT_JUMP;
|
insn[i].op[1] = 1; insn[i].opt[1] = OPT_CONST;
|
insn[i].op[1] = 1; insn[i].opt[1] = OPT_CONST;
|
insn[i].type |= IT_BRANCH | IT_VOLATILE;
|
insn[i].type |= IT_BRANCH | IT_VOLATILE;
|
} else {
|
} else {
|
change_insn_type (&insn[i], II_BF);
|
change_insn_type (&insn[i], II_BF);
|
insn[i].op[0] = i + insn[i].op[0]; insn[i].opt[0] = OPT_JUMP;
|
insn[i].op[0] = i + insn[i].op[0]; insn[i].opt[0] = OPT_JUMP;
|
insn[i].op[1] = FLAG_REG; insn[i].opt[1] = OPT_REGISTER;
|
insn[i].op[1] = FLAG_REG; insn[i].opt[1] = OPT_REGISTER;
|
insn[i].type |= IT_BRANCH | IT_VOLATILE;
|
insn[i].type |= IT_BRANCH | IT_VOLATILE;
|
if (f) insn[i].type |= IT_FLAG1;
|
if (f) insn[i].type |= IT_FLAG1;
|
}
|
}
|
} else {
|
} else {
|
insn[i].index = -1;
|
insn[i].index = -1;
|
for (j = 0; j < sizeof (conv) / sizeof (cuc_conv); j++)
|
for (j = 0; j < sizeof (conv) / sizeof (cuc_conv); j++)
|
if (strcmp (conv[j].from, name) == 0) {
|
if (strcmp (conv[j].from, name) == 0) {
|
if (conv[j].to & II_SIGNED) insn[i].type |= IT_SIGNED;
|
if (conv[j].to & II_SIGNED) insn[i].type |= IT_SIGNED;
|
if (conv[j].to & II_MEM) insn[i].type |= IT_MEMORY | IT_VOLATILE;
|
if (conv[j].to & II_MEM) insn[i].type |= IT_MEMORY | IT_VOLATILE;
|
change_insn_type (&insn[i], conv[j].to & II_MASK);
|
change_insn_type (&insn[i], conv[j].to & II_MASK);
|
break;
|
break;
|
}
|
}
|
if (strcmp (name, "l.movhi") == 0) {
|
if (strcmp (name, "l.movhi") == 0) {
|
insn[i].op[1] <<= 16;
|
insn[i].op[1] <<= 16;
|
insn[i].op[2] = 0;
|
insn[i].op[2] = 0;
|
insn[i].opt[2] = OPT_CONST;
|
insn[i].opt[2] = OPT_CONST;
|
}
|
}
|
if (insn[i].index == II_SFEQ || insn[i].index == II_SFNE
|
if (insn[i].index == II_SFEQ || insn[i].index == II_SFNE
|
|| insn[i].index == II_SFLE || insn[i].index == II_SFGT
|
|| insn[i].index == II_SFLE || insn[i].index == II_SFGT
|
|| insn[i].index == II_SFGE || insn[i].index == II_SFLT) {
|
|| insn[i].index == II_SFGE || insn[i].index == II_SFLT) {
|
/* repair params */
|
/* repair params */
|
insn[i].op[2] = insn[i].op[1]; insn[i].opt[2] = insn[i].opt[1] & ~OPT_DEST;
|
insn[i].op[2] = insn[i].op[1]; insn[i].opt[2] = insn[i].opt[1] & ~OPT_DEST;
|
insn[i].op[1] = insn[i].op[0]; insn[i].opt[1] = insn[i].opt[0] & ~OPT_DEST;
|
insn[i].op[1] = insn[i].op[0]; insn[i].opt[1] = insn[i].opt[0] & ~OPT_DEST;
|
insn[i].op[0] = FLAG_REG; insn[i].opt[0] = OPT_DEST | OPT_REGISTER;
|
insn[i].op[0] = FLAG_REG; insn[i].opt[0] = OPT_DEST | OPT_REGISTER;
|
insn[i].opt[3] = OPT_NONE;
|
insn[i].opt[3] = OPT_NONE;
|
insn[i].type |= IT_COND;
|
insn[i].type |= IT_COND;
|
}
|
}
|
if ((insn[i].index < 0) ||
|
if ((insn[i].index < 0) ||
|
((insn[i].index == II_NOP) && (insn[i].op[0] != 0))) {
|
((insn[i].index == II_NOP) && (insn[i].op[0] != 0))) {
|
cucdebug (1, "Instruction #%i: \"%s\" not supported (2).\n", i, name);
|
cucdebug (1, "Instruction #%i: \"%s\" not supported (2).\n", i, name);
|
log ("Instruction #%i: \"%s\" not supported (2).\n", i, name);
|
log ("Instruction #%i: \"%s\" not supported (2).\n", i, name);
|
return 1;
|
return 1;
|
}
|
}
|
}
|
}
|
}
|
}
|
num_insn = i;
|
num_insn = i;
|
fclose (fi);
|
fclose (fi);
|
if (func_return != 2) {
|
if (func_return != 2) {
|
cucdebug (1, "Unsupported function structure.\n");
|
cucdebug (1, "Unsupported function structure.\n");
|
log ("Unsupported function structure.\n");
|
log ("Unsupported function structure.\n");
|
return 1;
|
return 1;
|
}
|
}
|
|
|
log ("Number of instructions loaded = %i\n", num_insn);
|
log ("Number of instructions loaded = %i\n", num_insn);
|
if (cuc_debug >= 3) print_cuc_insns ("INITIAL", 1);
|
if (cuc_debug >= 3) print_cuc_insns ("INITIAL", 1);
|
|
|
log ("Converting.\n");
|
log ("Converting.\n");
|
expand_branch ();
|
expand_branch ();
|
if (cuc_debug >= 6) print_cuc_insns ("AFTER_EXP_BRANCH", 0);
|
if (cuc_debug >= 6) print_cuc_insns ("AFTER_EXP_BRANCH", 0);
|
|
|
remove_dslots ();
|
remove_dslots ();
|
if (cuc_debug >= 6) print_cuc_insns ("NO_DELAY_SLOTS", 0);
|
if (cuc_debug >= 6) print_cuc_insns ("NO_DELAY_SLOTS", 0);
|
|
|
if (config.cuc.calling_convention) {
|
if (config.cuc.calling_convention) {
|
detect_locals ();
|
detect_locals ();
|
if (cuc_debug >= 7) print_cuc_insns ("AFTER_LOCALS", 0);
|
if (cuc_debug >= 7) print_cuc_insns ("AFTER_LOCALS", 0);
|
}
|
}
|
expand_memory ();
|
expand_memory ();
|
if (cuc_debug >= 3) print_cuc_insns ("AFTER_EXP_MEM", 0);
|
if (cuc_debug >= 3) print_cuc_insns ("AFTER_EXP_MEM", 0);
|
|
|
expand_signed ();
|
expand_signed ();
|
if (cuc_debug >= 3) print_cuc_insns ("AFTER_EXP_SIG", 0);
|
if (cuc_debug >= 3) print_cuc_insns ("AFTER_EXP_SIG", 0);
|
|
|
expand_calls ();
|
expand_calls ();
|
if (cuc_debug >= 3) print_cuc_insns ("AFTER_EXP_CALLS", 0);
|
if (cuc_debug >= 3) print_cuc_insns ("AFTER_EXP_CALLS", 0);
|
|
|
return 0;
|
return 0;
|
}
|
}
|
|
|
