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[/] [openrisc/] [trunk/] [or1ksim/] [testsuite/] [test-code-or1k/] [uos/] [tick.c] - Diff between revs 90 and 538

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/* tick.c.  Microkernel tick handler for Or1ksim
/* tick.c.  Microkernel tick handler for Or1ksim
 
 
   Copyright (C) 2000 Damjan Lampret
   Copyright (C) 2000 Damjan Lampret
   Copyright (C) 2010 Embecosm Limited
   Copyright (C) 2010 Embecosm Limited
 
 
   Contributor Damjan Lampret <lampret@opencores.org>
   Contributor Damjan Lampret <lampret@opencores.org>
   Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
   Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
 
 
   This file is part of OpenRISC 1000 Architectural Simulator.
   This file is part of OpenRISC 1000 Architectural Simulator.
 
 
   This program is free software; you can redistribute it and/or modify it
   This program is free software; you can redistribute it and/or modify it
   under the terms of the GNU General Public License as published by the Free
   under the terms of the GNU General Public License as published by the Free
   Software Foundation; either version 3 of the License, or (at your option)
   Software Foundation; either version 3 of the License, or (at your option)
   any later version.
   any later version.
 
 
   This program is distributed in the hope that it will be useful, but WITHOUT
   This program is distributed in the hope that it will be useful, but WITHOUT
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
   more details.
   more details.
 
 
   You should have received a copy of the GNU General Public License along
   You should have received a copy of the GNU General Public License along
   with this program.  If not, see <http:  www.gnu.org/licenses/>.  */
   with this program.  If not, see <http:  www.gnu.org/licenses/>.  */
 
 
/* ----------------------------------------------------------------------------
/* ----------------------------------------------------------------------------
   This code is commented throughout for use with Doxygen.
   This code is commented throughout for use with Doxygen.
   --------------------------------------------------------------------------*/
   --------------------------------------------------------------------------*/
 
 
/* This file is part of test microkernel for OpenRISC 1000. */
/* This file is part of test microkernel for OpenRISC 1000. */
 
 
#include "spr-defs.h"
#include "spr-defs.h"
#include "support.h"
#include "support.h"
 
 
/* Tick timer period */
/* Tick timer period */
unsigned long tick_period;
unsigned long tick_period;
 
 
/* Inform of tick interrupt */
/* Inform of tick interrupt */
void (*tick_inf)();
void (*tick_inf)();
 
 
/* Tick interrupt routine */
/* Tick interrupt routine */
void tick_int()
void tick_int()
{
{
  /* Call inf routine */
  /* Call inf routine */
  (*tick_inf)();
  (*tick_inf)();
 
 
  /* Set new counter period iand clear inet pending bit */
  /* Set new counter period iand clear inet pending bit */
        mtspr(SPR_TTMR, SPR_TTMR_IE | SPR_TTMR_RT | (tick_period & SPR_TTMR_PERIOD));
  mtspr(SPR_TTMR, SPR_TTMR_IE | SPR_TTMR_RT | (tick_period & SPR_TTMR_TP));
}
}
 
 
/* Initialize routine */
/* Initialize routine */
int tick_init(unsigned long period, void (* inf)())
int tick_init(unsigned long period, void (* inf)())
{
{
  /* Save tick timer period and inform routine */
  /* Save tick timer period and inform routine */
  tick_period = period;
  tick_period = period;
  tick_inf = inf;
  tick_inf = inf;
 
 
  /* Set counter period, enable timer and interrupt */
  /* Set counter period, enable timer and interrupt */
  mtspr(SPR_TTMR, SPR_TTMR_IE | SPR_TTMR_RT | (period & SPR_TTMR_PERIOD));
  mtspr(SPR_TTMR, SPR_TTMR_IE | SPR_TTMR_RT | (period & SPR_TTMR_TP));
 
 
  return 0;
  return 0;
}
}
 
 

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