OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [sysc/] [include/] [MemCache.h] - Diff between revs 63 and 462

Only display areas with differences | Details | Blame | View Log

Rev 63 Rev 462
// ----------------------------------------------------------------------------
// ----------------------------------------------------------------------------
 
 
// Debug Unit memory cache: definition
// Debug Unit memory cache: definition
 
 
// Copyright (C) 2008  Embecosm Limited <info@embecosm.com>
// Copyright (C) 2008  Embecosm Limited <info@embecosm.com>
 
 
// Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
// Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
 
 
// This file is part of the GDB interface to the cycle accurate model of the
// This file is part of the GDB interface to the cycle accurate model of the
// OpenRISC 1000 based system-on-chip, ORPSoC, built using Verilator.
// OpenRISC 1000 based system-on-chip, ORPSoC, built using Verilator.
 
 
// This program is free software: you can redistribute it and/or modify it
// This program is free software: you can redistribute it and/or modify it
// under the terms of the GNU Lesser General Public License as published by
// under the terms of the GNU Lesser General Public License as published by
// the Free Software Foundation, either version 3 of the License, or (at your
// the Free Software Foundation, either version 3 of the License, or (at your
// option) any later version.
// option) any later version.
 
 
// This program is distributed in the hope that it will be useful, but WITHOUT
// This program is distributed in the hope that it will be useful, but WITHOUT
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public
// License for more details.
// License for more details.
 
 
// You should have received a copy of the GNU Lesser General Public License
// You should have received a copy of the GNU Lesser General Public License
// along with this program.  If not, see <http://www.gnu.org/licenses/>.
// along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 
// ----------------------------------------------------------------------------
// ----------------------------------------------------------------------------
 
 
// $Id: MemCache.h 326 2009-03-07 16:47:31Z jeremy $
// $Id: MemCache.h 326 2009-03-07 16:47:31Z jeremy $
 
 
#ifndef MEM_CACHE__H
#ifndef MEM_CACHE__H
#define MEM_CACHE__H
#define MEM_CACHE__H
 
 
#include <stdint.h>
#include <stdint.h>
 
 
 
 
//! Module for cacheing memory accesses by the debug unit
//! Module for cacheing memory accesses by the debug unit
 
 
//! Memory reads and writes through the Debug Unit via JTAG are time
//! Memory reads and writes through the Debug Unit via JTAG are time
//! consuming - of the order of 1000 CPU clock cycles. However when the
//! consuming - of the order of 1000 CPU clock cycles. However when the
//! processor is stalled the values cannot change, other than through the
//! processor is stalled the values cannot change, other than through the
//! debug unit, so it makes sense to cache values.
//! debug unit, so it makes sense to cache values.
 
 
//! Cacheing the entire memory is too much (it does need to be cleared when
//! Cacheing the entire memory is too much (it does need to be cleared when
//! the processor is unstalled. This class provides a cacheing function using
//! the processor is unstalled. This class provides a cacheing function using
//! a closed hash table.
//! a closed hash table.
 
 
//! In the event of a clash on write, the old value is replaced by the new
//! In the event of a clash on write, the old value is replaced by the new
//! value.
//! value.
 
 
class MemCache
class MemCache {
{
 
public:
public:
 
 
  // Constructor and destructor
        // Constructor and destructor
  MemCache (int  _tableSize = 1009);
        MemCache(int _tableSize = 1009);
  ~MemCache ();
        ~MemCache();
 
 
  // Functions
        // Functions
  void  clear ();
  void  clear ();
  void  write (uint32_t  addr,
        void write(uint32_t addr, uint32_t value);
               uint32_t  value);
        bool read(uint32_t addr, uint32_t & value);
  bool  read (uint32_t  addr,
 
              uint32_t &value);
 
 
 
private:
private:
 
 
  //! The size of the hash table. A prime number is a good choice.
        //! The size of the hash table. A prime number is a good choice.
  int  tableSize;
        int tableSize;
 
 
  // The hash table, keyed by address. Done as three parallel vectors,
        // The hash table, keyed by address. Done as three parallel vectors,
  // allowing unambiguous clearing by use of memset for efficiency.
        // allowing unambiguous clearing by use of memset for efficiency.
  bool     *tabIsValid;
        bool *tabIsValid;
  uint32_t *tabKeyAddr;
        uint32_t *tabKeyAddr;
  uint32_t *tabValue;
        uint32_t *tabValue;
 
 
 
 
};      // MemCache ()
};      // MemCache ()
 
 
#endif  // MEM_CACHE__H
#endif // MEM_CACHE__H
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.