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// ----------------------------------------------------------------------------
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// Access functions for the ORPSoC Verilator model: definition
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// Access functions for the ORPSoC Verilator model: definition
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// Copyright (C) 2008 Embecosm Limited <info@embecosm.com>
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// Copyright (C) 2008 Embecosm Limited <info@embecosm.com>
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// Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
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// Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
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// This file is part of the cycle accurate model of the OpenRISC 1000 based
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// This file is part of the cycle accurate model of the OpenRISC 1000 based
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// system-on-chip, ORPSoC, built using Verilator.
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// system-on-chip, ORPSoC, built using Verilator.
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// This program is free software: you can redistribute it and/or modify it
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// This program is free software: you can redistribute it and/or modify it
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// under the terms of the GNU Lesser General Public License as published by
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// under the terms of the GNU Lesser General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or (at your
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// the Free Software Foundation, either version 3 of the License, or (at your
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// option) any later version.
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// option) any later version.
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// This program is distributed in the hope that it will be useful, but WITHOUT
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// This program is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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// License for more details.
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// License for more details.
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// You should have received a copy of the GNU Lesser General Public License
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// You should have received a copy of the GNU Lesser General Public License
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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// ----------------------------------------------------------------------------
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// ----------------------------------------------------------------------------
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// $Id: OrpsocAccess.h 303 2009-02-16 11:20:17Z jeremy $
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// $Id: OrpsocAccess.h 303 2009-02-16 11:20:17Z jeremy $
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#ifndef ORPSOC_ACCESS__H
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#ifndef ORPSOC_ACCESS__H
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#define ORPSOC_ACCESS__H
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#define ORPSOC_ACCESS__H
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#include <stdint.h>
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#include <stdint.h>
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#define wishbone_ram orpsoc_top->v->ram_wb0->ram_wb_b3_0
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class Vorpsoc_top;
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class Vorpsoc_top;
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class Vorpsoc_top_orpsoc_top;
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class Vorpsoc_top_orpsoc_top;
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class Vorpsoc_top_or1200_ctrl;
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class Vorpsoc_top_or1200_ctrl;
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class Vorpsoc_top_or1200_except;
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class Vorpsoc_top_or1200_except;
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class Vorpsoc_top_or1200_sprs;
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class Vorpsoc_top_or1200_sprs;
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class Vorpsoc_top_or1200_dpram;
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class Vorpsoc_top_or1200_dpram;
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// Main memory access class - will change if main memory size or other
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// Main memory access class - will change if main memory size or other
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// parameters change
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// parameters change
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//Old ram_wbclass: class Vorpsoc_top_ram_wb_sc_sw__D20_A19_M800000;
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//Old ram_wbclass: class Vorpsoc_top_ram_wb_sc_sw__D20_A19_M800000;
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//class Vorpsoc_top_wb_ram_b3__D20_A17_M800000;
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//class Vorpsoc_top_wb_ram_b3__D20_A17_M800000;
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class Vorpsoc_top_ram_wb_b3__pi3;
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class Vorpsoc_top_ram_wb_b3__pi3;
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// SoC Arbiter class - will also change if any modifications to bus architecture
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// SoC Arbiter class - will also change if any modifications to bus architecture
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//class Vorpsoc_top_wb_conbus_top__pi1;
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//class Vorpsoc_top_wb_conbus_top__pi1;
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//! Access functions to the Verilator model
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//! Access functions to the Verilator model
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//! This class encapsulates access to the Verilator model, allowing other
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//! This class encapsulates access to the Verilator model, allowing other
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//! Classes to access model state, without needing to be built within the
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//! Classes to access model state, without needing to be built within the
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//! Verilator environment.
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//! Verilator environment.
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class OrpsocAccess {
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class OrpsocAccess {
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public:
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public:
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// Constructor
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// Constructor
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OrpsocAccess(Vorpsoc_top * orpsoc_top);
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OrpsocAccess(Vorpsoc_top * orpsoc_top);
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// Accessor functions
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// Accessor functions
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bool getExFreeze();
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bool getExFreeze();
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bool getWbFreeze();
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bool getWbFreeze();
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uint32_t getWbInsn();
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uint32_t getWbInsn();
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uint32_t getIdInsn();
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uint32_t getIdInsn();
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uint32_t getExInsn();
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uint32_t getExInsn();
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uint32_t getWbPC();
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uint32_t getWbPC();
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uint32_t getIdPC();
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uint32_t getIdPC();
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uint32_t getExPC();
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uint32_t getExPC();
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bool getExceptFlushpipe();
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bool getExceptFlushpipe();
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bool getExDslot();
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bool getExDslot();
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uint32_t getExceptType();
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uint32_t getExceptType();
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// Get a specific GPR from the register file
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// Get a specific GPR from the register file
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uint32_t getGpr(uint32_t regNum);
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uint32_t getGpr(uint32_t regNum);
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void setGpr(uint32_t regNum, uint32_t value);
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void setGpr(uint32_t regNum, uint32_t value);
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//SPR accessessors
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//SPR accessessors
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uint32_t getSprSr();
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uint32_t getSprSr();
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uint32_t getSprEpcr();
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uint32_t getSprEpcr();
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uint32_t getSprEear();
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uint32_t getSprEear();
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uint32_t getSprEsr();
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uint32_t getSprEsr();
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// Wishbone SRAM accessor functions
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// Wishbone SRAM accessor functions
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uint32_t get_mem32(uint32_t addr);
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uint32_t get_mem32(uint32_t addr);
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uint8_t get_mem8(uint32_t addr);
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uint8_t get_mem8(uint32_t addr);
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void set_mem32(uint32_t addr, uint32_t data);
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void set_mem32(uint32_t addr, uint32_t data);
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// Trigger a $readmemh for the RAM array
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// Trigger a $readmemh for the RAM array
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void do_ram_readmemh(void);
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void do_ram_readmemh(void);
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/*
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/*
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// Arbiter access functions
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// Arbiter access functions
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uint8_t getWbArbGrant ();
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uint8_t getWbArbGrant ();
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// Master Signal Access functions
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// Master Signal Access functions
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uint32_t getWbArbMastDatI (uint32_t mast_num);
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uint32_t getWbArbMastDatI (uint32_t mast_num);
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uint32_t getWbArbMastDatO (uint32_t mast_num);
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uint32_t getWbArbMastDatO (uint32_t mast_num);
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uint32_t getWbArbMastAdrI (uint32_t mast_num);
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uint32_t getWbArbMastAdrI (uint32_t mast_num);
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uint8_t getWbArbMastSelI (uint32_t mast_num);
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uint8_t getWbArbMastSelI (uint32_t mast_num);
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uint8_t getWbArbMastSlaveSelDecoded (uint32_t mast_num);
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uint8_t getWbArbMastSlaveSelDecoded (uint32_t mast_num);
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bool getWbArbMastWeI (uint32_t mast_num);
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bool getWbArbMastWeI (uint32_t mast_num);
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bool getWbArbMastCycI (uint32_t mast_num);
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bool getWbArbMastCycI (uint32_t mast_num);
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bool getWbArbMastStbI (uint32_t mast_num);
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bool getWbArbMastStbI (uint32_t mast_num);
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bool getWbArbMastAckO (uint32_t mast_num);
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bool getWbArbMastAckO (uint32_t mast_num);
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bool getWbArbMastErrO (uint32_t mast_num);
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bool getWbArbMastErrO (uint32_t mast_num);
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*/
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*/
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private:
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private:
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// Pointers to modules with accessor functions
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// Pointers to modules with accessor functions
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Vorpsoc_top_or1200_ctrl * or1200_ctrl;
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Vorpsoc_top_or1200_ctrl * or1200_ctrl;
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Vorpsoc_top_or1200_except *or1200_except;
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Vorpsoc_top_or1200_except *or1200_except;
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Vorpsoc_top_or1200_sprs *or1200_sprs;
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Vorpsoc_top_or1200_sprs *or1200_sprs;
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Vorpsoc_top_or1200_dpram *rf_a;
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Vorpsoc_top_or1200_dpram *rf_a;
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/*Vorpsoc_top_ram_wb_sc_sw *//*Vorpsoc_top_ram_wb_sc_sw__D20_A19_M800000 *//*Vorpsoc_top_wb_ram_b3__D20_A17_M800000 *ram_wb_sc_sw; */
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Vorpsoc_top *orpsoc_top;
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Vorpsoc_top_ram_wb_b3__pi3 *wishbone_ram;
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// Arbiter
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//Vorpsoc_top_wb_conbus_top__pi1 *wb_arbiter;
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}; // OrpsocAccess ()
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}; // OrpsocAccess ()
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#endif // ORPSOC_ACCESS__H
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#endif // ORPSOC_ACCESS__H
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