/* Driver functions for cfi_ctrl module which is to control
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/* Driver functions for cfi_ctrl module which is to control
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CFI flash devices.
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CFI flash devices.
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*/
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*/
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#include "board.h"
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#include "board.h"
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#include "cpu-utils.h"
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#include "cpu-utils.h"
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#include "cfi_ctrl.h"
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#include "cfi_ctrl.h"
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#ifndef CFI_CTRL_BASE
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#define CFI_CTRL_BASE -1
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#endif
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void cfi_ctrl_reset_flash(void)
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void cfi_ctrl_reset_flash(void)
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{
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{
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//REG32((CFI_CTRL_BASE + CFI_CTRL_SCR_OFFSET)) = CFI_CTRL_SCR_RESET_DEVICE;
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//REG32((CFI_CTRL_BASE + CFI_CTRL_SCR_OFFSET)) = CFI_CTRL_SCR_RESET_DEVICE;
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// Put in array read mode, like reset would
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// Put in array read mode, like reset would
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REG16(CFI_CTRL_BASE) = 0x00ff;
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REG16(CFI_CTRL_BASE) = 0x00ff;
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}
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}
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int cfi_ctrl_busy(void)
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int cfi_ctrl_busy(void)
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{
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{
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// return REG32((CFI_CTRL_BASE + CFI_CTRL_SCR_OFFSET)) &
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// return REG32((CFI_CTRL_BASE + CFI_CTRL_SCR_OFFSET)) &
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//CFI_CTRL_SCR_CONTROLLER_BUSY;
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//CFI_CTRL_SCR_CONTROLLER_BUSY;
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return 0;
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return 0;
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}
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}
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void cfi_ctrl_clear_status(void)
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void cfi_ctrl_clear_status(void)
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{
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{
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//REG32((CFI_CTRL_BASE + CFI_CTRL_SCR_OFFSET)) = CFI_CTRL_SCR_CLEAR_FSR;
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//REG32((CFI_CTRL_BASE + CFI_CTRL_SCR_OFFSET)) = CFI_CTRL_SCR_CLEAR_FSR;
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REG16(CFI_CTRL_BASE) = 0x0050;
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REG16(CFI_CTRL_BASE) = 0x0050;
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}
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}
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unsigned char cfi_ctrl_get_status(void)
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unsigned char cfi_ctrl_get_status(void)
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{
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{
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//return (unsigned char) (REG32((CFI_CTRL_BASE + CFI_CTRL_FSR_OFFSET)) & 0xff);
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//return (unsigned char) (REG32((CFI_CTRL_BASE + CFI_CTRL_FSR_OFFSET)) & 0xff);
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REG16(CFI_CTRL_BASE) = 0x0070;
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REG16(CFI_CTRL_BASE) = 0x0070;
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return (unsigned char) REG16(CFI_CTRL_BASE);
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return (unsigned char) REG16(CFI_CTRL_BASE);
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}
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}
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void cfi_ctrl_unlock_block(unsigned int addr)
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void cfi_ctrl_unlock_block(unsigned int addr)
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{
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{
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//REG32((CFI_CTRL_BASE + CFI_CTRL_UNLOCKBLOCK_OFFSET + addr)) = 0;
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//REG32((CFI_CTRL_BASE + CFI_CTRL_UNLOCKBLOCK_OFFSET + addr)) = 0;
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REG16(CFI_CTRL_BASE + addr) = 0x0060;
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REG16(CFI_CTRL_BASE + addr) = 0x0060;
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REG16(CFI_CTRL_BASE + addr) = 0x00d0;
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REG16(CFI_CTRL_BASE + addr) = 0x00d0;
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}
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}
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int cfi_ctrl_erase_block(unsigned int addr)
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int cfi_ctrl_erase_block(unsigned int addr)
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{
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{
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cfi_ctrl_clear_status();
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cfi_ctrl_clear_status();
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/* Unlock block first */
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/* Unlock block first */
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cfi_ctrl_unlock_block(addr);
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cfi_ctrl_unlock_block(addr);
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//REG32((CFI_CTRL_BASE + CFI_CTRL_ERASEBLOCK_OFFSET + addr)) = 0;
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//REG32((CFI_CTRL_BASE + CFI_CTRL_ERASEBLOCK_OFFSET + addr)) = 0;
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REG16(CFI_CTRL_BASE + addr) = 0x0020;
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REG16(CFI_CTRL_BASE + addr) = 0x0020;
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REG16(CFI_CTRL_BASE + addr) = 0x00d0;
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REG16(CFI_CTRL_BASE + addr) = 0x00d0;
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/* Wait for device to be finished erasing */
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/* Wait for device to be finished erasing */
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while(!(cfi_ctrl_get_status() & CFI_FSR_DWS));
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while(!(cfi_ctrl_get_status() & CFI_FSR_DWS));
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/* Check if programming was successful */
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/* Check if programming was successful */
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return !!(cfi_ctrl_get_status() & CFI_FSR_ES);
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return !!(cfi_ctrl_get_status() & CFI_FSR_ES);
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}
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}
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void cfi_ctrl_erase_block_no_wait(unsigned int addr)
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void cfi_ctrl_erase_block_no_wait(unsigned int addr)
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{
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{
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cfi_ctrl_clear_status();
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cfi_ctrl_clear_status();
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/* Unlock block first */
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/* Unlock block first */
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cfi_ctrl_unlock_block(addr);
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cfi_ctrl_unlock_block(addr);
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/* Now erase the block */
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/* Now erase the block */
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REG16(CFI_CTRL_BASE + addr) = 0x0020;
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REG16(CFI_CTRL_BASE + addr) = 0x0020;
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REG16(CFI_CTRL_BASE + addr) = 0x00d0;
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REG16(CFI_CTRL_BASE + addr) = 0x00d0;
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// REG32((CFI_CTRL_BASE + CFI_CTRL_ERASEBLOCK_OFFSET + addr)) = 0;
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// REG32((CFI_CTRL_BASE + CFI_CTRL_ERASEBLOCK_OFFSET + addr)) = 0;
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return;
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return;
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}
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}
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int cfi_ctrl_write_short(short data, unsigned int addr)
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int cfi_ctrl_write_short(short data, unsigned int addr)
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{
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{
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cfi_ctrl_clear_status();
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cfi_ctrl_clear_status();
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REG16(CFI_CTRL_BASE + addr) = 0x0040;
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REG16(CFI_CTRL_BASE + addr) = 0x0040;
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REG16(CFI_CTRL_BASE + addr) = data;
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REG16(CFI_CTRL_BASE + addr) = data;
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/* Wait for device to write */
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/* Wait for device to write */
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while(!(cfi_ctrl_get_status() & CFI_FSR_DWS));
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while(!(cfi_ctrl_get_status() & CFI_FSR_DWS));
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/* Check if programming was successful */
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/* Check if programming was successful */
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return !!(cfi_ctrl_get_status() & CFI_FSR_PS);
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return !!(cfi_ctrl_get_status() & CFI_FSR_PS);
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}
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}
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void cfi_ctrl_enable_data_read(void)
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void cfi_ctrl_enable_data_read(void)
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{
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{
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REG16(CFI_CTRL_BASE) = 0x00ff;
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REG16(CFI_CTRL_BASE) = 0x00ff;
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}
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}
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short cfi_ctrl_read_identifier(unsigned int addr)
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short cfi_ctrl_read_identifier(unsigned int addr)
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{
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{
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//return REG16(CFI_CTRL_BASE + CFI_CTRL_DEVICEIDENT_OFFSET + (addr<<1));
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//return REG16(CFI_CTRL_BASE + CFI_CTRL_DEVICEIDENT_OFFSET + (addr<<1));
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REG16(CFI_CTRL_BASE) = 0x0090;
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REG16(CFI_CTRL_BASE) = 0x0090;
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return REG16(CFI_CTRL_BASE + (addr<<1));
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return REG16(CFI_CTRL_BASE + (addr<<1));
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}
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}
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short cfi_ctrl_query_info(unsigned int addr)
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short cfi_ctrl_query_info(unsigned int addr)
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{
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{
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REG16(CFI_CTRL_BASE) = 0x0098;
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REG16(CFI_CTRL_BASE) = 0x0098;
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return REG16(CFI_CTRL_BASE + (addr<<1));
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return REG16(CFI_CTRL_BASE + (addr<<1));
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}
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}
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