OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [drivers/] [or1200/] [int.c] - Diff between revs 393 and 486

Go to most recent revision | Only display areas with differences | Details | Blame | View Log

Rev 393 Rev 486
/* This file is part of test microkernel for OpenRISC 1000. */
/*
/* (C) 2001 Simon Srot, srot@opencores.org */
 *
 
 * User interrupt handler software for OR1200
 
 *
 
 */
 
 
#include "or1200-utils.h"
#include "or1200-utils.h"
#include "spr-defs.h"
#include "spr-defs.h"
#include "int.h"
#include "int.h"
 
 
/* Interrupt handlers table */
/* Interrupt handlers table */
struct ihnd int_handlers[MAX_INT_HANDLERS];
struct ihnd int_handlers[MAX_INT_HANDLERS];
 
 
/* Initialize routine */
/* Initialize routine */
int int_init()
int int_init()
{
{
  int i;
  int i;
 
 
  for(i = 0; i < MAX_INT_HANDLERS; i++) {
  for(i = 0; i < MAX_INT_HANDLERS; i++) {
    int_handlers[i].handler = 0;
    int_handlers[i].handler = 0;
    int_handlers[i].arg = 0;
    int_handlers[i].arg = 0;
  }
  }
 
 
  return 0;
  return 0;
}
}
 
 
/* Add interrupt handler */
/* Add interrupt handler */
int int_add(unsigned long vect, void (* handler)(void *), void *arg)
int int_add(unsigned long vect, void (* handler)(void *), void *arg)
{
{
  if(vect >= MAX_INT_HANDLERS)
  if(vect >= MAX_INT_HANDLERS)
    return -1;
    return -1;
 
 
  int_handlers[vect].handler = handler;
  int_handlers[vect].handler = handler;
  int_handlers[vect].arg = arg;
  int_handlers[vect].arg = arg;
 
 
  mtspr(SPR_PICMR, mfspr(SPR_PICMR) | (0x00000001L << vect));
  mtspr(SPR_PICMR, mfspr(SPR_PICMR) | (0x00000001L << vect));
 
 
  return 0;
  return 0;
}
}
 
 
/* Disable interrupt */
/* Disable interrupt */
int int_disable(unsigned long vect)
int int_disable(unsigned long vect)
{
{
  if(vect >= MAX_INT_HANDLERS)
  if(vect >= MAX_INT_HANDLERS)
    return -1;
    return -1;
 
 
  mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(0x00000001L << vect));
  mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(0x00000001L << vect));
 
 
  return 0;
  return 0;
}
}
 
 
/* Enable interrupt */
/* Enable interrupt */
int int_enable(unsigned long vect)
int int_enable(unsigned long vect)
{
{
  if(vect >= MAX_INT_HANDLERS)
  if(vect >= MAX_INT_HANDLERS)
    return -1;
    return -1;
 
 
  mtspr(SPR_PICMR, mfspr(SPR_PICMR) | (0x00000001L << vect));
  mtspr(SPR_PICMR, mfspr(SPR_PICMR) | (0x00000001L << vect));
 
 
  return 0;
  return 0;
}
}
 
 
/* Main interrupt handler */
/* Main interrupt handler */
void int_main()
void int_main()
{
{
  unsigned long picsr = mfspr(SPR_PICSR);
  unsigned long picsr = mfspr(SPR_PICSR);
  unsigned long i = 0;
  unsigned long i = 0;
 
 
  mtspr(SPR_PICSR, 0);
  mtspr(SPR_PICSR, 0);
 
 
  while(i < 32) {
  while(i < 32) {
    if((picsr & (0x01L << i)) && (int_handlers[i].handler != 0)) {
    if((picsr & (0x01L << i)) && (int_handlers[i].handler != 0)) {
      (*int_handlers[i].handler)(int_handlers[i].arg);
      (*int_handlers[i].handler)(int_handlers[i].arg);
      mtspr(SPR_PICSR, mfspr(SPR_PICSR) & ~(0x00000001L << i));
      mtspr(SPR_PICSR, mfspr(SPR_PICSR) & ~(0x00000001L << i));
    }
    }
    i++;
    i++;
  }
  }
}
}
 
 
 
 
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.