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[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [drivers/] [simple-spi/] [simple-spi.c] - Diff between revs 393 and 415

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Rev 393 Rev 415
/*
/*
 * Simple SPI module driver
 * Simple SPI module driver
 *
 *
 * Julius Baxter, julius.baxter@orsoc.se
 * Julius Baxter, julius.baxter@orsoc.se
 *
 *
 */
 */
 
 
#include "board.h"
#include "board.h"
#include "simple-spi.h"
#include "simple-spi.h"
#include "cpu-utils.h"
#include "cpu-utils.h"
 
 
const int spi_base_adr[1] = {SPI0_BASE};
const int spi_base_adr[1] = {SPI0_BASE};
 
 
void
void
spi_core_enable(int core)
spi_core_enable(int core)
{
{
  REG8((spi_base_adr[core] + SIMPLESPI_SPCR)) |= SIMPLESPI_SPCR_SPE;
  REG8((spi_base_adr[core] + SIMPLESPI_SPCR)) |= SIMPLESPI_SPCR_SPE;
}
}
 
 
void
void
spi_core_disable(int core)
spi_core_disable(int core)
{
{
  REG8((spi_base_adr[core] + SIMPLESPI_SPCR)) &= ~SIMPLESPI_SPCR_SPE;
  REG8((spi_base_adr[core] + SIMPLESPI_SPCR)) &= ~SIMPLESPI_SPCR_SPE;
}
}
 
 
void
void
spi_core_interrupt_enable(int core)
spi_core_interrupt_enable(int core)
{
{
  REG8((spi_base_adr[core] + SIMPLESPI_SPCR)) |= SIMPLESPI_SPCR_SPIE;
  REG8((spi_base_adr[core] + SIMPLESPI_SPCR)) |= SIMPLESPI_SPCR_SPIE;
}
}
 
 
void
void
spi_core_interrupt_disable(int core)
spi_core_interrupt_disable(int core)
{
{
  REG8((spi_base_adr[core] + SIMPLESPI_SPCR)) &= ~SIMPLESPI_SPCR_SPIE;
  REG8((spi_base_adr[core] + SIMPLESPI_SPCR)) &= ~SIMPLESPI_SPCR_SPIE;
}
}
 
 
void
void
spi_core_interrupt_flag_clear(int core)
spi_core_interrupt_flag_clear(int core)
{
{
  REG8((spi_base_adr[core] + SIMPLESPI_SPSR)) = SIMPLESPI_SPSR_SPIF;
  REG8((spi_base_adr[core] + SIMPLESPI_SPSR)) = SIMPLESPI_SPSR_SPIF;
}
}
 
 
void
void
spi_core_clock_setup(int core, char polarity, char phase, char rate,
spi_core_clock_setup(int core, char polarity, char phase, char rate,
                          char ext_rate)
                          char ext_rate)
{
{
  char spcr = REG8((spi_base_adr[core] + SIMPLESPI_SPCR));
  char spcr = REG8((spi_base_adr[core] + SIMPLESPI_SPCR));
 
 
  if (polarity)
  if (polarity)
    spcr |= SIMPLESPI_SPCR_CPOL;
    spcr |= SIMPLESPI_SPCR_CPOL;
  else
  else
    spcr &= ~SIMPLESPI_SPCR_CPOL;
    spcr &= ~SIMPLESPI_SPCR_CPOL;
 
 
  if (phase)
  if (phase)
    spcr |= SIMPLESPI_SPCR_CPHA;
    spcr |= SIMPLESPI_SPCR_CPHA;
  else
  else
    spcr &= ~SIMPLESPI_SPCR_CPHA;
    spcr &= ~SIMPLESPI_SPCR_CPHA;
 
 
  spcr = (spcr & ~SIMPLESPI_SPCR_SPR) | (rate & SIMPLESPI_SPCR_SPR);
  spcr = (spcr & ~SIMPLESPI_SPCR_SPR) | (rate & SIMPLESPI_SPCR_SPR);
 
 
  REG8((spi_base_adr[core] + SIMPLESPI_SPCR)) = spcr;
  REG8((spi_base_adr[core] + SIMPLESPI_SPCR)) = spcr;
 
 
  char sper = REG8((spi_base_adr[core] + SIMPLESPI_SPER));
  char sper = REG8((spi_base_adr[core] + SIMPLESPI_SPER));
 
 
  sper = (sper & ~SIMPLESPI_SPER_ESPR) | (ext_rate & SIMPLESPI_SPER_ESPR);
  sper = (sper & ~SIMPLESPI_SPER_ESPR) | (ext_rate & SIMPLESPI_SPER_ESPR);
 
 
  REG8((spi_base_adr[core] + SIMPLESPI_SPER)) = sper;
  REG8((spi_base_adr[core] + SIMPLESPI_SPER)) = sper;
 
 
}
}
 
 
void
void
spi_core_set_int_count(int core, char cnt)
spi_core_set_int_count(int core, char cnt)
{
{
  char sper = REG8((spi_base_adr[core] + SIMPLESPI_SPER));
  char sper = REG8((spi_base_adr[core] + SIMPLESPI_SPER));
 
 
  sper = (sper & ~SIMPLESPI_SPER_ICNT) | cnt;
  sper = (sper & ~SIMPLESPI_SPER_ICNT) | cnt;
 
 
  REG8((spi_base_adr[core] + SIMPLESPI_SPER)) = sper;
  REG8((spi_base_adr[core] + SIMPLESPI_SPER)) = sper;
 
 
}
}
// slave_sel_dec is decoded (so asserted bit in right place)
// No decode on slave select lines, so assert correct bit to select slave
void
void
spi_core_slave_select(int core, char slave_sel_dec)
spi_core_slave_select(int core, char slave_sel_dec)
{
{
  REG8((spi_base_adr[core] + SIMPLESPI_SSPU)) = slave_sel_dec;
  REG8((spi_base_adr[core] + SIMPLESPI_SSPU)) = slave_sel_dec;
}
}
 
 
int
int
spi_core_data_avail(int core)
spi_core_data_avail(int core)
{
{
  return !!!(REG8((spi_base_adr[core]+SIMPLESPI_SPSR))&SIMPLESPI_SPSR_RFEMPTY);
  return !!!(REG8((spi_base_adr[core]+SIMPLESPI_SPSR))&SIMPLESPI_SPSR_RFEMPTY);
}
}
 
 
int
int
spi_core_write_avail(int core)
spi_core_write_avail(int core)
{
{
  return !!!(REG8((spi_base_adr[core]+SIMPLESPI_SPSR))&SIMPLESPI_SPSR_WFFULL);
  return !!!(REG8((spi_base_adr[core]+SIMPLESPI_SPSR))&SIMPLESPI_SPSR_WFFULL);
}
}
 
 
// Should call spi_core_write_avail() before calling this, we don't check
// Should call spi_core_write_avail() before calling this, we don't check
void
void
spi_core_write_data(int core, char data)
spi_core_write_data(int core, char data)
{
{
  REG8((spi_base_adr[core] + SIMPLESPI_SPDR)) = data;
  REG8((spi_base_adr[core] + SIMPLESPI_SPDR)) = data;
}
}
 
 
char
char
spi_core_read_data(int core)
spi_core_read_data(int core)
{
{
  return REG8((spi_base_adr[core] + SIMPLESPI_SPDR));
  return REG8((spi_base_adr[core] + SIMPLESPI_SPDR));
}
}
 
 

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