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>Chapter 18. Device Driver Interface to the Kernel</TD
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>Chapter 18. Device Driver Interface to the Kernel</TD
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NAME="DEVAPI-SYNCHRONIZATION">Synchronization</H1
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NAME="DEVAPI-SYNCHRONIZATION">Synchronization</H1
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><P
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><P
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>There are three levels of synchronization supported:</P
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>There are three levels of synchronization supported:</P
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TYPE="1"
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TYPE="1"
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><LI
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><P
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><P
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> Synchronization with ISRs. This normally means disabling
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> Synchronization with ISRs. This normally means disabling
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interrupts to prevent the ISR running during a critical
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interrupts to prevent the ISR running during a critical
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section. In an SMP environment, this will also require the use of
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section. In an SMP environment, this will also require the use of
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a spinlock to synchronize with ISRs, DSRs or threads running on
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a spinlock to synchronize with ISRs, DSRs or threads running on
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other CPUs. This is implemented by the
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other CPUs. This is implemented by the
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<TT
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<TT
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CLASS="FUNCTION"
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CLASS="FUNCTION"
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>cyg_drv_isr_lock()</TT
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>cyg_drv_isr_lock()</TT
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> and
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> and
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<TT
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<TT
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CLASS="FUNCTION"
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CLASS="FUNCTION"
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>cyg_drv_isr_unlock()</TT
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>cyg_drv_isr_unlock()</TT
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> functions. This
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> functions. This
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mechanism should be used sparingly and for short periods only.
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mechanism should be used sparingly and for short periods only.
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For finer grained synchronization, individual spinlocks are also
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For finer grained synchronization, individual spinlocks are also
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supplied.
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supplied.
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</P
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</P
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></LI
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><LI
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><P
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><P
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> Synchronization with DSRs. This will be implemented in the kernel
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> Synchronization with DSRs. This will be implemented in the kernel
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by taking the scheduler lock to prevent DSRs running during
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by taking the scheduler lock to prevent DSRs running during
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critical sections. In non-kernel configurations it will be
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critical sections. In non-kernel configurations it will be
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implemented by non-kernel code. This is implemented by the
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implemented by non-kernel code. This is implemented by the
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<TT
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<TT
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CLASS="FUNCTION"
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CLASS="FUNCTION"
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>cyg_drv_dsr_lock()</TT
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>cyg_drv_dsr_lock()</TT
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> and
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> and
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<TT
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<TT
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CLASS="FUNCTION"
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CLASS="FUNCTION"
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>cyg_drv_dsr_unlock()</TT
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>cyg_drv_dsr_unlock()</TT
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> functions. As with ISR
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> functions. As with ISR
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synchronization, this mechanism should be used sparingly. Only
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synchronization, this mechanism should be used sparingly. Only
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DSRs and threads may use this synchronization mechanism, ISRs are
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DSRs and threads may use this synchronization mechanism, ISRs are
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not allowed to do this.
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not allowed to do this.
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</P
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</P
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></LI
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></LI
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><LI
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><LI
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><P
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><P
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> Synchronization with threads. This is implemented with mutexes
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> Synchronization with threads. This is implemented with mutexes
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and condition variables. Only threads may lock the mutexes and
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and condition variables. Only threads may lock the mutexes and
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wait on the condition variables, although DSRs may signal
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wait on the condition variables, although DSRs may signal
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condition variables.
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condition variables.
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</P
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</P
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><P
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><P
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>Any data that is accessed from more than one level must be protected
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>Any data that is accessed from more than one level must be protected
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against concurrent access. Data that is accessed by ISRs must be
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against concurrent access. Data that is accessed by ISRs must be
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protected with the ISR lock, or a spinlock at all times,
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protected with the ISR lock, or a spinlock at all times,
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<SPAN
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<SPAN
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CLASS="emphasis"
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><I
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><I
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CLASS="EMPHASIS"
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CLASS="EMPHASIS"
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>even in ISRs</I
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>even in ISRs</I
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></SPAN
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></SPAN
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>. Data that is shared between DSRs
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>. Data that is shared between DSRs
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and threads should be protected with the DSR lock. Data that is only
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and threads should be protected with the DSR lock. Data that is only
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accessed by threads must be protected with mutexes.</P
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accessed by threads must be protected with mutexes.</P
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