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><H1
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><A
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><A
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NAME="HAL-EXCEPTION-HANDLING">Chapter 10. Exception Handling</H1
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NAME="HAL-EXCEPTION-HANDLING">Chapter 10. Exception Handling</H1
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><DIV
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><DIV
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CLASS="TOC"
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CLASS="TOC"
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><DL
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><DL
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><DT
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><DT
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><B
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><B
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>Table of Contents</B
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>Table of Contents</B
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></DT
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></DT
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><DT
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><DT
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><A
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><A
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HREF="hal-exception-handling.html#HAL-STARTUP"
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HREF="hal-exception-handling.html#HAL-STARTUP"
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>HAL Startup</A
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>HAL Startup</A
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></DT
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></DT
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><DT
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><DT
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><A
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><A
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HREF="hal-vectors-and-vsrs.html"
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HREF="hal-vectors-and-vsrs.html"
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>Vectors and VSRs</A
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>Vectors and VSRs</A
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></DT
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></DT
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><DT
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><DT
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><A
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><A
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HREF="hal-default-synchronous-exception-handling.html"
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HREF="hal-default-synchronous-exception-handling.html"
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>Default Synchronous Exception Handling</A
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>Default Synchronous Exception Handling</A
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></DT
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></DT
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><DT
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><DT
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><A
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><A
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HREF="hal-default-interrupt-handling.html"
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HREF="hal-default-interrupt-handling.html"
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>Default Interrupt Handling</A
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>Default Interrupt Handling</A
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></DT
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></DT
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></DL
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></DL
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></DIV
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></DIV
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><P
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><P
|
>Most of the HAL consists of simple macros or functions that are
|
>Most of the HAL consists of simple macros or functions that are
|
called via the interfaces described in the previous section. These
|
called via the interfaces described in the previous section. These
|
just perform whatever operation is required by accessing the hardware
|
just perform whatever operation is required by accessing the hardware
|
and then return. The exception to this is the handling of exceptions:
|
and then return. The exception to this is the handling of exceptions:
|
either synchronous hardware traps or asynchronous device
|
either synchronous hardware traps or asynchronous device
|
interrupts. Here control is passed first to the HAL, which then passed
|
interrupts. Here control is passed first to the HAL, which then passed
|
it on to eCos or the application. After eCos has finished with it,
|
it on to eCos or the application. After eCos has finished with it,
|
control is then passed back to the HAL for it to tidy up the CPU state
|
control is then passed back to the HAL for it to tidy up the CPU state
|
and resume processing from the point at which the exception occurred.</P
|
and resume processing from the point at which the exception occurred.</P
|
><P
|
><P
|
>The HAL exceptions handling code is usually found in the file
|
>The HAL exceptions handling code is usually found in the file
|
<TT
|
<TT
|
CLASS="FILENAME"
|
CLASS="FILENAME"
|
>vectors.S</TT
|
>vectors.S</TT
|
> in the architecture HAL. Since the
|
> in the architecture HAL. Since the
|
reset entry point is usually implemented as one of these it also deals
|
reset entry point is usually implemented as one of these it also deals
|
with system startup.</P
|
with system startup.</P
|
><P
|
><P
|
>The exact implementation of this code is under the control of the HAL
|
>The exact implementation of this code is under the control of the HAL
|
implementer. So long as it interacts correctly with the interfaces
|
implementer. So long as it interacts correctly with the interfaces
|
defined previously it may take any form. However, all current
|
defined previously it may take any form. However, all current
|
implementation follow the same pattern, and there should be a very
|
implementation follow the same pattern, and there should be a very
|
good reason to break with this. The rest of this section describes
|
good reason to break with this. The rest of this section describes
|
these operate.</P
|
these operate.</P
|
><P
|
><P
|
>Exception handling normally deals with the following broad areas of
|
>Exception handling normally deals with the following broad areas of
|
functionality:</P
|
functionality:</P
|
><P
|
><P
|
></P
|
></P
|
><UL
|
><UL
|
><LI
|
><LI
|
><P
|
><P
|
>Startup and initialization.</P
|
>Startup and initialization.</P
|
></LI
|
></LI
|
><LI
|
><LI
|
><P
|
><P
|
>Hardware exception delivery.</P
|
>Hardware exception delivery.</P
|
></LI
|
></LI
|
><LI
|
><LI
|
><P
|
><P
|
>Default handling of synchronous exceptions.</P
|
>Default handling of synchronous exceptions.</P
|
></LI
|
></LI
|
><LI
|
><LI
|
><P
|
><P
|
>Default handling of asynchronous interrupts.</P
|
>Default handling of asynchronous interrupts.</P
|
></LI
|
></LI
|
></UL
|
></UL
|
><DIV
|
><DIV
|
CLASS="SECTION"
|
CLASS="SECTION"
|
><H1
|
><H1
|
CLASS="SECTION"
|
CLASS="SECTION"
|
><A
|
><A
|
NAME="HAL-STARTUP">HAL Startup</H1
|
NAME="HAL-STARTUP">HAL Startup</H1
|
><P
|
><P
|
>Execution normally begins at the reset vector with
|
>Execution normally begins at the reset vector with
|
the machine in a minimal startup state. From here the HAL needs to get
|
the machine in a minimal startup state. From here the HAL needs to get
|
the machine running, set up the execution environment for the
|
the machine running, set up the execution environment for the
|
application, and finally invoke its entry point.</P
|
application, and finally invoke its entry point.</P
|
><P
|
><P
|
>The following is a list of the jobs that need to be done in
|
>The following is a list of the jobs that need to be done in
|
approximately the order in which they should be accomplished. Many
|
approximately the order in which they should be accomplished. Many
|
of these will not be needed in some configurations.</P
|
of these will not be needed in some configurations.</P
|
><P
|
><P
|
></P
|
></P
|
><UL
|
><UL
|
><LI
|
><LI
|
><P
|
><P
|
> Initialize the hardware. This may involve initializing several
|
> Initialize the hardware. This may involve initializing several
|
subsystems in both the architecture, variant and platform
|
subsystems in both the architecture, variant and platform
|
HALs. These include:
|
HALs. These include:
|
</P
|
</P
|
><P
|
><P
|
></P
|
></P
|
><UL
|
><UL
|
><LI
|
><LI
|
><P
|
><P
|
> Initialize various CPU status registers. Most importantly, the CPU
|
> Initialize various CPU status registers. Most importantly, the CPU
|
interrupt mask should be set to disable interrupts.
|
interrupt mask should be set to disable interrupts.
|
</P
|
</P
|
></LI
|
></LI
|
><LI
|
><LI
|
><P
|
><P
|
> Initialize the MMU, if it is used. On many platforms it is
|
> Initialize the MMU, if it is used. On many platforms it is
|
only possible to control the cacheability of address ranges
|
only possible to control the cacheability of address ranges
|
via the MMU. Also, it may be necessary to remap RAM and device
|
via the MMU. Also, it may be necessary to remap RAM and device
|
registers to locations other than their defaults. However, for
|
registers to locations other than their defaults. However, for
|
simplicity, the mapping should be kept as close to one-to-one
|
simplicity, the mapping should be kept as close to one-to-one
|
physical-to-virtual as possible.
|
physical-to-virtual as possible.
|
</P
|
</P
|
></LI
|
></LI
|
><LI
|
><LI
|
><P
|
><P
|
> Set up the memory controller to access RAM, ROM and I/O devices
|
> Set up the memory controller to access RAM, ROM and I/O devices
|
correctly. Until this is done it may not be possible to access
|
correctly. Until this is done it may not be possible to access
|
RAM. If this is a ROMRAM startup then the program code can
|
RAM. If this is a ROMRAM startup then the program code can
|
now be copied to its RAM address and control transferred to it.
|
now be copied to its RAM address and control transferred to it.
|
</P
|
</P
|
></LI
|
></LI
|
><LI
|
><LI
|
><P
|
><P
|
> Set up any bus bridges and support chips. Often access to
|
> Set up any bus bridges and support chips. Often access to
|
device registers needs to go through various bus bridges and
|
device registers needs to go through various bus bridges and
|
other intermediary devices. In many systems these are combined
|
other intermediary devices. In many systems these are combined
|
with the memory controller, so it makes sense to set these up
|
with the memory controller, so it makes sense to set these up
|
together. This is particularly important if early diagnostic
|
together. This is particularly important if early diagnostic
|
output needs to go through one of these devices.
|
output needs to go through one of these devices.
|
</P
|
</P
|
></LI
|
></LI
|
><LI
|
><LI
|
><P
|
><P
|
> Set up diagnostic mechanisms. If the platform includes an LED or
|
> Set up diagnostic mechanisms. If the platform includes an LED or
|
LCD output device, it often makes sense to output progress
|
LCD output device, it often makes sense to output progress
|
indications on this during startup. This helps with diagnosing
|
indications on this during startup. This helps with diagnosing
|
hardware and software errors.
|
hardware and software errors.
|
</P
|
</P
|
></LI
|
></LI
|
><LI
|
><LI
|
><P
|
><P
|
> Initialize floating point and other extensions such as SIMD
|
> Initialize floating point and other extensions such as SIMD
|
and multimedia engines. It is usually necessary to enable
|
and multimedia engines. It is usually necessary to enable
|
these and maybe initialize control and exception registers for
|
these and maybe initialize control and exception registers for
|
these extensions.
|
these extensions.
|
</P
|
</P
|
></LI
|
></LI
|
><LI
|
><LI
|
><P
|
><P
|
> Initialize interrupt controller. At the very least, it should
|
> Initialize interrupt controller. At the very least, it should
|
be configured to mask all interrupts. It may also be necessary
|
be configured to mask all interrupts. It may also be necessary
|
to set up the mapping from the interrupt controller's vector
|
to set up the mapping from the interrupt controller's vector
|
number space to the CPU's exception number space. Similar
|
number space to the CPU's exception number space. Similar
|
mappings may need to be set up between primary and secondary
|
mappings may need to be set up between primary and secondary
|
interrupt controllers.
|
interrupt controllers.
|
</P
|
</P
|
></LI
|
></LI
|
><LI
|
><LI
|
><P
|
><P
|
> Disable and initialize the caches. The caches should not
|
> Disable and initialize the caches. The caches should not
|
normally be enabled at this point, but it may be necessary to
|
normally be enabled at this point, but it may be necessary to
|
clear or initialize them so that they can be enabled
|
clear or initialize them so that they can be enabled
|
later. Some architectures require that the caches be
|
later. Some architectures require that the caches be
|
explicitly reinitialized after a power-on reset.
|
explicitly reinitialized after a power-on reset.
|
</P
|
</P
|
></LI
|
></LI
|
><LI
|
><LI
|
><P
|
><P
|
> Initialize the timer, clock etc. While the timer used for RTC
|
> Initialize the timer, clock etc. While the timer used for RTC
|
interrupts will be initialized later, it may be necessary to
|
interrupts will be initialized later, it may be necessary to
|
set up the clocks that drive it here.
|
set up the clocks that drive it here.
|
</P
|
</P
|
></LI
|
></LI
|
></UL
|
></UL
|
><P
|
><P
|
> The exact order in which these initializations is done is
|
> The exact order in which these initializations is done is
|
architecture or variant specific. It is also often not necessary
|
architecture or variant specific. It is also often not necessary
|
to do anything at all for some of these options. These fragments
|
to do anything at all for some of these options. These fragments
|
of code should concentrate on getting the target up and running so
|
of code should concentrate on getting the target up and running so
|
that C function calls can be made and code can be run. More
|
that C function calls can be made and code can be run. More
|
complex initializations that cannot be done in assembly code may
|
complex initializations that cannot be done in assembly code may
|
be postponed until calls to
|
be postponed until calls to
|
<TT
|
<TT
|
CLASS="FUNCTION"
|
CLASS="FUNCTION"
|
>hal_variant_init()</TT
|
>hal_variant_init()</TT
|
> or
|
> or
|
<TT
|
<TT
|
CLASS="FUNCTION"
|
CLASS="FUNCTION"
|
>hal_platform_init()</TT
|
>hal_platform_init()</TT
|
> are made.
|
> are made.
|
</P
|
</P
|
><P
|
><P
|
> Not all of these initializations need to be done for all startup
|
> Not all of these initializations need to be done for all startup
|
types. In particular, RAM startups can reasonably assume that the
|
types. In particular, RAM startups can reasonably assume that the
|
ROM monitor or loader has already done most of this work.
|
ROM monitor or loader has already done most of this work.
|
</P
|
</P
|
></LI
|
></LI
|
><LI
|
><LI
|
><P
|
><P
|
> Set up the stack pointer, this allows subsequent initialization
|
> Set up the stack pointer, this allows subsequent initialization
|
code to make proper procedure calls. Usually the interrupt stack
|
code to make proper procedure calls. Usually the interrupt stack
|
is used for this purpose since it is available, large enough, and
|
is used for this purpose since it is available, large enough, and
|
will be reused for other purposes later.
|
will be reused for other purposes later.
|
</P
|
</P
|
></LI
|
></LI
|
><LI
|
><LI
|
><P
|
><P
|
> Initialize any global pointer register needed for access to
|
> Initialize any global pointer register needed for access to
|
globally defined variables. This allows subsequent initialization
|
globally defined variables. This allows subsequent initialization
|
code to access global variables.
|
code to access global variables.
|
</P
|
</P
|
></LI
|
></LI
|
><LI
|
><LI
|
><P
|
><P
|
> If the system is starting from ROM, copy the ROM template of the
|
> If the system is starting from ROM, copy the ROM template of the
|
<TT
|
<TT
|
CLASS="FILENAME"
|
CLASS="FILENAME"
|
>.data</TT
|
>.data</TT
|
> section out to its correct position in
|
> section out to its correct position in
|
RAM. (<A
|
RAM. (<A
|
HREF="hal-linker-scripts.html"
|
HREF="hal-linker-scripts.html"
|
>the Section called <I
|
>the Section called <I
|
>Linker Scripts</I
|
>Linker Scripts</I
|
> in Chapter 9</A
|
> in Chapter 9</A
|
>).
|
>).
|
</P
|
</P
|
></LI
|
></LI
|
><LI
|
><LI
|
><P
|
><P
|
> Zero the <TT
|
> Zero the <TT
|
CLASS="FILENAME"
|
CLASS="FILENAME"
|
>.bss</TT
|
>.bss</TT
|
> section.
|
> section.
|
</P
|
</P
|
></LI
|
></LI
|
><LI
|
><LI
|
><P
|
><P
|
> Create a suitable C call stack frame. This may involve making
|
> Create a suitable C call stack frame. This may involve making
|
stack space for call frames, and arguments, and initializing the
|
stack space for call frames, and arguments, and initializing the
|
back pointers to halt a GDB backtrace operation.
|
back pointers to halt a GDB backtrace operation.
|
</P
|
</P
|
></LI
|
></LI
|
><LI
|
><LI
|
><P
|
><P
|
> Call <TT
|
> Call <TT
|
CLASS="FUNCTION"
|
CLASS="FUNCTION"
|
>hal_variant_init()</TT
|
>hal_variant_init()</TT
|
> and
|
> and
|
<TT
|
<TT
|
CLASS="FUNCTION"
|
CLASS="FUNCTION"
|
>hal_platform_init()</TT
|
>hal_platform_init()</TT
|
>. These will perform any
|
>. These will perform any
|
additional initialization needed by the variant and platform. This
|
additional initialization needed by the variant and platform. This
|
typically includes further initialization of the interrupt
|
typically includes further initialization of the interrupt
|
controller, PCI bus bridges, basic IO devices and enabling the
|
controller, PCI bus bridges, basic IO devices and enabling the
|
caches.
|
caches.
|
</P
|
</P
|
></LI
|
></LI
|
><LI
|
><LI
|
><P
|
><P
|
> Call <TT
|
> Call <TT
|
CLASS="FUNCTION"
|
CLASS="FUNCTION"
|
>cyg_hal_invoke_constructors()</TT
|
>cyg_hal_invoke_constructors()</TT
|
> to run any
|
> to run any
|
static constructors.
|
static constructors.
|
</P
|
</P
|
></LI
|
></LI
|
><LI
|
><LI
|
><P
|
><P
|
> Call <TT
|
> Call <TT
|
CLASS="FUNCTION"
|
CLASS="FUNCTION"
|
>cyg_start()</TT
|
>cyg_start()</TT
|
>. If
|
>. If
|
<TT
|
<TT
|
CLASS="FUNCTION"
|
CLASS="FUNCTION"
|
>cyg_start()</TT
|
>cyg_start()</TT
|
> returns, drop into an infinite
|
> returns, drop into an infinite
|
loop.
|
loop.
|
</P
|
</P
|
></LI
|
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