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>Chapter 9. HAL Interfaces</TD
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><H1
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><H1
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CLASS="SECTION"
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CLASS="SECTION"
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><A
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><A
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NAME="HAL-INPUT-AND-OUTPUT">HAL I/O</H1
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NAME="HAL-INPUT-AND-OUTPUT">HAL I/O</H1
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><P
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><P
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>This section contains definitions for supporting access
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>This section contains definitions for supporting access
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to device control registers in an architecture neutral
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to device control registers in an architecture neutral
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fashion.</P
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fashion.</P
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><P
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><P
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>These definitions are normally found in the header file
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>These definitions are normally found in the header file
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<TT
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<TT
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CLASS="FILENAME"
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CLASS="FILENAME"
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>cyg/hal/hal_io.h</TT
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>cyg/hal/hal_io.h</TT
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>. This file itself contains
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>. This file itself contains
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macros that are generic to the architecture. If there are variant or
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macros that are generic to the architecture. If there are variant or
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platform specific IO access macros then these will be found in
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platform specific IO access macros then these will be found in
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<TT
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<TT
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CLASS="FILENAME"
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CLASS="FILENAME"
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>cyg/hal/var_io.h</TT
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>cyg/hal/var_io.h</TT
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> and
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> and
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<TT
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<TT
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CLASS="FILENAME"
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CLASS="FILENAME"
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>cyg/hal/plf_io.h</TT
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>cyg/hal/plf_io.h</TT
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> in the variant or platform HALs
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> in the variant or platform HALs
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respectively. These files are include automatically by this header, so
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respectively. These files are include automatically by this header, so
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need not be included explicitly.</P
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need not be included explicitly.</P
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><P
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><P
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>This header (or more likely <TT
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>This header (or more likely <TT
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CLASS="FILENAME"
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CLASS="FILENAME"
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>cyg/hal/plf_io.h</TT
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>cyg/hal/plf_io.h</TT
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>) also
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>) also
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defines the PCI access macros. For more information on these see <A
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defines the PCI access macros. For more information on these see <A
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HREF="pci-library-reference.html"
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HREF="pci-library-reference.html"
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>the Section called <I
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>the Section called <I
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>PCI Library reference</I
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>PCI Library reference</I
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> in Chapter 30</A
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> in Chapter 30</A
|
>.</P
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>.</P
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><DIV
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><DIV
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CLASS="SECTION"
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CLASS="SECTION"
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><H2
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><H2
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CLASS="SECTION"
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CLASS="SECTION"
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><A
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><A
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NAME="AEN8057">Register address</H2
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NAME="AEN8057">Register address</H2
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><TABLE
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><TABLE
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BORDER="5"
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BORDER="5"
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BGCOLOR="#E0E0F0"
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BGCOLOR="#E0E0F0"
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WIDTH="70%"
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WIDTH="70%"
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><TR
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><TR
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><TD
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><TD
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><PRE
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><PRE
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CLASS="PROGRAMLISTING"
|
CLASS="PROGRAMLISTING"
|
>HAL_IO_REGISTER</PRE
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>HAL_IO_REGISTER</PRE
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></TD
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></TD
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></TR
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></TR
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></TABLE
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></TABLE
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><P
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><P
|
>This type is used to store the address of an I/O register. It will
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>This type is used to store the address of an I/O register. It will
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normally be a memory address, an integer port address or an offset
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normally be a memory address, an integer port address or an offset
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into an I/O space. More complex architectures may need to code an
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into an I/O space. More complex architectures may need to code an
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address space plus offset pair into a single word, or may represent it
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address space plus offset pair into a single word, or may represent it
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as a structure.</P
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as a structure.</P
|
><P
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><P
|
>Values of variables and constants of this type will usually be
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>Values of variables and constants of this type will usually be
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supplied by configuration mechanisms or in target specific headers.</P
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supplied by configuration mechanisms or in target specific headers.</P
|
></DIV
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></DIV
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><DIV
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><DIV
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CLASS="SECTION"
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CLASS="SECTION"
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><H2
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><H2
|
CLASS="SECTION"
|
CLASS="SECTION"
|
><A
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><A
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NAME="AEN8062">Register read</H2
|
NAME="AEN8062">Register read</H2
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><TABLE
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><TABLE
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BORDER="5"
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BORDER="5"
|
BGCOLOR="#E0E0F0"
|
BGCOLOR="#E0E0F0"
|
WIDTH="70%"
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WIDTH="70%"
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><TR
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><TR
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><TD
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><TD
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><PRE
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><PRE
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CLASS="PROGRAMLISTING"
|
CLASS="PROGRAMLISTING"
|
>HAL_READ_XXX( register, value )
|
>HAL_READ_XXX( register, value )
|
HAL_READ_XXX_VECTOR( register, buffer, count, stride )</PRE
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HAL_READ_XXX_VECTOR( register, buffer, count, stride )</PRE
|
></TD
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></TD
|
></TR
|
></TR
|
></TABLE
|
></TABLE
|
><P
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><P
|
>These macros support the reading of I/O registers in various
|
>These macros support the reading of I/O registers in various
|
sizes. The <TT
|
sizes. The <TT
|
CLASS="REPLACEABLE"
|
CLASS="REPLACEABLE"
|
><I
|
><I
|
>XXX</I
|
>XXX</I
|
></TT
|
></TT
|
> component of the name may be
|
> component of the name may be
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<TT
|
<TT
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CLASS="LITERAL"
|
CLASS="LITERAL"
|
>UINT8</TT
|
>UINT8</TT
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>, <TT
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>, <TT
|
CLASS="LITERAL"
|
CLASS="LITERAL"
|
>UINT16</TT
|
>UINT16</TT
|
>,
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>,
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<TT
|
<TT
|
CLASS="LITERAL"
|
CLASS="LITERAL"
|
>UINT32</TT
|
>UINT32</TT
|
>.</P
|
>.</P
|
><P
|
><P
|
><TT
|
><TT
|
CLASS="FUNCTION"
|
CLASS="FUNCTION"
|
>HAL_READ_XXX()</TT
|
>HAL_READ_XXX()</TT
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> reads the appropriately sized
|
> reads the appropriately sized
|
value from the register and stores it in the variable passed as the
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value from the register and stores it in the variable passed as the
|
second argument.</P
|
second argument.</P
|
><P
|
><P
|
><TT
|
><TT
|
CLASS="FUNCTION"
|
CLASS="FUNCTION"
|
>HAL_READ_XXX_VECTOR()</TT
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>HAL_READ_XXX_VECTOR()</TT
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> reads
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> reads
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<TT
|
<TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
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><I
|
>count</I
|
>count</I
|
></TT
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></TT
|
> values of the appropriate size into
|
> values of the appropriate size into
|
<TT
|
<TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>buffer</I
|
>buffer</I
|
></TT
|
></TT
|
>. The <TT
|
>. The <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>stride</I
|
>stride</I
|
></TT
|
></TT
|
>
|
>
|
controls how the pointer advances through the register space. A stride
|
controls how the pointer advances through the register space. A stride
|
of zero will read the same register repeatedly, and a stride of one
|
of zero will read the same register repeatedly, and a stride of one
|
will read adjacent registers of the given size. Greater strides will
|
will read adjacent registers of the given size. Greater strides will
|
step by larger amounts, to allow for sparsely mapped registers for
|
step by larger amounts, to allow for sparsely mapped registers for
|
example.</P
|
example.</P
|
></DIV
|
></DIV
|
><DIV
|
><DIV
|
CLASS="SECTION"
|
CLASS="SECTION"
|
><H2
|
><H2
|
CLASS="SECTION"
|
CLASS="SECTION"
|
><A
|
><A
|
NAME="AEN8077">Register write</H2
|
NAME="AEN8077">Register write</H2
|
><TABLE
|
><TABLE
|
BORDER="5"
|
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|
BGCOLOR="#E0E0F0"
|
BGCOLOR="#E0E0F0"
|
WIDTH="70%"
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WIDTH="70%"
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><TR
|
><TR
|
><TD
|
><TD
|
><PRE
|
><PRE
|
CLASS="PROGRAMLISTING"
|
CLASS="PROGRAMLISTING"
|
>HAL_WRITE_XXX( register, value )
|
>HAL_WRITE_XXX( register, value )
|
HAL_WRITE_XXX_VECTOR( register, buffer,count, stride )</PRE
|
HAL_WRITE_XXX_VECTOR( register, buffer,count, stride )</PRE
|
></TD
|
></TD
|
></TR
|
></TR
|
></TABLE
|
></TABLE
|
><P
|
><P
|
>These macros support the writing of I/O registers in various
|
>These macros support the writing of I/O registers in various
|
sizes. The <TT
|
sizes. The <TT
|
CLASS="REPLACEABLE"
|
CLASS="REPLACEABLE"
|
><I
|
><I
|
>XXX</I
|
>XXX</I
|
></TT
|
></TT
|
> component of the name may be
|
> component of the name may be
|
<TT
|
<TT
|
CLASS="LITERAL"
|
CLASS="LITERAL"
|
>UINT8</TT
|
>UINT8</TT
|
>, <TT
|
>, <TT
|
CLASS="LITERAL"
|
CLASS="LITERAL"
|
>UINT16</TT
|
>UINT16</TT
|
>,
|
>,
|
<TT
|
<TT
|
CLASS="LITERAL"
|
CLASS="LITERAL"
|
>UINT32</TT
|
>UINT32</TT
|
>.</P
|
>.</P
|
><P
|
><P
|
><TT
|
><TT
|
CLASS="FUNCTION"
|
CLASS="FUNCTION"
|
>HAL_WRITE_XXX()</TT
|
>HAL_WRITE_XXX()</TT
|
> writes
|
> writes
|
the appropriately sized value from the variable passed as the second argument
|
the appropriately sized value from the variable passed as the second argument
|
stored it in the register.</P
|
stored it in the register.</P
|
><P
|
><P
|
><TT
|
><TT
|
CLASS="FUNCTION"
|
CLASS="FUNCTION"
|
>HAL_WRITE_XXX_VECTOR()</TT
|
>HAL_WRITE_XXX_VECTOR()</TT
|
> writes
|
> writes
|
<TT
|
<TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>count</I
|
>count</I
|
></TT
|
></TT
|
> values of the appropriate size from <TT
|
> values of the appropriate size from <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>buffer</I
|
>buffer</I
|
></TT
|
></TT
|
>. The <TT
|
>. The <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>stride</I
|
>stride</I
|
></TT
|
></TT
|
> controls
|
> controls
|
how the pointer advances through the register space. A stride of
|
how the pointer advances through the register space. A stride of
|
zero will write the same register repeatedly, and a stride of one
|
zero will write the same register repeatedly, and a stride of one
|
will write adjacent registers of the given size. Greater strides
|
will write adjacent registers of the given size. Greater strides
|
will step by larger amounts, to allow for sparsely mapped registers
|
will step by larger amounts, to allow for sparsely mapped registers
|
for example.</P
|
for example.</P
|
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|
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