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>Chapter 30. The eCos PCI Library</TD
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>Chapter 30. The eCos PCI Library</TD
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><DIV
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><DIV
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CLASS="SECT1"
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CLASS="SECT1"
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><H1
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><H1
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CLASS="SECT1"
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CLASS="SECT1"
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><A
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><A
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NAME="PCI-LIBRARY-REFERENCE">PCI Library reference</H1
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NAME="PCI-LIBRARY-REFERENCE">PCI Library reference</H1
|
><P
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><P
|
>This document defines the PCI Support Library for eCos.</P
|
>This document defines the PCI Support Library for eCos.</P
|
><P
|
><P
|
>The PCI support library provides a set of routines for accessing
|
>The PCI support library provides a set of routines for accessing
|
the PCI bus configuration space in a portable manner. This is provided
|
the PCI bus configuration space in a portable manner. This is provided
|
by two APIs. The high level API is used by device drivers, or other
|
by two APIs. The high level API is used by device drivers, or other
|
code, to access the PCI configuration space portably. The low level
|
code, to access the PCI configuration space portably. The low level
|
API is used by the PCI library itself to access the hardware in
|
API is used by the PCI library itself to access the hardware in
|
a platform-specific manner, and may also be used by device drivers
|
a platform-specific manner, and may also be used by device drivers
|
to access the PCI configuration space directly.</P
|
to access the PCI configuration space directly.</P
|
><P
|
><P
|
>Underlying the low-level API is HAL support for the basic
|
>Underlying the low-level API is HAL support for the basic
|
configuration space operations. These should not generally be used
|
configuration space operations. These should not generally be used
|
by any code other than the PCI library, and are present in the HAL
|
by any code other than the PCI library, and are present in the HAL
|
to allow low level initialization of the PCI bus and devices to
|
to allow low level initialization of the PCI bus and devices to
|
take place if necessary.</P
|
take place if necessary.</P
|
><DIV
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><DIV
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CLASS="SECT2"
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CLASS="SECT2"
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><H2
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><H2
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CLASS="SECT2"
|
CLASS="SECT2"
|
><A
|
><A
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NAME="AEN12801">PCI Library API</H2
|
NAME="AEN12801">PCI Library API</H2
|
><P
|
><P
|
>The PCI library provides the following routines and types
|
>The PCI library provides the following routines and types
|
for accessing the PCI configuration space.</P
|
for accessing the PCI configuration space.</P
|
><P
|
><P
|
>The API for the PCI library is found in the header file
|
>The API for the PCI library is found in the header file
|
<TT
|
<TT
|
CLASS="FILENAME"
|
CLASS="FILENAME"
|
><cyg/io/pci.h></TT
|
><cyg/io/pci.h></TT
|
>.</P
|
>.</P
|
></DIV
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></DIV
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><DIV
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><DIV
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CLASS="SECT2"
|
CLASS="SECT2"
|
><H2
|
><H2
|
CLASS="SECT2"
|
CLASS="SECT2"
|
><A
|
><A
|
NAME="AEN12806">Definitions</H2
|
NAME="AEN12806">Definitions</H2
|
><P
|
><P
|
>The header file contains definitions for the common configuration
|
>The header file contains definitions for the common configuration
|
structure offsets and specimen values for device, vendor and class
|
structure offsets and specimen values for device, vendor and class
|
code.</P
|
code.</P
|
></DIV
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></DIV
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><DIV
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><DIV
|
CLASS="SECT2"
|
CLASS="SECT2"
|
><H2
|
><H2
|
CLASS="SECT2"
|
CLASS="SECT2"
|
><A
|
><A
|
NAME="AEN12809">Types and data structures</H2
|
NAME="AEN12809">Types and data structures</H2
|
><P
|
><P
|
>The following types are defined:</P
|
>The following types are defined:</P
|
><TABLE
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><TABLE
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BORDER="5"
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BORDER="5"
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BGCOLOR="#E0E0F0"
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BGCOLOR="#E0E0F0"
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WIDTH="70%"
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WIDTH="70%"
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><TR
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><TR
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><TD
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><TD
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><PRE
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><PRE
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CLASS="PROGRAMLISTING"
|
CLASS="PROGRAMLISTING"
|
>typedef CYG_WORD32 cyg_pci_device_id;</PRE
|
>typedef CYG_WORD32 cyg_pci_device_id;</PRE
|
></TD
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></TD
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></TR
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></TR
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></TABLE
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></TABLE
|
><P
|
><P
|
>This is comprised of the bus number, device number and functional
|
>This is comprised of the bus number, device number and functional
|
unit numbers packed into a single word. The macro <TT
|
unit numbers packed into a single word. The macro <TT
|
CLASS="FUNCTION"
|
CLASS="FUNCTION"
|
>CYG_PCI_DEV_MAKE_ID()</TT
|
>CYG_PCI_DEV_MAKE_ID()</TT
|
>, in conjunction with the <TT
|
>, in conjunction with the <TT
|
CLASS="FUNCTION"
|
CLASS="FUNCTION"
|
>CYG_PCI_DEV_MAKE_DEVFN()</TT
|
>CYG_PCI_DEV_MAKE_DEVFN()</TT
|
>
|
>
|
macro, may be used to construct a device id from the bus, device and functional
|
macro, may be used to construct a device id from the bus, device and functional
|
unit numbers. Similarly the macros <TT
|
unit numbers. Similarly the macros <TT
|
CLASS="FUNCTION"
|
CLASS="FUNCTION"
|
>CYG_PCI_DEV_GET_BUS()</TT
|
>CYG_PCI_DEV_GET_BUS()</TT
|
>,
|
>,
|
<TT
|
<TT
|
CLASS="FUNCTION"
|
CLASS="FUNCTION"
|
>CYG_PCI_DEV_GET_DEVFN()</TT
|
>CYG_PCI_DEV_GET_DEVFN()</TT
|
>,
|
>,
|
<TT
|
<TT
|
CLASS="FUNCTION"
|
CLASS="FUNCTION"
|
>CYG_PCI_DEV_GET_DEV()</TT
|
>CYG_PCI_DEV_GET_DEV()</TT
|
>, and
|
>, and
|
<TT
|
<TT
|
CLASS="FUNCTION"
|
CLASS="FUNCTION"
|
>CYG_PCI_DEV_GET_FN()</TT
|
>CYG_PCI_DEV_GET_FN()</TT
|
> may be used to extract the
|
> may be used to extract the
|
constituent parts of a device id. It should not be necessary to use these
|
constituent parts of a device id. It should not be necessary to use these
|
macros under normal circumstances. The following code fragment demonstrates
|
macros under normal circumstances. The following code fragment demonstrates
|
how these macros may be used:</P
|
how these macros may be used:</P
|
><TABLE
|
><TABLE
|
BORDER="5"
|
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|
BGCOLOR="#E0E0F0"
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BGCOLOR="#E0E0F0"
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WIDTH="70%"
|
WIDTH="70%"
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><TR
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><TR
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><TD
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><TD
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><PRE
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><PRE
|
CLASS="PROGRAMLISTING"
|
CLASS="PROGRAMLISTING"
|
> // Create a packed representation of device 1, function 0
|
> // Create a packed representation of device 1, function 0
|
cyg_uint8 devfn = CYG_PCI_DEV_MAKE_DEVFN(1,0);
|
cyg_uint8 devfn = CYG_PCI_DEV_MAKE_DEVFN(1,0);
|
|
|
// Create a packed devid for that device on bus 2
|
// Create a packed devid for that device on bus 2
|
cyg_pci_device_id devid = CYG_PCI_DEV_MAKE_ID(2, devfn);
|
cyg_pci_device_id devid = CYG_PCI_DEV_MAKE_ID(2, devfn);
|
|
|
diag_printf("bus %d, dev %d, func %d\n",
|
diag_printf("bus %d, dev %d, func %d\n",
|
CYG_PCI_DEV_GET_BUS(devid),
|
CYG_PCI_DEV_GET_BUS(devid),
|
CYG_PCI_DEV_GET_DEV(CYG_PCI_DEV_GET_DEVFN(devid)),
|
CYG_PCI_DEV_GET_DEV(CYG_PCI_DEV_GET_DEVFN(devid)),
|
CYG_PCI_DEV_GET_FN(CYG_PCI_DEV_GET_DEVFN(devid));</PRE
|
CYG_PCI_DEV_GET_FN(CYG_PCI_DEV_GET_DEVFN(devid));</PRE
|
></TD
|
></TD
|
></TR
|
></TR
|
></TABLE
|
></TABLE
|
><TABLE
|
><TABLE
|
BORDER="5"
|
BORDER="5"
|
BGCOLOR="#E0E0F0"
|
BGCOLOR="#E0E0F0"
|
WIDTH="70%"
|
WIDTH="70%"
|
><TR
|
><TR
|
><TD
|
><TD
|
><PRE
|
><PRE
|
CLASS="PROGRAMLISTING"
|
CLASS="PROGRAMLISTING"
|
>typedef struct cyg_pci_device;</PRE
|
>typedef struct cyg_pci_device;</PRE
|
></TD
|
></TD
|
></TR
|
></TR
|
></TABLE
|
></TABLE
|
><P
|
><P
|
>This structure is used to contain data read from a PCI device's
|
>This structure is used to contain data read from a PCI device's
|
configuration header by <TT
|
configuration header by <TT
|
CLASS="FUNCTION"
|
CLASS="FUNCTION"
|
>cyg_pci_get_device_info()</TT
|
>cyg_pci_get_device_info()</TT
|
>.
|
>.
|
It is also used to record the resource allocations made to the device.</P
|
It is also used to record the resource allocations made to the device.</P
|
><TABLE
|
><TABLE
|
BORDER="5"
|
BORDER="5"
|
BGCOLOR="#E0E0F0"
|
BGCOLOR="#E0E0F0"
|
WIDTH="70%"
|
WIDTH="70%"
|
><TR
|
><TR
|
><TD
|
><TD
|
><PRE
|
><PRE
|
CLASS="PROGRAMLISTING"
|
CLASS="PROGRAMLISTING"
|
>typedef CYG_WORD64 CYG_PCI_ADDRESS64;
|
>typedef CYG_WORD64 CYG_PCI_ADDRESS64;
|
typedef CYG_WORD32 CYG_PCI_ADDRESS32;</PRE
|
typedef CYG_WORD32 CYG_PCI_ADDRESS32;</PRE
|
></TD
|
></TD
|
></TR
|
></TR
|
></TABLE
|
></TABLE
|
><P
|
><P
|
>Pointers in the PCI address space are 32 bit (IO space) or
|
>Pointers in the PCI address space are 32 bit (IO space) or
|
32/64 bit (memory space). In most platform and device configurations
|
32/64 bit (memory space). In most platform and device configurations
|
all of PCI memory will be linearly addressable using only 32 bit
|
all of PCI memory will be linearly addressable using only 32 bit
|
pointers as read from <TT
|
pointers as read from <TT
|
CLASS="VARNAME"
|
CLASS="VARNAME"
|
>base_map[]</TT
|
>base_map[]</TT
|
>.</P
|
>.</P
|
><P
|
><P
|
>The 64 bit type is used to allow handling 64 bit devices in
|
>The 64 bit type is used to allow handling 64 bit devices in
|
the future, should it be necessary, without changing the library's
|
the future, should it be necessary, without changing the library's
|
API.</P
|
API.</P
|
></DIV
|
></DIV
|
><DIV
|
><DIV
|
CLASS="SECT2"
|
CLASS="SECT2"
|
><H2
|
><H2
|
CLASS="SECT2"
|
CLASS="SECT2"
|
><A
|
><A
|
NAME="AEN12828">Functions</H2
|
NAME="AEN12828">Functions</H2
|
><TABLE
|
><TABLE
|
BORDER="5"
|
BORDER="5"
|
BGCOLOR="#E0E0F0"
|
BGCOLOR="#E0E0F0"
|
WIDTH="70%"
|
WIDTH="70%"
|
><TR
|
><TR
|
><TD
|
><TD
|
><PRE
|
><PRE
|
CLASS="PROGRAMLISTING"
|
CLASS="PROGRAMLISTING"
|
>void cyg_pci_init(void);</PRE
|
>void cyg_pci_init(void);</PRE
|
></TD
|
></TD
|
></TR
|
></TR
|
></TABLE
|
></TABLE
|
><P
|
><P
|
>Initialize the PCI library and establish contact with the
|
>Initialize the PCI library and establish contact with the
|
hardware. This function is idempotent and can be called either by
|
hardware. This function is idempotent and can be called either by
|
all drivers in the system, or just from an application initialization
|
all drivers in the system, or just from an application initialization
|
function.</P
|
function.</P
|
><TABLE
|
><TABLE
|
BORDER="5"
|
BORDER="5"
|
BGCOLOR="#E0E0F0"
|
BGCOLOR="#E0E0F0"
|
WIDTH="70%"
|
WIDTH="70%"
|
><TR
|
><TR
|
><TD
|
><TD
|
><PRE
|
><PRE
|
CLASS="PROGRAMLISTING"
|
CLASS="PROGRAMLISTING"
|
>cyg_bool cyg_pci_find_device( cyg_uint16 vendor,
|
>cyg_bool cyg_pci_find_device( cyg_uint16 vendor,
|
cyg_uint16 device,
|
cyg_uint16 device,
|
cyg_pci_device_id *devid );</PRE
|
cyg_pci_device_id *devid );</PRE
|
></TD
|
></TD
|
></TR
|
></TR
|
></TABLE
|
></TABLE
|
><P
|
><P
|
>Searches the PCI bus configuration space for a device with
|
>Searches the PCI bus configuration space for a device with
|
the given <TT
|
the given <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>vendor</I
|
>vendor</I
|
></TT
|
></TT
|
> and <TT
|
> and <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>device</I
|
>device</I
|
></TT
|
></TT
|
>
|
>
|
ids. The search starts at the device pointed to by <TT
|
ids. The search starts at the device pointed to by <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>devid</I
|
>devid</I
|
></TT
|
></TT
|
>,
|
>,
|
or at the first slot if it contains <TT
|
or at the first slot if it contains <TT
|
CLASS="LITERAL"
|
CLASS="LITERAL"
|
>CYG_PCI_NULL_DEVID</TT
|
>CYG_PCI_NULL_DEVID</TT
|
>.
|
>.
|
<TT
|
<TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>*devid</I
|
>*devid</I
|
></TT
|
></TT
|
> will be updated with the ID of the next device
|
> will be updated with the ID of the next device
|
found. Returns <TT
|
found. Returns <TT
|
CLASS="CONSTANT"
|
CLASS="CONSTANT"
|
>true</TT
|
>true</TT
|
> if one is found and <TT
|
> if one is found and <TT
|
CLASS="CONSTANT"
|
CLASS="CONSTANT"
|
>false</TT
|
>false</TT
|
> if not.</P
|
> if not.</P
|
><TABLE
|
><TABLE
|
BORDER="5"
|
BORDER="5"
|
BGCOLOR="#E0E0F0"
|
BGCOLOR="#E0E0F0"
|
WIDTH="70%"
|
WIDTH="70%"
|
><TR
|
><TR
|
><TD
|
><TD
|
><PRE
|
><PRE
|
CLASS="PROGRAMLISTING"
|
CLASS="PROGRAMLISTING"
|
>cyg_bool cyg_pci_find_class( cyg_uint32 dev_class,
|
>cyg_bool cyg_pci_find_class( cyg_uint32 dev_class,
|
cyg_pci_device_id *devid );</PRE
|
cyg_pci_device_id *devid );</PRE
|
></TD
|
></TD
|
></TR
|
></TR
|
></TABLE
|
></TABLE
|
><P
|
><P
|
>Searches the PCI bus configuration space for a device with
|
>Searches the PCI bus configuration space for a device with
|
the given <TT
|
the given <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>dev_class</I
|
>dev_class</I
|
></TT
|
></TT
|
> class code. The search starts at the
|
> class code. The search starts at the
|
device pointed to by <TT
|
device pointed to by <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>devid</I
|
>devid</I
|
></TT
|
></TT
|
>, or at the first slot if it
|
>, or at the first slot if it
|
contains <TT
|
contains <TT
|
CLASS="LITERAL"
|
CLASS="LITERAL"
|
>CYG_PCI_NULL_DEVID</TT
|
>CYG_PCI_NULL_DEVID</TT
|
>.</P
|
>.</P
|
><P
|
><P
|
><TT
|
><TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>*devid</I
|
>*devid</I
|
></TT
|
></TT
|
> will be updated with the ID of the next
|
> will be updated with the ID of the next
|
device found. Returns <TT
|
device found. Returns <TT
|
CLASS="CONSTANT"
|
CLASS="CONSTANT"
|
>true</TT
|
>true</TT
|
> if one is found and
|
> if one is found and
|
<TT
|
<TT
|
CLASS="CONSTANT"
|
CLASS="CONSTANT"
|
>false</TT
|
>false</TT
|
> if not.</P
|
> if not.</P
|
><TABLE
|
><TABLE
|
BORDER="5"
|
BORDER="5"
|
BGCOLOR="#E0E0F0"
|
BGCOLOR="#E0E0F0"
|
WIDTH="70%"
|
WIDTH="70%"
|
><TR
|
><TR
|
><TD
|
><TD
|
><PRE
|
><PRE
|
CLASS="PROGRAMLISTING"
|
CLASS="PROGRAMLISTING"
|
>cyg_bool cyg_pci_find_next( cyg_pci_device_id cur_devid,
|
>cyg_bool cyg_pci_find_next( cyg_pci_device_id cur_devid,
|
cyg_pci_device_id *next_devid );</PRE
|
cyg_pci_device_id *next_devid );</PRE
|
></TD
|
></TD
|
></TR
|
></TR
|
></TABLE
|
></TABLE
|
><P
|
><P
|
>Searches the PCI configuration space for the next valid device
|
>Searches the PCI configuration space for the next valid device
|
after <TT
|
after <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>cur_devid</I
|
>cur_devid</I
|
></TT
|
></TT
|
>. If <TT
|
>. If <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>cur_devid</I
|
>cur_devid</I
|
></TT
|
></TT
|
>
|
>
|
is given the value <TT
|
is given the value <TT
|
CLASS="LITERAL"
|
CLASS="LITERAL"
|
>CYG_PCI_NULL_DEVID</TT
|
>CYG_PCI_NULL_DEVID</TT
|
>, then the search starts
|
>, then the search starts
|
at the first slot. It is permitted for <TT
|
at the first slot. It is permitted for <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>next_devid</I
|
>next_devid</I
|
></TT
|
></TT
|
> to
|
> to
|
point to <TT
|
point to <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>cur_devid</I
|
>cur_devid</I
|
></TT
|
></TT
|
>. Returns <TT
|
>. Returns <TT
|
CLASS="CONSTANT"
|
CLASS="CONSTANT"
|
>true</TT
|
>true</TT
|
>
|
>
|
if another device is found and <TT
|
if another device is found and <TT
|
CLASS="CONSTANT"
|
CLASS="CONSTANT"
|
>false</TT
|
>false</TT
|
> if not.</P
|
> if not.</P
|
><TABLE
|
><TABLE
|
BORDER="5"
|
BORDER="5"
|
BGCOLOR="#E0E0F0"
|
BGCOLOR="#E0E0F0"
|
WIDTH="70%"
|
WIDTH="70%"
|
><TR
|
><TR
|
><TD
|
><TD
|
><PRE
|
><PRE
|
CLASS="PROGRAMLISTING"
|
CLASS="PROGRAMLISTING"
|
>cyg_bool cyg_pci_find_matching( cyg_pci_match_func *matchp,
|
>cyg_bool cyg_pci_find_matching( cyg_pci_match_func *matchp,
|
void * match_callback_data,
|
void * match_callback_data,
|
cyg_pci_device_id *devid );</PRE
|
cyg_pci_device_id *devid );</PRE
|
></TD
|
></TD
|
></TR
|
></TR
|
></TABLE
|
></TABLE
|
><P
|
><P
|
>Searches the PCI bus configuration space for a device whose properties
|
>Searches the PCI bus configuration space for a device whose properties
|
match those required by the caller supplied <TT
|
match those required by the caller supplied <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>cyg_pci_match_func</I
|
>cyg_pci_match_func</I
|
></TT
|
></TT
|
>.
|
>.
|
The search starts at the device pointed to by <TT
|
The search starts at the device pointed to by <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>devid</I
|
>devid</I
|
></TT
|
></TT
|
>, or
|
>, or
|
at the first slot if it contains <TT
|
at the first slot if it contains <TT
|
CLASS="CONSTANT"
|
CLASS="CONSTANT"
|
>CYG_PCI_NULL_DEVID</TT
|
>CYG_PCI_NULL_DEVID</TT
|
>. The
|
>. The
|
<TT
|
<TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>devid</I
|
>devid</I
|
></TT
|
></TT
|
> will be updated with the ID of the next device found.
|
> will be updated with the ID of the next device found.
|
This function returns <TT
|
This function returns <TT
|
CLASS="CONSTANT"
|
CLASS="CONSTANT"
|
>true</TT
|
>true</TT
|
> if a matching device is found
|
> if a matching device is found
|
and <TT
|
and <TT
|
CLASS="CONSTANT"
|
CLASS="CONSTANT"
|
>false</TT
|
>false</TT
|
> if not.</P
|
> if not.</P
|
><P
|
><P
|
>The match_func has a type declared as:</P
|
>The match_func has a type declared as:</P
|
><TABLE
|
><TABLE
|
BORDER="5"
|
BORDER="5"
|
BGCOLOR="#E0E0F0"
|
BGCOLOR="#E0E0F0"
|
WIDTH="70%"
|
WIDTH="70%"
|
><TR
|
><TR
|
><TD
|
><TD
|
><PRE
|
><PRE
|
CLASS="PROGRAMLISTING"
|
CLASS="PROGRAMLISTING"
|
>typedef cyg_bool (cyg_pci_match_func)( cyg_uint16 vendor,
|
>typedef cyg_bool (cyg_pci_match_func)( cyg_uint16 vendor,
|
cyg_uint16 device,
|
cyg_uint16 device,
|
cyg_uint32 class,
|
cyg_uint32 class,
|
void * user_data);</PRE
|
void * user_data);</PRE
|
></TD
|
></TD
|
></TR
|
></TR
|
></TABLE
|
></TABLE
|
><P
|
><P
|
>The <TT
|
>The <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>vendor</I
|
>vendor</I
|
></TT
|
></TT
|
>, <TT
|
>, <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>device</I
|
>device</I
|
></TT
|
></TT
|
>, and
|
>, and
|
<TT
|
<TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>class</I
|
>class</I
|
></TT
|
></TT
|
> are from the device configuration space. The
|
> are from the device configuration space. The
|
<TT
|
<TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>user_data</I
|
>user_data</I
|
></TT
|
></TT
|
> is the callback data passed to <TT
|
> is the callback data passed to <TT
|
CLASS="FUNCTION"
|
CLASS="FUNCTION"
|
>cyg_pci_find_matching</TT
|
>cyg_pci_find_matching</TT
|
>.</P
|
>.</P
|
><TABLE
|
><TABLE
|
BORDER="5"
|
BORDER="5"
|
BGCOLOR="#E0E0F0"
|
BGCOLOR="#E0E0F0"
|
WIDTH="70%"
|
WIDTH="70%"
|
><TR
|
><TR
|
><TD
|
><TD
|
><PRE
|
><PRE
|
CLASS="PROGRAMLISTING"
|
CLASS="PROGRAMLISTING"
|
>void cyg_pci_get_device_info ( cyg_pci_device_id devid,
|
>void cyg_pci_get_device_info ( cyg_pci_device_id devid,
|
cyg_pci_device *dev_info );</PRE
|
cyg_pci_device *dev_info );</PRE
|
></TD
|
></TD
|
></TR
|
></TR
|
></TABLE
|
></TABLE
|
><P
|
><P
|
>This function gets the PCI configuration information for the
|
>This function gets the PCI configuration information for the
|
device indicated in <TT
|
device indicated in <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>devid</I
|
>devid</I
|
></TT
|
></TT
|
>. The common fields of the
|
>. The common fields of the
|
<SPAN
|
<SPAN
|
CLASS="STRUCTNAME"
|
CLASS="STRUCTNAME"
|
>cyg_pci_device</SPAN
|
>cyg_pci_device</SPAN
|
> structure, and the appropriate fields
|
> structure, and the appropriate fields
|
of the relevant header union member are filled in from the device's
|
of the relevant header union member are filled in from the device's
|
configuration space.
|
configuration space.
|
If the device has not been enabled, then this function will also fetch
|
If the device has not been enabled, then this function will also fetch
|
the size and type information from the base address registers and
|
the size and type information from the base address registers and
|
place it in the <TT
|
place it in the <TT
|
CLASS="VARNAME"
|
CLASS="VARNAME"
|
>base_size[]</TT
|
>base_size[]</TT
|
> array.</P
|
> array.</P
|
><TABLE
|
><TABLE
|
BORDER="5"
|
BORDER="5"
|
BGCOLOR="#E0E0F0"
|
BGCOLOR="#E0E0F0"
|
WIDTH="70%"
|
WIDTH="70%"
|
><TR
|
><TR
|
><TD
|
><TD
|
><PRE
|
><PRE
|
CLASS="PROGRAMLISTING"
|
CLASS="PROGRAMLISTING"
|
>void cyg_pci_set_device_info ( cyg_pci_device_id devid,
|
>void cyg_pci_set_device_info ( cyg_pci_device_id devid,
|
cyg_pci_device *dev_info );</PRE
|
cyg_pci_device *dev_info );</PRE
|
></TD
|
></TD
|
></TR
|
></TR
|
></TABLE
|
></TABLE
|
><P
|
><P
|
>This function sets the PCI configuration information for the
|
>This function sets the PCI configuration information for the
|
device indicated in <TT
|
device indicated in <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>devid</I
|
>devid</I
|
></TT
|
></TT
|
>. Only the configuration space
|
>. Only the configuration space
|
registers that are writable are actually written. Once all the fields have
|
registers that are writable are actually written. Once all the fields have
|
been written, the device info will be read back into <TT
|
been written, the device info will be read back into <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>*dev_info</I
|
>*dev_info</I
|
></TT
|
></TT
|
>, so that it reflects the true state of the hardware.</P
|
>, so that it reflects the true state of the hardware.</P
|
><TABLE
|
><TABLE
|
BORDER="5"
|
BORDER="5"
|
BGCOLOR="#E0E0F0"
|
BGCOLOR="#E0E0F0"
|
WIDTH="70%"
|
WIDTH="70%"
|
><TR
|
><TR
|
><TD
|
><TD
|
><PRE
|
><PRE
|
CLASS="PROGRAMLISTING"
|
CLASS="PROGRAMLISTING"
|
>void cyg_pci_read_config_uint8( cyg_pci_device_id devid,
|
>void cyg_pci_read_config_uint8( cyg_pci_device_id devid,
|
cyg_uint8 offset, cyg_uint8 *val );
|
cyg_uint8 offset, cyg_uint8 *val );
|
void cyg_pci_read_config_uint16( cyg_pci_device_id devid,
|
void cyg_pci_read_config_uint16( cyg_pci_device_id devid,
|
cyg_uint8 offset, cyg_uint16 *val );
|
cyg_uint8 offset, cyg_uint16 *val );
|
void cyg_pci_read_config_uint32( cyg_pci_device_id devid,
|
void cyg_pci_read_config_uint32( cyg_pci_device_id devid,
|
cyg_uint8 offset, cyg_uint32 *val );</PRE
|
cyg_uint8 offset, cyg_uint32 *val );</PRE
|
></TD
|
></TD
|
></TR
|
></TR
|
></TABLE
|
></TABLE
|
><P
|
><P
|
>These functions read registers of the appropriate size from
|
>These functions read registers of the appropriate size from
|
the configuration space of the given device. They should mainly
|
the configuration space of the given device. They should mainly
|
be used to access registers that are device specific. General PCI
|
be used to access registers that are device specific. General PCI
|
registers are best accessed through <TT
|
registers are best accessed through <TT
|
CLASS="FUNCTION"
|
CLASS="FUNCTION"
|
>cyg_pci_get_device_info()</TT
|
>cyg_pci_get_device_info()</TT
|
>.</P
|
>.</P
|
><TABLE
|
><TABLE
|
BORDER="5"
|
BORDER="5"
|
BGCOLOR="#E0E0F0"
|
BGCOLOR="#E0E0F0"
|
WIDTH="70%"
|
WIDTH="70%"
|
><TR
|
><TR
|
><TD
|
><TD
|
><PRE
|
><PRE
|
CLASS="PROGRAMLISTING"
|
CLASS="PROGRAMLISTING"
|
>void cyg_pci_write_config_uint8( cyg_pci_device_id devid,
|
>void cyg_pci_write_config_uint8( cyg_pci_device_id devid,
|
cyg_uint8 offset, cyg_uint8 val );
|
cyg_uint8 offset, cyg_uint8 val );
|
void cyg_pci_write_config_uint16( cyg_pci_device_id devid,
|
void cyg_pci_write_config_uint16( cyg_pci_device_id devid,
|
cyg_uint8 offset, cyg_uint16 val );
|
cyg_uint8 offset, cyg_uint16 val );
|
void cyg_pci_write_config_uint32( cyg_pci_device_id devid,
|
void cyg_pci_write_config_uint32( cyg_pci_device_id devid,
|
cyg_uint8 offset, cyg_uint32 val );</PRE
|
cyg_uint8 offset, cyg_uint32 val );</PRE
|
></TD
|
></TD
|
></TR
|
></TR
|
></TABLE
|
></TABLE
|
><P
|
><P
|
>These functions write registers of the appropriate size to
|
>These functions write registers of the appropriate size to
|
the configuration space of the given device. They should mainly
|
the configuration space of the given device. They should mainly
|
be used to access registers that are device specific. General PCI
|
be used to access registers that are device specific. General PCI
|
registers are best accessed through <TT
|
registers are best accessed through <TT
|
CLASS="FUNCTION"
|
CLASS="FUNCTION"
|
>cyg_pci_get_device_info()</TT
|
>cyg_pci_get_device_info()</TT
|
>. Writing the general registers this way may render the contents of
|
>. Writing the general registers this way may render the contents of
|
a <SPAN
|
a <SPAN
|
CLASS="STRUCTNAME"
|
CLASS="STRUCTNAME"
|
>cyg_pci_device</SPAN
|
>cyg_pci_device</SPAN
|
> structure invalid.</P
|
> structure invalid.</P
|
></DIV
|
></DIV
|
><DIV
|
><DIV
|
CLASS="SECT2"
|
CLASS="SECT2"
|
><H2
|
><H2
|
CLASS="SECT2"
|
CLASS="SECT2"
|
><A
|
><A
|
NAME="AEN12891">Resource allocation</H2
|
NAME="AEN12891">Resource allocation</H2
|
><P
|
><P
|
>These routines allocate memory and I/O space to PCI devices.</P
|
>These routines allocate memory and I/O space to PCI devices.</P
|
><TABLE
|
><TABLE
|
BORDER="5"
|
BORDER="5"
|
BGCOLOR="#E0E0F0"
|
BGCOLOR="#E0E0F0"
|
WIDTH="70%"
|
WIDTH="70%"
|
><TR
|
><TR
|
><TD
|
><TD
|
><PRE
|
><PRE
|
CLASS="PROGRAMLISTING"
|
CLASS="PROGRAMLISTING"
|
>cyg_bool cyg_pci_configure_device( cyg_pci_device *dev_info )</PRE
|
>cyg_bool cyg_pci_configure_device( cyg_pci_device *dev_info )</PRE
|
></TD
|
></TD
|
></TR
|
></TR
|
></TABLE
|
></TABLE
|
><P
|
><P
|
>Allocate memory and IO space to all base address registers
|
>Allocate memory and IO space to all base address registers
|
using the current memory and IO base addresses in the library. The
|
using the current memory and IO base addresses in the library. The
|
allocated base addresses, translated into directly usable values,
|
allocated base addresses, translated into directly usable values,
|
will be put into the matching <TT
|
will be put into the matching <TT
|
CLASS="VARNAME"
|
CLASS="VARNAME"
|
>base_map[]</TT
|
>base_map[]</TT
|
> entries
|
> entries
|
in <TT
|
in <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>*dev_info</I
|
>*dev_info</I
|
></TT
|
></TT
|
>. If <TT
|
>. If <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>*dev_info</I
|
>*dev_info</I
|
></TT
|
></TT
|
> does
|
> does
|
not contain valid <TT
|
not contain valid <TT
|
CLASS="VARNAME"
|
CLASS="VARNAME"
|
>base_size[]</TT
|
>base_size[]</TT
|
> entries, then the result is
|
> entries, then the result is
|
<TT
|
<TT
|
CLASS="CONSTANT"
|
CLASS="CONSTANT"
|
>false</TT
|
>false</TT
|
>. This function will also call <TT
|
>. This function will also call <TT
|
CLASS="FUNCTION"
|
CLASS="FUNCTION"
|
>cyg_pci_translate_interrupt()</TT
|
>cyg_pci_translate_interrupt()</TT
|
> to put the interrupt vector into the
|
> to put the interrupt vector into the
|
HAL vector entry.</P
|
HAL vector entry.</P
|
><TABLE
|
><TABLE
|
BORDER="5"
|
BORDER="5"
|
BGCOLOR="#E0E0F0"
|
BGCOLOR="#E0E0F0"
|
WIDTH="70%"
|
WIDTH="70%"
|
><TR
|
><TR
|
><TD
|
><TD
|
><PRE
|
><PRE
|
CLASS="PROGRAMLISTING"
|
CLASS="PROGRAMLISTING"
|
>cyg_bool cyg_pci_configure_bus( cyg_uint8 bus, cyg_uint8 *next_bus )</PRE
|
>cyg_bool cyg_pci_configure_bus( cyg_uint8 bus, cyg_uint8 *next_bus )</PRE
|
></TD
|
></TD
|
></TR
|
></TR
|
></TABLE
|
></TABLE
|
><P
|
><P
|
>Allocate memory and IO space to all base address registers on all devices
|
>Allocate memory and IO space to all base address registers on all devices
|
on the given bus and all subordinate busses. If a PCI-PCI bridge is found on
|
on the given bus and all subordinate busses. If a PCI-PCI bridge is found on
|
<TT
|
<TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>bus</I
|
>bus</I
|
></TT
|
></TT
|
>, this function will call itself recursively in order
|
>, this function will call itself recursively in order
|
to configure the bus on the other side of the bridge. Because of the nature of
|
to configure the bus on the other side of the bridge. Because of the nature of
|
bridge devices, all devices on the secondary side of a bridge must be allocated
|
bridge devices, all devices on the secondary side of a bridge must be allocated
|
memory and IO space before the memory and IO windows on the bridge device can be
|
memory and IO space before the memory and IO windows on the bridge device can be
|
properly configured. The <TT
|
properly configured. The <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>next_bus</I
|
>next_bus</I
|
></TT
|
></TT
|
> argument points to the
|
> argument points to the
|
bus number to assign to the next subordinate bus found. The number will be
|
bus number to assign to the next subordinate bus found. The number will be
|
incremented as new busses are discovered. If successful, <TT
|
incremented as new busses are discovered. If successful, <TT
|
CLASS="CONSTANT"
|
CLASS="CONSTANT"
|
>true</TT
|
>true</TT
|
>
|
>
|
is returned. Otherwise, <TT
|
is returned. Otherwise, <TT
|
CLASS="CONSTANT"
|
CLASS="CONSTANT"
|
>false</TT
|
>false</TT
|
> is returned.</P
|
> is returned.</P
|
><TABLE
|
><TABLE
|
BORDER="5"
|
BORDER="5"
|
BGCOLOR="#E0E0F0"
|
BGCOLOR="#E0E0F0"
|
WIDTH="70%"
|
WIDTH="70%"
|
><TR
|
><TR
|
><TD
|
><TD
|
><PRE
|
><PRE
|
CLASS="PROGRAMLISTING"
|
CLASS="PROGRAMLISTING"
|
>cyg_bool cyg_pci_translate_interrupt( cyg_pci_device *dev_info,
|
>cyg_bool cyg_pci_translate_interrupt( cyg_pci_device *dev_info,
|
CYG_ADDRWORD *vec );</PRE
|
CYG_ADDRWORD *vec );</PRE
|
></TD
|
></TD
|
></TR
|
></TR
|
></TABLE
|
></TABLE
|
><P
|
><P
|
>Translate the device's PCI interrupt (INTA#-INTD#)
|
>Translate the device's PCI interrupt (INTA#-INTD#)
|
to the associated HAL vector. This may also depend on which slot
|
to the associated HAL vector. This may also depend on which slot
|
the device occupies. If the device may generate interrupts, the
|
the device occupies. If the device may generate interrupts, the
|
translated vector number will be stored in <TT
|
translated vector number will be stored in <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>vec</I
|
>vec</I
|
></TT
|
></TT
|
> and the
|
> and the
|
result is <TT
|
result is <TT
|
CLASS="CONSTANT"
|
CLASS="CONSTANT"
|
>true</TT
|
>true</TT
|
>. Otherwise the result is <TT
|
>. Otherwise the result is <TT
|
CLASS="CONSTANT"
|
CLASS="CONSTANT"
|
>false</TT
|
>false</TT
|
>.</P
|
>.</P
|
><TABLE
|
><TABLE
|
BORDER="5"
|
BORDER="5"
|
BGCOLOR="#E0E0F0"
|
BGCOLOR="#E0E0F0"
|
WIDTH="70%"
|
WIDTH="70%"
|
><TR
|
><TR
|
><TD
|
><TD
|
><PRE
|
><PRE
|
CLASS="PROGRAMLISTING"
|
CLASS="PROGRAMLISTING"
|
>cyg_bool cyg_pci_allocate_memory( cyg_pci_device *dev_info,
|
>cyg_bool cyg_pci_allocate_memory( cyg_pci_device *dev_info,
|
cyg_uint32 bar,
|
cyg_uint32 bar,
|
CYG_PCI_ADDRESS64 *base );
|
CYG_PCI_ADDRESS64 *base );
|
cyg_bool cyg_pci_allocate_io( cyg_pci_device *dev_info,
|
cyg_bool cyg_pci_allocate_io( cyg_pci_device *dev_info,
|
cyg_uint32 bar,
|
cyg_uint32 bar,
|
CYG_PCI_ADDRESS32 *base );</PRE
|
CYG_PCI_ADDRESS32 *base );</PRE
|
></TD
|
></TD
|
></TR
|
></TR
|
></TABLE
|
></TABLE
|
><P
|
><P
|
>These routines allocate memory or I/O space to the base address
|
>These routines allocate memory or I/O space to the base address
|
register indicated by <TT
|
register indicated by <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>bar</I
|
>bar</I
|
></TT
|
></TT
|
>. The base address in
|
>. The base address in
|
<TT
|
<TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>*base</I
|
>*base</I
|
></TT
|
></TT
|
> will be correctly aligned and the address of the
|
> will be correctly aligned and the address of the
|
next free location will be written back into it if the allocation succeeds. If
|
next free location will be written back into it if the allocation succeeds. If
|
the base address register is of the wrong type for this allocation, or
|
the base address register is of the wrong type for this allocation, or
|
<TT
|
<TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>dev_info</I
|
>dev_info</I
|
></TT
|
></TT
|
> does not contain valid <TT
|
> does not contain valid <TT
|
CLASS="VARNAME"
|
CLASS="VARNAME"
|
>base_size[]</TT
|
>base_size[]</TT
|
> entries, the result is <TT
|
> entries, the result is <TT
|
CLASS="CONSTANT"
|
CLASS="CONSTANT"
|
>false</TT
|
>false</TT
|
>. These functions
|
>. These functions
|
allow a device driver to set up its own mappings if it wants. Most devices
|
allow a device driver to set up its own mappings if it wants. Most devices
|
should probably use <TT
|
should probably use <TT
|
CLASS="FUNCTION"
|
CLASS="FUNCTION"
|
>cyg_pci_configure_device()</TT
|
>cyg_pci_configure_device()</TT
|
>.</P
|
>.</P
|
><TABLE
|
><TABLE
|
BORDER="5"
|
BORDER="5"
|
BGCOLOR="#E0E0F0"
|
BGCOLOR="#E0E0F0"
|
WIDTH="70%"
|
WIDTH="70%"
|
><TR
|
><TR
|
><TD
|
><TD
|
><PRE
|
><PRE
|
CLASS="PROGRAMLISTING"
|
CLASS="PROGRAMLISTING"
|
>void cyg_pci_set_memory_base( CYG_PCI_ADDRESS64 base );
|
>void cyg_pci_set_memory_base( CYG_PCI_ADDRESS64 base );
|
void cyg_pci_set_io_base( CYG_PCI_ADDRESS32 base );</PRE
|
void cyg_pci_set_io_base( CYG_PCI_ADDRESS32 base );</PRE
|
></TD
|
></TD
|
></TR
|
></TR
|
></TABLE
|
></TABLE
|
><P
|
><P
|
>These routines set the base addresses for memory and I/O mappings
|
>These routines set the base addresses for memory and I/O mappings
|
to be used by the memory allocation routines. Normally these base
|
to be used by the memory allocation routines. Normally these base
|
addresses will be set to default values based on the platform. These
|
addresses will be set to default values based on the platform. These
|
routines allow these to be changed by application code if necessary.</P
|
routines allow these to be changed by application code if necessary.</P
|
></DIV
|
></DIV
|
><DIV
|
><DIV
|
CLASS="SECT2"
|
CLASS="SECT2"
|
><H2
|
><H2
|
CLASS="SECT2"
|
CLASS="SECT2"
|
><A
|
><A
|
NAME="AEN12923">PCI Library Hardware API</H2
|
NAME="AEN12923">PCI Library Hardware API</H2
|
><P
|
><P
|
>This API is used by the PCI library to access the PCI bus
|
>This API is used by the PCI library to access the PCI bus
|
configuration space. Although it should not normally be necessary,
|
configuration space. Although it should not normally be necessary,
|
this API may also be used by device driver or application code to
|
this API may also be used by device driver or application code to
|
perform PCI bus operations not supported by the PCI library.</P
|
perform PCI bus operations not supported by the PCI library.</P
|
><TABLE
|
><TABLE
|
BORDER="5"
|
BORDER="5"
|
BGCOLOR="#E0E0F0"
|
BGCOLOR="#E0E0F0"
|
WIDTH="70%"
|
WIDTH="70%"
|
><TR
|
><TR
|
><TD
|
><TD
|
><PRE
|
><PRE
|
CLASS="PROGRAMLISTING"
|
CLASS="PROGRAMLISTING"
|
>void cyg_pcihw_init(void);</PRE
|
>void cyg_pcihw_init(void);</PRE
|
></TD
|
></TD
|
></TR
|
></TR
|
></TABLE
|
></TABLE
|
><P
|
><P
|
>Initialize the PCI hardware so that the configuration space
|
>Initialize the PCI hardware so that the configuration space
|
may be accessed.</P
|
may be accessed.</P
|
><TABLE
|
><TABLE
|
BORDER="5"
|
BORDER="5"
|
BGCOLOR="#E0E0F0"
|
BGCOLOR="#E0E0F0"
|
WIDTH="70%"
|
WIDTH="70%"
|
><TR
|
><TR
|
><TD
|
><TD
|
><PRE
|
><PRE
|
CLASS="PROGRAMLISTING"
|
CLASS="PROGRAMLISTING"
|
>void cyg_pcihw_read_config_uint8( cyg_uint8 bus,
|
>void cyg_pcihw_read_config_uint8( cyg_uint8 bus,
|
cyg_uint8 devfn, cyg_uint8 offset, cyg_uint8 *val);
|
cyg_uint8 devfn, cyg_uint8 offset, cyg_uint8 *val);
|
void cyg_pcihw_read_config_uint16( cyg_uint8 bus,
|
void cyg_pcihw_read_config_uint16( cyg_uint8 bus,
|
cyg_uint8 devfn, cyg_uint8 offset, cyg_uint16 *val);
|
cyg_uint8 devfn, cyg_uint8 offset, cyg_uint16 *val);
|
void cyg_pcihw_read_config_uint32( cyg_uint8 bus,
|
void cyg_pcihw_read_config_uint32( cyg_uint8 bus,
|
cyg_uint8 devfn, cyg_uint8 offset, cyg_uint32 *val);</PRE
|
cyg_uint8 devfn, cyg_uint8 offset, cyg_uint32 *val);</PRE
|
></TD
|
></TD
|
></TR
|
></TR
|
></TABLE
|
></TABLE
|
><P
|
><P
|
>These functions read a register of the appropriate size from
|
>These functions read a register of the appropriate size from
|
the PCI configuration space at an address composed from the <TT
|
the PCI configuration space at an address composed from the <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>bus</I
|
>bus</I
|
></TT
|
></TT
|
>, <TT
|
>, <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>devfn</I
|
>devfn</I
|
></TT
|
></TT
|
> and <TT
|
> and <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>offset</I
|
>offset</I
|
></TT
|
></TT
|
>
|
>
|
arguments.</P
|
arguments.</P
|
><TABLE
|
><TABLE
|
BORDER="5"
|
BORDER="5"
|
BGCOLOR="#E0E0F0"
|
BGCOLOR="#E0E0F0"
|
WIDTH="70%"
|
WIDTH="70%"
|
><TR
|
><TR
|
><TD
|
><TD
|
><PRE
|
><PRE
|
CLASS="PROGRAMLISTING"
|
CLASS="PROGRAMLISTING"
|
>void cyg_pcihw_write_config_uint8( cyg_uint8 bus,
|
>void cyg_pcihw_write_config_uint8( cyg_uint8 bus,
|
cyg_uint8 devfn, cyg_uint8 offset, cyg_uint8 val);
|
cyg_uint8 devfn, cyg_uint8 offset, cyg_uint8 val);
|
void cyg_pcihw_write_config_uint16( cyg_uint8 bus,
|
void cyg_pcihw_write_config_uint16( cyg_uint8 bus,
|
cyg_uint8 devfn, cyg_uint8 offset, cyg_uint16 val);
|
cyg_uint8 devfn, cyg_uint8 offset, cyg_uint16 val);
|
void cyg_pcihw_write_config_uint32( cyg_uint8 bus,
|
void cyg_pcihw_write_config_uint32( cyg_uint8 bus,
|
cyg_uint8 devfn, cyg_uint8 offset, cyg_uint32 val);</PRE
|
cyg_uint8 devfn, cyg_uint8 offset, cyg_uint32 val);</PRE
|
></TD
|
></TD
|
></TR
|
></TR
|
></TABLE
|
></TABLE
|
><P
|
><P
|
>These functions write a register of the appropriate size to
|
>These functions write a register of the appropriate size to
|
the PCI configuration space at an address composed from the
|
the PCI configuration space at an address composed from the
|
<TT
|
<TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>bus</I
|
>bus</I
|
></TT
|
></TT
|
>, <TT
|
>, <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>devfn</I
|
>devfn</I
|
></TT
|
></TT
|
> and
|
> and
|
<TT
|
<TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>offset</I
|
>offset</I
|
></TT
|
></TT
|
> arguments.</P
|
> arguments.</P
|
><TABLE
|
><TABLE
|
BORDER="5"
|
BORDER="5"
|
BGCOLOR="#E0E0F0"
|
BGCOLOR="#E0E0F0"
|
WIDTH="70%"
|
WIDTH="70%"
|
><TR
|
><TR
|
><TD
|
><TD
|
><PRE
|
><PRE
|
CLASS="PROGRAMLISTING"
|
CLASS="PROGRAMLISTING"
|
>cyg_bool cyg_pcihw_translate_interrupt( cyg_uint8 bus,
|
>cyg_bool cyg_pcihw_translate_interrupt( cyg_uint8 bus,
|
cyg_uint8 devfn,
|
cyg_uint8 devfn,
|
CYG_ADDRWORD *vec);</PRE
|
CYG_ADDRWORD *vec);</PRE
|
></TD
|
></TD
|
></TR
|
></TR
|
></TABLE
|
></TABLE
|
><P
|
><P
|
>This function interrogates the device and determines which
|
>This function interrogates the device and determines which
|
HAL interrupt vector it is connected to.</P
|
HAL interrupt vector it is connected to.</P
|
></DIV
|
></DIV
|
><DIV
|
><DIV
|
CLASS="SECT2"
|
CLASS="SECT2"
|
><H2
|
><H2
|
CLASS="SECT2"
|
CLASS="SECT2"
|
><A
|
><A
|
NAME="AEN12940">HAL PCI support</H2
|
NAME="AEN12940">HAL PCI support</H2
|
><P
|
><P
|
>HAL support consists of a set of C macros that provide the
|
>HAL support consists of a set of C macros that provide the
|
implementation of the low level PCI API.</P
|
implementation of the low level PCI API.</P
|
><TABLE
|
><TABLE
|
BORDER="5"
|
BORDER="5"
|
BGCOLOR="#E0E0F0"
|
BGCOLOR="#E0E0F0"
|
WIDTH="70%"
|
WIDTH="70%"
|
><TR
|
><TR
|
><TD
|
><TD
|
><PRE
|
><PRE
|
CLASS="PROGRAMLISTING"
|
CLASS="PROGRAMLISTING"
|
>HAL_PCI_INIT()</PRE
|
>HAL_PCI_INIT()</PRE
|
></TD
|
></TD
|
></TR
|
></TR
|
></TABLE
|
></TABLE
|
><P
|
><P
|
>Initialize the PCI bus.</P
|
>Initialize the PCI bus.</P
|
><TABLE
|
><TABLE
|
BORDER="5"
|
BORDER="5"
|
BGCOLOR="#E0E0F0"
|
BGCOLOR="#E0E0F0"
|
WIDTH="70%"
|
WIDTH="70%"
|
><TR
|
><TR
|
><TD
|
><TD
|
><PRE
|
><PRE
|
CLASS="PROGRAMLISTING"
|
CLASS="PROGRAMLISTING"
|
>HAL_PCI_READ_UINT8( bus, devfn, offset, val )
|
>HAL_PCI_READ_UINT8( bus, devfn, offset, val )
|
HAL_PCI_READ_UINT16( bus, devfn, offset, val )
|
HAL_PCI_READ_UINT16( bus, devfn, offset, val )
|
HAL_PCI_READ_UINT32( bus, devfn, offset, val )</PRE
|
HAL_PCI_READ_UINT32( bus, devfn, offset, val )</PRE
|
></TD
|
></TD
|
></TR
|
></TR
|
></TABLE
|
></TABLE
|
><P
|
><P
|
>Read a value from the PCI configuration space of the appropriate
|
>Read a value from the PCI configuration space of the appropriate
|
size at an address composed from the <TT
|
size at an address composed from the <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>bus</I
|
>bus</I
|
></TT
|
></TT
|
>, <TT
|
>, <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>devfn</I
|
>devfn</I
|
></TT
|
></TT
|
> and <TT
|
> and <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>offset</I
|
>offset</I
|
></TT
|
></TT
|
>.</P
|
>.</P
|
><TABLE
|
><TABLE
|
BORDER="5"
|
BORDER="5"
|
BGCOLOR="#E0E0F0"
|
BGCOLOR="#E0E0F0"
|
WIDTH="70%"
|
WIDTH="70%"
|
><TR
|
><TR
|
><TD
|
><TD
|
><PRE
|
><PRE
|
CLASS="PROGRAMLISTING"
|
CLASS="PROGRAMLISTING"
|
>HAL_PCI_WRITE_UINT8( bus, devfn, offset, val )
|
>HAL_PCI_WRITE_UINT8( bus, devfn, offset, val )
|
HAL_PCI_WRITE_UINT16( bus, devfn, offset, val )
|
HAL_PCI_WRITE_UINT16( bus, devfn, offset, val )
|
HAL_PCI_WRITE_UINT32( bus, devfn, offset, val )</PRE
|
HAL_PCI_WRITE_UINT32( bus, devfn, offset, val )</PRE
|
></TD
|
></TD
|
></TR
|
></TR
|
></TABLE
|
></TABLE
|
><P
|
><P
|
>Write a value to the PCI configuration space of the appropriate
|
>Write a value to the PCI configuration space of the appropriate
|
size at an address composed from the <TT
|
size at an address composed from the <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>bus</I
|
>bus</I
|
></TT
|
></TT
|
>, <TT
|
>, <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>devfn</I
|
>devfn</I
|
></TT
|
></TT
|
> and <TT
|
> and <TT
|
CLASS="PARAMETER"
|
CLASS="PARAMETER"
|
><I
|
><I
|
>offset</I
|
>offset</I
|
></TT
|
></TT
|
>.</P
|
>.</P
|
><TABLE
|
><TABLE
|
BORDER="5"
|
BORDER="5"
|
BGCOLOR="#E0E0F0"
|
BGCOLOR="#E0E0F0"
|
WIDTH="70%"
|
WIDTH="70%"
|
><TR
|
><TR
|
><TD
|
><TD
|
><PRE
|
><PRE
|
CLASS="PROGRAMLISTING"
|
CLASS="PROGRAMLISTING"
|
>HAL_PCI_TRANSLATE_INTERRUPT( bus, devfn, *vec, valid )</PRE
|
>HAL_PCI_TRANSLATE_INTERRUPT( bus, devfn, *vec, valid )</PRE
|
></TD
|
></TD
|
></TR
|
></TR
|
></TABLE
|
></TABLE
|
><P
|
><P
|
>Translate the device's interrupt line into a HAL
|
>Translate the device's interrupt line into a HAL
|
interrupt vector.</P
|
interrupt vector.</P
|
><TABLE
|
><TABLE
|
BORDER="5"
|
BORDER="5"
|
BGCOLOR="#E0E0F0"
|
BGCOLOR="#E0E0F0"
|
WIDTH="70%"
|
WIDTH="70%"
|
><TR
|
><TR
|
><TD
|
><TD
|
><PRE
|
><PRE
|
CLASS="PROGRAMLISTING"
|
CLASS="PROGRAMLISTING"
|
>HAL_PCI_ALLOC_BASE_MEMORY
|
>HAL_PCI_ALLOC_BASE_MEMORY
|
HAL_PCI_ALLOC_BASE_IO</PRE
|
HAL_PCI_ALLOC_BASE_IO</PRE
|
></TD
|
></TD
|
></TR
|
></TR
|
></TABLE
|
></TABLE
|
><P
|
><P
|
>These macros define the default base addresses used to initialize
|
>These macros define the default base addresses used to initialize
|
the memory and I/O allocation pointers.</P
|
the memory and I/O allocation pointers.</P
|
><TABLE
|
><TABLE
|
BORDER="5"
|
BORDER="5"
|
BGCOLOR="#E0E0F0"
|
BGCOLOR="#E0E0F0"
|
WIDTH="70%"
|
WIDTH="70%"
|
><TR
|
><TR
|
><TD
|
><TD
|
><PRE
|
><PRE
|
CLASS="PROGRAMLISTING"
|
CLASS="PROGRAMLISTING"
|
>HAL_PCI_PHYSICAL_MEMORY_BASE
|
>HAL_PCI_PHYSICAL_MEMORY_BASE
|
HAL_PCI_PHYSICAL_IO_BASE</PRE
|
HAL_PCI_PHYSICAL_IO_BASE</PRE
|
></TD
|
></TD
|
></TR
|
></TR
|
></TABLE
|
></TABLE
|
><P
|
><P
|
>PCI memory and IO range do not always correspond directly
|
>PCI memory and IO range do not always correspond directly
|
to physical memory or IO addresses. Frequently the PCI address spaces
|
to physical memory or IO addresses. Frequently the PCI address spaces
|
are windowed into the processor's address range at some
|
are windowed into the processor's address range at some
|
offset. These macros define offsets to be added to the PCI base
|
offset. These macros define offsets to be added to the PCI base
|
addresses to translate PCI bus addresses into physical memory addresses
|
addresses to translate PCI bus addresses into physical memory addresses
|
that can be used to access the allocated memory or IO space.</P
|
that can be used to access the allocated memory or IO space.</P
|
><DIV
|
><DIV
|
CLASS="NOTE"
|
CLASS="NOTE"
|
><BLOCKQUOTE
|
><BLOCKQUOTE
|
CLASS="NOTE"
|
CLASS="NOTE"
|
><P
|
><P
|
><B
|
><B
|
>Note: </B
|
>Note: </B
|
>The chunk of PCI memory space directly addressable though
|
>The chunk of PCI memory space directly addressable though
|
the window by the CPU may be smaller than the amount of PCI memory
|
the window by the CPU may be smaller than the amount of PCI memory
|
actually provided. In that case drivers will have to access PCI
|
actually provided. In that case drivers will have to access PCI
|
memory space in segments. Doing this will be platform specific and
|
memory space in segments. Doing this will be platform specific and
|
is currently beyond the scope of the HAL.</P
|
is currently beyond the scope of the HAL.</P
|
></BLOCKQUOTE
|
></BLOCKQUOTE
|
></DIV
|
></DIV
|
><TABLE
|
><TABLE
|
BORDER="5"
|
BORDER="5"
|
BGCOLOR="#E0E0F0"
|
BGCOLOR="#E0E0F0"
|
WIDTH="70%"
|
WIDTH="70%"
|
><TR
|
><TR
|
><TD
|
><TD
|
><PRE
|
><PRE
|
CLASS="PROGRAMLISTING"
|
CLASS="PROGRAMLISTING"
|
>HAL_PCI_IGNORE_DEVICE( bus, dev, fn )</PRE
|
>HAL_PCI_IGNORE_DEVICE( bus, dev, fn )</PRE
|
></TD
|
></TD
|
></TR
|
></TR
|
></TABLE
|
></TABLE
|
><P
|
><P
|
>This macro, if defined, may be used to limit the devices which are
|
>This macro, if defined, may be used to limit the devices which are
|
found by the bus scanning functions. This is sometimes necessary for
|
found by the bus scanning functions. This is sometimes necessary for
|
devices which need special handling. If this macro evaluates to <TT
|
devices which need special handling. If this macro evaluates to <TT
|
CLASS="CONSTANT"
|
CLASS="CONSTANT"
|
>true</TT
|
>true</TT
|
>, the given device will not be found by <TT
|
>, the given device will not be found by <TT
|
CLASS="FUNCTION"
|
CLASS="FUNCTION"
|
>cyg_pci_find_next</TT
|
>cyg_pci_find_next</TT
|
> or other bus scanning functions.</P
|
> or other bus scanning functions.</P
|
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