//===========================================================================
|
//===========================================================================
|
//
|
//
|
// testintr.c
|
// testintr.c
|
//
|
//
|
// uITRON "C" test program for ixxx_yyy interrupt safe operators
|
// uITRON "C" test program for ixxx_yyy interrupt safe operators
|
//
|
//
|
//===========================================================================
|
//===========================================================================
|
//####ECOSGPLCOPYRIGHTBEGIN####
|
//####ECOSGPLCOPYRIGHTBEGIN####
|
// -------------------------------------------
|
// -------------------------------------------
|
// This file is part of eCos, the Embedded Configurable Operating System.
|
// This file is part of eCos, the Embedded Configurable Operating System.
|
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
|
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
|
//
|
//
|
// eCos is free software; you can redistribute it and/or modify it under
|
// eCos is free software; you can redistribute it and/or modify it under
|
// the terms of the GNU General Public License as published by the Free
|
// the terms of the GNU General Public License as published by the Free
|
// Software Foundation; either version 2 or (at your option) any later version.
|
// Software Foundation; either version 2 or (at your option) any later version.
|
//
|
//
|
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
|
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
|
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
// for more details.
|
// for more details.
|
//
|
//
|
// You should have received a copy of the GNU General Public License along
|
// You should have received a copy of the GNU General Public License along
|
// with eCos; if not, write to the Free Software Foundation, Inc.,
|
// with eCos; if not, write to the Free Software Foundation, Inc.,
|
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
|
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
|
//
|
//
|
// As a special exception, if other files instantiate templates or use macros
|
// As a special exception, if other files instantiate templates or use macros
|
// or inline functions from this file, or you compile this file and link it
|
// or inline functions from this file, or you compile this file and link it
|
// with other works to produce a work based on this file, this file does not
|
// with other works to produce a work based on this file, this file does not
|
// by itself cause the resulting work to be covered by the GNU General Public
|
// by itself cause the resulting work to be covered by the GNU General Public
|
// License. However the source code for this file must still be made available
|
// License. However the source code for this file must still be made available
|
// in accordance with section (3) of the GNU General Public License.
|
// in accordance with section (3) of the GNU General Public License.
|
//
|
//
|
// This exception does not invalidate any other reasons why a work based on
|
// This exception does not invalidate any other reasons why a work based on
|
// this file might be covered by the GNU General Public License.
|
// this file might be covered by the GNU General Public License.
|
//
|
//
|
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
|
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
|
// at http://sources.redhat.com/ecos/ecos-license/
|
// at http://sources.redhat.com/ecos/ecos-license/
|
// -------------------------------------------
|
// -------------------------------------------
|
//####ECOSGPLCOPYRIGHTEND####
|
//####ECOSGPLCOPYRIGHTEND####
|
//===========================================================================
|
//===========================================================================
|
//#####DESCRIPTIONBEGIN####
|
//#####DESCRIPTIONBEGIN####
|
//
|
//
|
// Author(s): hmt
|
// Author(s): hmt
|
// Contributors:hmt
|
// Contributors:hmt
|
// Date: 1998-08-20
|
// Date: 1998-08-20
|
// Purpose: uITRON API testing
|
// Purpose: uITRON API testing
|
// Description:
|
// Description:
|
//
|
//
|
//####DESCRIPTIONEND####
|
//####DESCRIPTIONEND####
|
//
|
//
|
//===========================================================================
|
//===========================================================================
|
|
|
#include <pkgconf/system.h>
|
#include <pkgconf/system.h>
|
#include <pkgconf/uitron.h> // uITRON setup CYGNUM_UITRON_SEMAS
|
#include <pkgconf/uitron.h> // uITRON setup CYGNUM_UITRON_SEMAS
|
// CYGPKG_UITRON et al
|
// CYGPKG_UITRON et al
|
#include <cyg/infra/testcase.h> // testing infrastructure
|
#include <cyg/infra/testcase.h> // testing infrastructure
|
|
|
#ifdef CYGPKG_UITRON // we DO want the uITRON package
|
#ifdef CYGPKG_UITRON // we DO want the uITRON package
|
|
|
#ifdef CYGSEM_KERNEL_SCHED_MLQUEUE // we DO want prioritized threads
|
#ifdef CYGSEM_KERNEL_SCHED_MLQUEUE // we DO want prioritized threads
|
|
|
#ifdef CYGFUN_KERNEL_THREADS_TIMER // we DO want timout-able calls
|
#ifdef CYGFUN_KERNEL_THREADS_TIMER // we DO want timout-able calls
|
|
|
#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK // we DO want the realtime clock
|
#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK // we DO want the realtime clock
|
|
|
// we're OK if it's C++ or neither of those two is defined:
|
// we're OK if it's C++ or neither of those two is defined:
|
#if defined( __cplusplus ) || \
|
#if defined( __cplusplus ) || \
|
(!defined( CYGIMP_UITRON_INLINE_FUNCS ) && \
|
(!defined( CYGIMP_UITRON_INLINE_FUNCS ) && \
|
!defined( CYGIMP_UITRON_CPP_OUTLINE_FUNCS) )
|
!defined( CYGIMP_UITRON_CPP_OUTLINE_FUNCS) )
|
|
|
// =================== TEST CONFIGURATION ===================
|
// =================== TEST CONFIGURATION ===================
|
#if \
|
#if \
|
/* test configuration for enough tasks */ \
|
/* test configuration for enough tasks */ \
|
(CYGNUM_UITRON_TASKS >= 4) && \
|
(CYGNUM_UITRON_TASKS >= 4) && \
|
(CYGNUM_UITRON_TASKS < 90) && \
|
(CYGNUM_UITRON_TASKS < 90) && \
|
(CYGNUM_UITRON_START_TASKS == 1) && \
|
(CYGNUM_UITRON_START_TASKS == 1) && \
|
( !defined(CYGPKG_UITRON_TASKS_CREATE_DELETE) || \
|
( !defined(CYGPKG_UITRON_TASKS_CREATE_DELETE) || \
|
CYGNUM_UITRON_TASKS_INITIALLY >= 4 ) && \
|
CYGNUM_UITRON_TASKS_INITIALLY >= 4 ) && \
|
\
|
\
|
/* the end of the large #if statement */ \
|
/* the end of the large #if statement */ \
|
1
|
1
|
|
|
// ============================ END ============================
|
// ============================ END ============================
|
|
|
#include <cyg/hal/hal_arch.h>
|
#include <cyg/hal/hal_arch.h>
|
#include <cyg/hal/hal_intr.h>
|
#include <cyg/hal/hal_intr.h>
|
|
|
#include <cyg/infra/diag.h>
|
#include <cyg/infra/diag.h>
|
|
|
#include <cyg/compat/uitron/uit_func.h> // uITRON
|
#include <cyg/compat/uitron/uit_func.h> // uITRON
|
#include <cyg/compat/uitron/uit_ifnc.h> // uITRON interrupt funcs
|
#include <cyg/compat/uitron/uit_ifnc.h> // uITRON interrupt funcs
|
|
|
void set_interrupt_number( void );
|
void set_interrupt_number( void );
|
|
|
unsigned int clock_interrupt = 0;
|
unsigned int clock_interrupt = 0;
|
|
|
externC void
|
externC void
|
cyg_package_start( void )
|
cyg_package_start( void )
|
{
|
{
|
CYG_TEST_INIT();
|
CYG_TEST_INIT();
|
CYG_TEST_INFO( "Calling cyg_uitron_start()" );
|
CYG_TEST_INFO( "Calling cyg_uitron_start()" );
|
set_interrupt_number();
|
set_interrupt_number();
|
cyg_uitron_start();
|
cyg_uitron_start();
|
}
|
}
|
|
|
extern "C" {
|
extern "C" {
|
void task1( unsigned int arg );
|
void task1( unsigned int arg );
|
void task2( unsigned int arg );
|
void task2( unsigned int arg );
|
void task3( unsigned int arg );
|
void task3( unsigned int arg );
|
void task4( unsigned int arg );
|
void task4( unsigned int arg );
|
}
|
}
|
|
|
volatile int intercom = 0;
|
volatile int intercom = 0;
|
INT scratch = 0;
|
INT scratch = 0;
|
|
|
// Plan: replace (by direct intervention) the ISR and DSR of the regular
|
// Plan: replace (by direct intervention) the ISR and DSR of the regular
|
// timer interrupt; be sure to ack the clock intr using the appropriate hal
|
// timer interrupt; be sure to ack the clock intr using the appropriate hal
|
// macros.
|
// macros.
|
//
|
//
|
// The new ISR(s) will simply use the interrupt-safe signalling functions
|
// The new ISR(s) will simply use the interrupt-safe signalling functions
|
// to control a 2nd task. Main task will check on the state thereof.
|
// to control a 2nd task. Main task will check on the state thereof.
|
//
|
//
|
// We must test the ixxx_yyy() funcs with the scheduler already locked
|
// We must test the ixxx_yyy() funcs with the scheduler already locked
|
// also, by direct sched calls on the KAPI. This must verify that the
|
// also, by direct sched calls on the KAPI. This must verify that the
|
// signal only happens when the scheduler unlocks.
|
// signal only happens when the scheduler unlocks.
|
//
|
//
|
// The 4 producer ops are:
|
// The 4 producer ops are:
|
// iwup_tsk ( ID tskid );
|
// iwup_tsk ( ID tskid );
|
// isig_sem ( ID semid );
|
// isig_sem ( ID semid );
|
// iset_flg ( ID flgid, UINT setptn );
|
// iset_flg ( ID flgid, UINT setptn );
|
// isnd_msg ( ID mbxid, T_MSG *pk_msg );
|
// isnd_msg ( ID mbxid, T_MSG *pk_msg );
|
//
|
//
|
// and return macros are:
|
// and return macros are:
|
// ret_wup( ID tskid );
|
// ret_wup( ID tskid );
|
// ret_int();
|
// ret_int();
|
//
|
//
|
// These ISRs perform the producer ops on all available objects in turn.
|
// These ISRs perform the producer ops on all available objects in turn.
|
// Tasks 2-4
|
// Tasks 2-4
|
// Semas 1-4
|
// Semas 1-4
|
// Flags 1-4 with marching bit data; they'll all be set to 0x1ff eventually
|
// Flags 1-4 with marching bit data; they'll all be set to 0x1ff eventually
|
// Mboxes 1-4 with an arbitrary pointer
|
// Mboxes 1-4 with an arbitrary pointer
|
|
|
enum {
|
enum {
|
NOTHING = 0,
|
NOTHING = 0,
|
SLP,
|
SLP,
|
SEM,
|
SEM,
|
FLG,
|
FLG,
|
MBX,
|
MBX,
|
EXIT
|
EXIT
|
};
|
};
|
|
|
#define ACK_CLOCK() CYG_MACRO_START \
|
#define ACK_CLOCK() CYG_MACRO_START \
|
HAL_CLOCK_RESET( CYGNUM_HAL_INTERRUPT_RTC, \
|
HAL_CLOCK_RESET( CYGNUM_HAL_INTERRUPT_RTC, \
|
CYGNUM_KERNEL_COUNTERS_RTC_PERIOD ); \
|
CYGNUM_KERNEL_COUNTERS_RTC_PERIOD ); \
|
HAL_INTERRUPT_ACKNOWLEDGE( CYGNUM_HAL_INTERRUPT_RTC ); \
|
HAL_INTERRUPT_ACKNOWLEDGE( CYGNUM_HAL_INTERRUPT_RTC ); \
|
CYG_MACRO_END
|
CYG_MACRO_END
|
|
|
#define CHECK_TID() CYG_MACRO_START \
|
#define CHECK_TID() CYG_MACRO_START \
|
int my_tid; \
|
int my_tid; \
|
ER ercd; \
|
ER ercd; \
|
ercd = get_tid( &my_tid ); \
|
ercd = get_tid( &my_tid ); \
|
CYG_TEST_CHECK( E_OK == ercd, "get_tid bad ercd" ); \
|
CYG_TEST_CHECK( E_OK == ercd, "get_tid bad ercd" ); \
|
CYG_TEST_CHECK( 0 == my_tid, "tid not 0 in ISR" ); \
|
CYG_TEST_CHECK( 0 == my_tid, "tid not 0 in ISR" ); \
|
CYG_MACRO_END
|
CYG_MACRO_END
|
|
|
|
|
unsigned int
|
unsigned int
|
isr_wup_tsk( unsigned int vector, unsigned int data )
|
isr_wup_tsk( unsigned int vector, unsigned int data )
|
{
|
{
|
// Hit TASKS in range 2..4
|
// Hit TASKS in range 2..4
|
static int wtid = 2;
|
static int wtid = 2;
|
ACK_CLOCK();
|
ACK_CLOCK();
|
CHECK_TID();
|
CHECK_TID();
|
iwup_tsk( wtid );
|
iwup_tsk( wtid );
|
wtid++;
|
wtid++;
|
if ( 5 == wtid ) wtid = 2;
|
if ( 5 == wtid ) wtid = 2;
|
ret_int();
|
ret_int();
|
}
|
}
|
|
|
unsigned int
|
unsigned int
|
isr_ret_wup( unsigned int vector, unsigned int data )
|
isr_ret_wup( unsigned int vector, unsigned int data )
|
{
|
{
|
// Hit TASKS in range 2..4
|
// Hit TASKS in range 2..4
|
static int rwid = 2;
|
static int rwid = 2;
|
ACK_CLOCK();
|
ACK_CLOCK();
|
CHECK_TID();
|
CHECK_TID();
|
rwid++;
|
rwid++;
|
if ( 6 == rwid ) rwid = 3;
|
if ( 6 == rwid ) rwid = 3;
|
ret_wup( rwid - 1 );
|
ret_wup( rwid - 1 );
|
}
|
}
|
|
|
unsigned int
|
unsigned int
|
isr_sig_sem( unsigned int vector, unsigned int data )
|
isr_sig_sem( unsigned int vector, unsigned int data )
|
{
|
{
|
// Hit SEMAS in range 1..3
|
// Hit SEMAS in range 1..3
|
static int ssid = 1;
|
static int ssid = 1;
|
ACK_CLOCK();
|
ACK_CLOCK();
|
CHECK_TID();
|
CHECK_TID();
|
isig_sem( ssid );
|
isig_sem( ssid );
|
ssid++;
|
ssid++;
|
if ( ssid == 4 ) ssid = 1;
|
if ( ssid == 4 ) ssid = 1;
|
ret_int();
|
ret_int();
|
}
|
}
|
|
|
unsigned int
|
unsigned int
|
isr_set_flg( unsigned int vector, unsigned int data )
|
isr_set_flg( unsigned int vector, unsigned int data )
|
{
|
{
|
// Hit FLAGS in range 1..4
|
// Hit FLAGS in range 1..4
|
static int sfid = 1;
|
static int sfid = 1;
|
static int sfdata = 0xff;
|
static int sfdata = 0xff;
|
ACK_CLOCK();
|
ACK_CLOCK();
|
CHECK_TID();
|
CHECK_TID();
|
iset_flg( sfid, sfdata );
|
iset_flg( sfid, sfdata );
|
sfid++;
|
sfid++;
|
if ( sfid == 5 ) sfid = 1;
|
if ( sfid == 5 ) sfid = 1;
|
// sfdata <<= 1;
|
// sfdata <<= 1;
|
// if ( sfdata == 0x20 ) sfdata = 1; // so that eventually all 0x1f set
|
// if ( sfdata == 0x20 ) sfdata = 1; // so that eventually all 0x1f set
|
ret_int();
|
ret_int();
|
}
|
}
|
|
|
unsigned int
|
unsigned int
|
isr_snd_msg( unsigned int vector, unsigned int data )
|
isr_snd_msg( unsigned int vector, unsigned int data )
|
{
|
{
|
// Hit MBOXES in range 1..4
|
// Hit MBOXES in range 1..4
|
static int smid = 1;
|
static int smid = 1;
|
ACK_CLOCK();
|
ACK_CLOCK();
|
CHECK_TID();
|
CHECK_TID();
|
isnd_msg( smid, (T_MSG *)&smid );
|
isnd_msg( smid, (T_MSG *)&smid );
|
smid++;
|
smid++;
|
if ( smid == 5 ) smid = 1;
|
if ( smid == 5 ) smid = 1;
|
ret_int();
|
ret_int();
|
}
|
}
|
|
|
|
|
void attach_isr( unsigned int (*isr)(unsigned int, unsigned int) );
|
void attach_isr( unsigned int (*isr)(unsigned int, unsigned int) );
|
void detach_isr( unsigned int (*isr)(unsigned int, unsigned int) );
|
void detach_isr( unsigned int (*isr)(unsigned int, unsigned int) );
|
|
|
void lock_sched( void );
|
void lock_sched( void );
|
void unlock_sched( void );
|
void unlock_sched( void );
|
|
|
volatile int count = -1;
|
volatile int count = -1;
|
|
|
/*
|
/*
|
#define BIGDELAY 50000000
|
#define BIGDELAY 50000000
|
#define SMALLDELAY (BIGDELAY/SMALLLOOPS)
|
#define SMALLDELAY (BIGDELAY/SMALLLOOPS)
|
#define SMALLLOOPS 3
|
#define SMALLLOOPS 3
|
|
|
#define xxxLONGDELAY() \
|
#define xxxLONGDELAY() \
|
do { \
|
do { \
|
int i; \
|
int i; \
|
for ( i = 0; i < BIGDELAY; i++ ) \
|
for ( i = 0; i < BIGDELAY; i++ ) \
|
if ( wakeups[ 4 ] > prewups[ 4 ] + 99 ) break; \
|
if ( wakeups[ 4 ] > prewups[ 4 ] + 99 ) break; \
|
} while ( 0 )
|
} while ( 0 )
|
|
|
#define xxxDELAYLOCKSCHED() \
|
#define xxxDELAYLOCKSCHED() \
|
do { \
|
do { \
|
int i,j; \
|
int i,j; \
|
for ( j = 0; j < SMALLLOOPS; j++ ) { \
|
for ( j = 0; j < SMALLLOOPS; j++ ) { \
|
lock_sched(); \
|
lock_sched(); \
|
for ( i = 0; i < SMALLDELAY; i++ ) \
|
for ( i = 0; i < SMALLDELAY; i++ ) \
|
if ( wakeups[ 4 ] > prewups[ 4 ] + 99 ) break; \
|
if ( wakeups[ 4 ] > prewups[ 4 ] + 99 ) break; \
|
unlock_sched(); \
|
unlock_sched(); \
|
if ( wakeups[ 4 ] > prewups[ 4 ] + 99 ) break; \
|
if ( wakeups[ 4 ] > prewups[ 4 ] + 99 ) break; \
|
} \
|
} \
|
} while ( 0 )
|
} while ( 0 )
|
*/
|
*/
|
|
|
#define SMALLDELAYHW (5000000)
|
#define SMALLDELAYHW (5000000)
|
#define EVENTSHW ( 20)
|
#define EVENTSHW ( 20)
|
#define SMALLDELAYSIM ( 100000)
|
#define SMALLDELAYSIM ( 100000)
|
#define EVENTSSIM ( 4)
|
#define EVENTSSIM ( 4)
|
|
|
#define SMALLDELAY (smalldelay)
|
#define SMALLDELAY (smalldelay)
|
#define EVENTS (events)
|
#define EVENTS (events)
|
|
|
static int smalldelay = SMALLDELAYHW;
|
static int smalldelay = SMALLDELAYHW;
|
static int events = EVENTSHW;
|
static int events = EVENTSHW;
|
|
|
#define LONGDELAY() do { \
|
#define LONGDELAY() do { \
|
count = 0; \
|
count = 0; \
|
do count++; while ( wakeups[ 4 ] < prewups[ 4 ] + EVENTS ); \
|
do count++; while ( wakeups[ 4 ] < prewups[ 4 ] + EVENTS ); \
|
} while ( 0 )
|
} while ( 0 )
|
|
|
|
|
#define DELAYLOCKSCHED() \
|
#define DELAYLOCKSCHED() \
|
do { \
|
do { \
|
count = 0; \
|
count = 0; \
|
int i; \
|
int i; \
|
do { \
|
do { \
|
lock_sched(); \
|
lock_sched(); \
|
for ( i = 0; i < SMALLDELAY; i++ ) { \
|
for ( i = 0; i < SMALLDELAY; i++ ) { \
|
count++; \
|
count++; \
|
if ( wakeups[ 4 ] >= prewups[ 4 ] + EVENTS ) \
|
if ( wakeups[ 4 ] >= prewups[ 4 ] + EVENTS ) \
|
break; \
|
break; \
|
} \
|
} \
|
unlock_sched(); \
|
unlock_sched(); \
|
CYG_TEST_INFO(" [Still iterating, please wait....] "); \
|
CYG_TEST_INFO(" [Still iterating, please wait....] "); \
|
} while ( wakeups[ 4 ] < prewups[ 4 ] + EVENTS ); \
|
} while ( wakeups[ 4 ] < prewups[ 4 ] + EVENTS ); \
|
} while ( 0 )
|
} while ( 0 )
|
|
|
#define DELAY() \
|
#define DELAY() \
|
if ( 1 & loops ) \
|
if ( 1 & loops ) \
|
DELAYLOCKSCHED(); \
|
DELAYLOCKSCHED(); \
|
else \
|
else \
|
LONGDELAY();
|
LONGDELAY();
|
|
|
|
|
volatile int wakeups[ 5 ] = { 0,0,0,0,0 };
|
volatile int wakeups[ 5 ] = { 0,0,0,0,0 };
|
volatile int prewups[ 5 ] = { 0,0,0,0,0 };
|
volatile int prewups[ 5 ] = { 0,0,0,0,0 };
|
|
|
|
|
void task1( unsigned int arg )
|
void task1( unsigned int arg )
|
{
|
{
|
ER ercd;
|
ER ercd;
|
int loops;
|
int loops;
|
|
|
CYG_TEST_INFO( "Task 1 running" );
|
CYG_TEST_INFO( "Task 1 running" );
|
|
|
if ( cyg_test_is_simulator ) {
|
if ( cyg_test_is_simulator ) {
|
// take less time
|
// take less time
|
events = EVENTSSIM;
|
events = EVENTSSIM;
|
}
|
}
|
|
|
|
|
// First test that dis_int() and ena_int() work for the clock interrupt
|
// First test that dis_int() and ena_int() work for the clock interrupt
|
#ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS
|
#ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS
|
ercd = ena_int( 123456789 ); // Hope this is large enough to error
|
ercd = ena_int( 123456789 ); // Hope this is large enough to error
|
CYG_TEST_CHECK( E_PAR == ercd, "ena_int bad ercd !E_PAR" );
|
CYG_TEST_CHECK( E_PAR == ercd, "ena_int bad ercd !E_PAR" );
|
ercd = dis_int( 123456789 );
|
ercd = dis_int( 123456789 );
|
CYG_TEST_CHECK( E_PAR == ercd, "dis_int bad ercd !E_PAR" );
|
CYG_TEST_CHECK( E_PAR == ercd, "dis_int bad ercd !E_PAR" );
|
#endif
|
#endif
|
|
|
// This may take too long on a sim...
|
// This may take too long on a sim...
|
// On the synthetic target this test cannot run reliably - the
|
// On the synthetic target this test cannot run reliably - the
|
// loop counting assumes exclusive access to the processor.
|
// loop counting assumes exclusive access to the processor.
|
#ifndef CYGPKG_HAL_SYNTH
|
#ifndef CYGPKG_HAL_SYNTH
|
if ( ! cyg_test_is_simulator ) {
|
if ( ! cyg_test_is_simulator ) {
|
SYSTIME t1, t2;
|
SYSTIME t1, t2;
|
|
|
CYG_TEST_INFO( "Testing masking of clock interrupt" );
|
CYG_TEST_INFO( "Testing masking of clock interrupt" );
|
|
|
ercd = get_tim( &t1 );
|
ercd = get_tim( &t1 );
|
CYG_TEST_CHECK( E_OK == ercd, "get_tim bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "get_tim bad ercd" );
|
|
|
// Wait for a tick. This loop acts as a synchronizer for the loop
|
// Wait for a tick. This loop acts as a synchronizer for the loop
|
// below, ensuring that it starts just after a tick.
|
// below, ensuring that it starts just after a tick.
|
for ( loops = 0; loops < 10000000; loops++ ) {
|
for ( loops = 0; loops < 10000000; loops++ ) {
|
ercd = get_tim( &t2 );
|
ercd = get_tim( &t2 );
|
CYG_TEST_CHECK( E_OK == ercd, "get_tim bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "get_tim bad ercd" );
|
if ( t2 != t1 )
|
if ( t2 != t1 )
|
break;
|
break;
|
}
|
}
|
// Wait for next tick. Reset loops counter so we get the
|
// Wait for next tick. Reset loops counter so we get the
|
// approximate loop count of one clock tick.
|
// approximate loop count of one clock tick.
|
for ( loops = 0; loops < 10000000; loops++ ) {
|
for ( loops = 0; loops < 10000000; loops++ ) {
|
ercd = get_tim( &t1 );
|
ercd = get_tim( &t1 );
|
CYG_TEST_CHECK( E_OK == ercd, "get_tim bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "get_tim bad ercd" );
|
if ( t2 != t1 )
|
if ( t2 != t1 )
|
break;
|
break;
|
}
|
}
|
|
|
// save how many loops could be executed in one tick. Multiply
|
// save how many loops could be executed in one tick. Multiply
|
// with 3 : we run loops in pairs below and add the time of
|
// with 3 : we run loops in pairs below and add the time of
|
// one extra to avoid small variations to trigger failures.
|
// one extra to avoid small variations to trigger failures.
|
intercom = loops * 3;
|
intercom = loops * 3;
|
|
|
ercd = ena_int( clock_interrupt ); // was initialized already
|
ercd = ena_int( clock_interrupt ); // was initialized already
|
CYG_TEST_CHECK( E_OK == ercd, "ena_int bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "ena_int bad ercd" );
|
|
|
ercd = get_tim( &t1 );
|
ercd = get_tim( &t1 );
|
CYG_TEST_CHECK( E_OK == ercd, "get_tim bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "get_tim bad ercd" );
|
|
|
// Wait for a tick
|
// Wait for a tick
|
for ( loops = intercom; loops > 0; loops-- ) {
|
for ( loops = intercom; loops > 0; loops-- ) {
|
ercd = get_tim( &t2 );
|
ercd = get_tim( &t2 );
|
CYG_TEST_CHECK( E_OK == ercd, "get_tim bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "get_tim bad ercd" );
|
if ( t2 != t1 )
|
if ( t2 != t1 )
|
break;
|
break;
|
}
|
}
|
CYG_TEST_CHECK( 0 < loops, "No first tick" );
|
CYG_TEST_CHECK( 0 < loops, "No first tick" );
|
// and a second one
|
// and a second one
|
for ( ; loops > 0; loops-- ) {
|
for ( ; loops > 0; loops-- ) {
|
ercd = get_tim( &t1 );
|
ercd = get_tim( &t1 );
|
CYG_TEST_CHECK( E_OK == ercd, "get_tim bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "get_tim bad ercd" );
|
if ( t2 != t1 )
|
if ( t2 != t1 )
|
break;
|
break;
|
}
|
}
|
CYG_TEST_CHECK( 0 < loops, "No second tick" );
|
CYG_TEST_CHECK( 0 < loops, "No second tick" );
|
|
|
// The PowerPC cannot disable the timer interrupt (separately).
|
// The PowerPC cannot disable the timer interrupt (separately).
|
#ifndef CYGPKG_HAL_POWERPC
|
#ifndef CYGPKG_HAL_POWERPC
|
ercd = dis_int( clock_interrupt ); // was initialized already
|
ercd = dis_int( clock_interrupt ); // was initialized already
|
CYG_TEST_CHECK( E_OK == ercd, "dis_int bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "dis_int bad ercd" );
|
|
|
ercd = get_tim( &t1 );
|
ercd = get_tim( &t1 );
|
CYG_TEST_CHECK( E_OK == ercd, "get_tim bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "get_tim bad ercd" );
|
|
|
// Wait for a tick (should not happen)
|
// Wait for a tick (should not happen)
|
for ( loops = intercom; loops > 0; loops-- ) {
|
for ( loops = intercom; loops > 0; loops-- ) {
|
ercd = get_tim( &t2 );
|
ercd = get_tim( &t2 );
|
CYG_TEST_CHECK( E_OK == ercd, "get_tim bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "get_tim bad ercd" );
|
if ( t2 != t1 )
|
if ( t2 != t1 )
|
break;
|
break;
|
}
|
}
|
CYG_TEST_CHECK( 0 == loops, "A tick occured - should be masked" );
|
CYG_TEST_CHECK( 0 == loops, "A tick occured - should be masked" );
|
CYG_TEST_CHECK( t1 == t2, "Times are different" );
|
CYG_TEST_CHECK( t1 == t2, "Times are different" );
|
|
|
// Now enable it again and ensure all is well:
|
// Now enable it again and ensure all is well:
|
ercd = ena_int( clock_interrupt );
|
ercd = ena_int( clock_interrupt );
|
CYG_TEST_CHECK( E_OK == ercd, "ena_int bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "ena_int bad ercd" );
|
#endif
|
#endif
|
|
|
ercd = get_tim( &t1 );
|
ercd = get_tim( &t1 );
|
CYG_TEST_CHECK( E_OK == ercd, "get_tim bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "get_tim bad ercd" );
|
|
|
// Wait for a tick
|
// Wait for a tick
|
for ( loops = intercom; loops > 0; loops-- ) {
|
for ( loops = intercom; loops > 0; loops-- ) {
|
ercd = get_tim( &t2 );
|
ercd = get_tim( &t2 );
|
CYG_TEST_CHECK( E_OK == ercd, "get_tim bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "get_tim bad ercd" );
|
if ( t2 != t1 )
|
if ( t2 != t1 )
|
break;
|
break;
|
}
|
}
|
CYG_TEST_CHECK( 0 < loops, "No first tick" );
|
CYG_TEST_CHECK( 0 < loops, "No first tick" );
|
// and a second one
|
// and a second one
|
for ( ; loops > 0; loops-- ) {
|
for ( ; loops > 0; loops-- ) {
|
ercd = get_tim( &t1 );
|
ercd = get_tim( &t1 );
|
CYG_TEST_CHECK( E_OK == ercd, "get_tim bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "get_tim bad ercd" );
|
if ( t2 != t1 )
|
if ( t2 != t1 )
|
break;
|
break;
|
}
|
}
|
CYG_TEST_CHECK( 0 < loops, "No second tick" );
|
CYG_TEST_CHECK( 0 < loops, "No second tick" );
|
|
|
CYG_TEST_PASS( "dis_int(), ena_int() OK" );
|
CYG_TEST_PASS( "dis_int(), ena_int() OK" );
|
}
|
}
|
#endif
|
#endif
|
|
|
intercom = 0;
|
intercom = 0;
|
|
|
ercd = get_tid( &scratch );
|
ercd = get_tid( &scratch );
|
CYG_TEST_CHECK( E_OK == ercd, "get_tid bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "get_tid bad ercd" );
|
CYG_TEST_CHECK( 1 == scratch, "tid not 1" );
|
CYG_TEST_CHECK( 1 == scratch, "tid not 1" );
|
|
|
// start all other tasks (our prio is 1 by default)
|
// start all other tasks (our prio is 1 by default)
|
ercd = sta_tsk( 2, 222 );
|
ercd = sta_tsk( 2, 222 );
|
CYG_TEST_CHECK( E_OK == ercd, "sta_tsk 2 bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "sta_tsk 2 bad ercd" );
|
ercd = sta_tsk( 3, 333 );
|
ercd = sta_tsk( 3, 333 );
|
CYG_TEST_CHECK( E_OK == ercd, "sta_tsk 3 bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "sta_tsk 3 bad ercd" );
|
ercd = sta_tsk( 4, 444 );
|
ercd = sta_tsk( 4, 444 );
|
CYG_TEST_CHECK( E_OK == ercd, "sta_tsk 4 bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "sta_tsk 4 bad ercd" );
|
// drop pri of other tasks all to 5
|
// drop pri of other tasks all to 5
|
ercd = chg_pri( 2, 5 );
|
ercd = chg_pri( 2, 5 );
|
CYG_TEST_CHECK( E_OK == ercd, "chg_pri 2 bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "chg_pri 2 bad ercd" );
|
ercd = chg_pri( 3, 5 );
|
ercd = chg_pri( 3, 5 );
|
CYG_TEST_CHECK( E_OK == ercd, "chg_pri 3 bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "chg_pri 3 bad ercd" );
|
ercd = chg_pri( 4, 5 );
|
ercd = chg_pri( 4, 5 );
|
CYG_TEST_CHECK( E_OK == ercd, "chg_pri 4 bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "chg_pri 4 bad ercd" );
|
|
|
// Test sleep/wakeup
|
// Test sleep/wakeup
|
intercom = SLP;
|
intercom = SLP;
|
// Drop our prio to lower; they will run in turn until asleep
|
// Drop our prio to lower; they will run in turn until asleep
|
ercd = chg_pri( 1, 6 );
|
ercd = chg_pri( 1, 6 );
|
CYG_TEST_CHECK( E_OK == ercd, "chg_pri 1 (self) bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "chg_pri 1 (self) bad ercd" );
|
|
|
loops = 4;
|
loops = 4;
|
do {
|
do {
|
|
|
if ( 1 & loops )
|
if ( 1 & loops )
|
CYG_TEST_INFO( " (toggling scheduler lock) " );
|
CYG_TEST_INFO( " (toggling scheduler lock) " );
|
else
|
else
|
CYG_TEST_INFO( " (unlocked scheduler) " );
|
CYG_TEST_INFO( " (unlocked scheduler) " );
|
|
|
|
|
CYG_TEST_CHECK( 0 == wakeups[0], "init: Wakeups[0] hit" );
|
CYG_TEST_CHECK( 0 == wakeups[0], "init: Wakeups[0] hit" );
|
CYG_TEST_CHECK( 0 == wakeups[1], "init: Wakeups[1] hit" );
|
CYG_TEST_CHECK( 0 == wakeups[1], "init: Wakeups[1] hit" );
|
CYG_TEST_CHECK( prewups[2] == wakeups[2], "init: Wakeups[2] hit" );
|
CYG_TEST_CHECK( prewups[2] == wakeups[2], "init: Wakeups[2] hit" );
|
CYG_TEST_CHECK( prewups[3] == wakeups[3], "init: Wakeups[3] hit" );
|
CYG_TEST_CHECK( prewups[3] == wakeups[3], "init: Wakeups[3] hit" );
|
CYG_TEST_CHECK( prewups[4] == wakeups[4], "init: Wakeups[4] hit" );
|
CYG_TEST_CHECK( prewups[4] == wakeups[4], "init: Wakeups[4] hit" );
|
|
|
// -------- TIMERS AND TIMESLICING DISABLED ---------
|
// -------- TIMERS AND TIMESLICING DISABLED ---------
|
// install an isr that will wake them all up in turn
|
// install an isr that will wake them all up in turn
|
attach_isr( isr_wup_tsk );
|
attach_isr( isr_wup_tsk );
|
DELAY();
|
DELAY();
|
detach_isr( isr_wup_tsk );
|
detach_isr( isr_wup_tsk );
|
// -------- timers and timeslicing ENABLED ---------
|
// -------- timers and timeslicing ENABLED ---------
|
|
|
CYG_TEST_CHECK( 0 == wakeups[0], "iwup_tsk: Wakeups[0] hit" );
|
CYG_TEST_CHECK( 0 == wakeups[0], "iwup_tsk: Wakeups[0] hit" );
|
CYG_TEST_CHECK( 0 == wakeups[1], "iwup_tsk: Wakeups[1] hit" );
|
CYG_TEST_CHECK( 0 == wakeups[1], "iwup_tsk: Wakeups[1] hit" );
|
CYG_TEST_CHECK( prewups[2] < wakeups[2], "iwup_tsk: Wakeups[2] not hit" );
|
CYG_TEST_CHECK( prewups[2] < wakeups[2], "iwup_tsk: Wakeups[2] not hit" );
|
CYG_TEST_CHECK( prewups[3] < wakeups[3], "iwup_tsk: Wakeups[3] not hit" );
|
CYG_TEST_CHECK( prewups[3] < wakeups[3], "iwup_tsk: Wakeups[3] not hit" );
|
CYG_TEST_CHECK( prewups[4] < wakeups[4], "iwup_tsk: Wakeups[4] not hit" );
|
CYG_TEST_CHECK( prewups[4] < wakeups[4], "iwup_tsk: Wakeups[4] not hit" );
|
diag_printf( "INFO:<(fg loops %10d) thread wakeups : %2d %2d %2d >\n", count,
|
diag_printf( "INFO:<(fg loops %10d) thread wakeups : %2d %2d %2d >\n", count,
|
wakeups[2] - prewups[2],
|
wakeups[2] - prewups[2],
|
wakeups[3] - prewups[3],
|
wakeups[3] - prewups[3],
|
wakeups[4] - prewups[4] );
|
wakeups[4] - prewups[4] );
|
prewups[2] = wakeups[2];
|
prewups[2] = wakeups[2];
|
prewups[3] = wakeups[3];
|
prewups[3] = wakeups[3];
|
prewups[4] = wakeups[4];
|
prewups[4] = wakeups[4];
|
|
|
// -------- TIMERS AND TIMESLICING DISABLED ---------
|
// -------- TIMERS AND TIMESLICING DISABLED ---------
|
// install an isr that will wake them all up in turn
|
// install an isr that will wake them all up in turn
|
attach_isr( isr_ret_wup );
|
attach_isr( isr_ret_wup );
|
DELAY();
|
DELAY();
|
detach_isr( isr_ret_wup );
|
detach_isr( isr_ret_wup );
|
// -------- timers and timeslicing ENABLED ---------
|
// -------- timers and timeslicing ENABLED ---------
|
|
|
CYG_TEST_CHECK( 0 == wakeups[0], "ret_wup: Wakeups[0] hit" );
|
CYG_TEST_CHECK( 0 == wakeups[0], "ret_wup: Wakeups[0] hit" );
|
CYG_TEST_CHECK( 0 == wakeups[1], "ret_wup: Wakeups[1] hit" );
|
CYG_TEST_CHECK( 0 == wakeups[1], "ret_wup: Wakeups[1] hit" );
|
CYG_TEST_CHECK( prewups[2] < wakeups[2], "ret_wup: Wakeups[2] not hit" );
|
CYG_TEST_CHECK( prewups[2] < wakeups[2], "ret_wup: Wakeups[2] not hit" );
|
CYG_TEST_CHECK( prewups[3] < wakeups[3], "ret_wup: Wakeups[3] not hit" );
|
CYG_TEST_CHECK( prewups[3] < wakeups[3], "ret_wup: Wakeups[3] not hit" );
|
CYG_TEST_CHECK( prewups[4] < wakeups[4], "ret_wup: Wakeups[4] not hit" );
|
CYG_TEST_CHECK( prewups[4] < wakeups[4], "ret_wup: Wakeups[4] not hit" );
|
diag_printf( "INFO:<(fg loops %10d) thread ret_wups: %2d %2d %2d >\n", count,
|
diag_printf( "INFO:<(fg loops %10d) thread ret_wups: %2d %2d %2d >\n", count,
|
wakeups[2] - prewups[2],
|
wakeups[2] - prewups[2],
|
wakeups[3] - prewups[3],
|
wakeups[3] - prewups[3],
|
wakeups[4] - prewups[4] );
|
wakeups[4] - prewups[4] );
|
prewups[2] = wakeups[2];
|
prewups[2] = wakeups[2];
|
prewups[3] = wakeups[3];
|
prewups[3] = wakeups[3];
|
prewups[4] = wakeups[4];
|
prewups[4] = wakeups[4];
|
|
|
// move them on to waiting for a semaphore
|
// move them on to waiting for a semaphore
|
intercom = SEM;
|
intercom = SEM;
|
ercd = wup_tsk( 2 );
|
ercd = wup_tsk( 2 );
|
CYG_TEST_CHECK( E_OK == ercd, "wup_tsk(2) bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "wup_tsk(2) bad ercd" );
|
ercd = wup_tsk( 3 );
|
ercd = wup_tsk( 3 );
|
CYG_TEST_CHECK( E_OK == ercd, "wup_tsk(3) bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "wup_tsk(3) bad ercd" );
|
ercd = wup_tsk( 4 );
|
ercd = wup_tsk( 4 );
|
CYG_TEST_CHECK( E_OK == ercd, "wup_tsk(4) bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "wup_tsk(4) bad ercd" );
|
|
|
CYG_TEST_CHECK( 0 == wakeups[0], "wup_tsk: Wakeups[0] hit" );
|
CYG_TEST_CHECK( 0 == wakeups[0], "wup_tsk: Wakeups[0] hit" );
|
CYG_TEST_CHECK( 0 == wakeups[1], "wup_tsk: Wakeups[1] hit" );
|
CYG_TEST_CHECK( 0 == wakeups[1], "wup_tsk: Wakeups[1] hit" );
|
CYG_TEST_CHECK( prewups[2] + 1 == wakeups[2], "wup_tsk: Wakeups[2] not hit" );
|
CYG_TEST_CHECK( prewups[2] + 1 == wakeups[2], "wup_tsk: Wakeups[2] not hit" );
|
CYG_TEST_CHECK( prewups[3] + 1 == wakeups[3], "wup_tsk: Wakeups[3] not hit" );
|
CYG_TEST_CHECK( prewups[3] + 1 == wakeups[3], "wup_tsk: Wakeups[3] not hit" );
|
CYG_TEST_CHECK( prewups[4] + 1 == wakeups[4], "wup_tsk: Wakeups[4] not hit" );
|
CYG_TEST_CHECK( prewups[4] + 1 == wakeups[4], "wup_tsk: Wakeups[4] not hit" );
|
prewups[2] = wakeups[2];
|
prewups[2] = wakeups[2];
|
prewups[3] = wakeups[3];
|
prewups[3] = wakeups[3];
|
prewups[4] = wakeups[4];
|
prewups[4] = wakeups[4];
|
|
|
// -------- TIMERS AND TIMESLICING DISABLED ---------
|
// -------- TIMERS AND TIMESLICING DISABLED ---------
|
// install an isr that will wake them all up in turn
|
// install an isr that will wake them all up in turn
|
attach_isr( isr_sig_sem );
|
attach_isr( isr_sig_sem );
|
DELAY();
|
DELAY();
|
detach_isr( isr_sig_sem );
|
detach_isr( isr_sig_sem );
|
// -------- timers and timeslicing ENABLED ---------
|
// -------- timers and timeslicing ENABLED ---------
|
|
|
CYG_TEST_CHECK( 0 == wakeups[0], "isig_sem: Wakeups[0] hit" );
|
CYG_TEST_CHECK( 0 == wakeups[0], "isig_sem: Wakeups[0] hit" );
|
CYG_TEST_CHECK( 0 == wakeups[1], "isig_sem: Wakeups[1] hit" );
|
CYG_TEST_CHECK( 0 == wakeups[1], "isig_sem: Wakeups[1] hit" );
|
CYG_TEST_CHECK( prewups[2] < wakeups[2], "isig_sem: Wakeups[2] not hit" );
|
CYG_TEST_CHECK( prewups[2] < wakeups[2], "isig_sem: Wakeups[2] not hit" );
|
CYG_TEST_CHECK( prewups[3] < wakeups[3], "isig_sem: Wakeups[3] not hit" );
|
CYG_TEST_CHECK( prewups[3] < wakeups[3], "isig_sem: Wakeups[3] not hit" );
|
CYG_TEST_CHECK( prewups[4] < wakeups[4], "isig_sem: Wakeups[4] not hit" );
|
CYG_TEST_CHECK( prewups[4] < wakeups[4], "isig_sem: Wakeups[4] not hit" );
|
diag_printf( "INFO:<(fg loops %10d) semaphore waits: %2d %2d %2d >\n", count,
|
diag_printf( "INFO:<(fg loops %10d) semaphore waits: %2d %2d %2d >\n", count,
|
wakeups[2] - prewups[2],
|
wakeups[2] - prewups[2],
|
wakeups[3] - prewups[3],
|
wakeups[3] - prewups[3],
|
wakeups[4] - prewups[4] );
|
wakeups[4] - prewups[4] );
|
prewups[2] = wakeups[2];
|
prewups[2] = wakeups[2];
|
prewups[3] = wakeups[3];
|
prewups[3] = wakeups[3];
|
prewups[4] = wakeups[4];
|
prewups[4] = wakeups[4];
|
|
|
// move them on to waiting for a flag
|
// move them on to waiting for a flag
|
intercom = FLG;
|
intercom = FLG;
|
ercd = sig_sem( 1 );
|
ercd = sig_sem( 1 );
|
CYG_TEST_CHECK( E_OK == ercd, "sig_sem(1) bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "sig_sem(1) bad ercd" );
|
ercd = sig_sem( 2 );
|
ercd = sig_sem( 2 );
|
CYG_TEST_CHECK( E_OK == ercd, "sig_sem(2) bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "sig_sem(2) bad ercd" );
|
ercd = sig_sem( 3 );
|
ercd = sig_sem( 3 );
|
CYG_TEST_CHECK( E_OK == ercd, "sig_sem(3) bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "sig_sem(3) bad ercd" );
|
|
|
CYG_TEST_CHECK( 0 == wakeups[0], "sig_sem: Wakeups[0] hit" );
|
CYG_TEST_CHECK( 0 == wakeups[0], "sig_sem: Wakeups[0] hit" );
|
CYG_TEST_CHECK( 0 == wakeups[1], "sig_sem: Wakeups[1] hit" );
|
CYG_TEST_CHECK( 0 == wakeups[1], "sig_sem: Wakeups[1] hit" );
|
CYG_TEST_CHECK( prewups[2] + 1 == wakeups[2], "sig_sem: Wakeups[2] not hit" );
|
CYG_TEST_CHECK( prewups[2] + 1 == wakeups[2], "sig_sem: Wakeups[2] not hit" );
|
CYG_TEST_CHECK( prewups[3] + 1 == wakeups[3], "sig_sem: Wakeups[3] not hit" );
|
CYG_TEST_CHECK( prewups[3] + 1 == wakeups[3], "sig_sem: Wakeups[3] not hit" );
|
CYG_TEST_CHECK( prewups[4] + 1 == wakeups[4], "sig_sem: Wakeups[4] not hit" );
|
CYG_TEST_CHECK( prewups[4] + 1 == wakeups[4], "sig_sem: Wakeups[4] not hit" );
|
prewups[2] = wakeups[2];
|
prewups[2] = wakeups[2];
|
prewups[3] = wakeups[3];
|
prewups[3] = wakeups[3];
|
prewups[4] = wakeups[4];
|
prewups[4] = wakeups[4];
|
|
|
// -------- TIMERS AND TIMESLICING DISABLED ---------
|
// -------- TIMERS AND TIMESLICING DISABLED ---------
|
// install an isr that will wake them all up in turn
|
// install an isr that will wake them all up in turn
|
attach_isr( isr_set_flg );
|
attach_isr( isr_set_flg );
|
DELAY();
|
DELAY();
|
detach_isr( isr_set_flg );
|
detach_isr( isr_set_flg );
|
// -------- timers and timeslicing ENABLED ---------
|
// -------- timers and timeslicing ENABLED ---------
|
|
|
CYG_TEST_CHECK( 0 == wakeups[0], "iset_flg: Wakeups[0] hit" );
|
CYG_TEST_CHECK( 0 == wakeups[0], "iset_flg: Wakeups[0] hit" );
|
CYG_TEST_CHECK( 0 == wakeups[1], "iset_flg: Wakeups[1] hit" );
|
CYG_TEST_CHECK( 0 == wakeups[1], "iset_flg: Wakeups[1] hit" );
|
CYG_TEST_CHECK( prewups[2] < wakeups[2], "iset_flg: Wakeups[2] not hit" );
|
CYG_TEST_CHECK( prewups[2] < wakeups[2], "iset_flg: Wakeups[2] not hit" );
|
CYG_TEST_CHECK( prewups[3] < wakeups[3], "iset_flg: Wakeups[3] not hit" );
|
CYG_TEST_CHECK( prewups[3] < wakeups[3], "iset_flg: Wakeups[3] not hit" );
|
CYG_TEST_CHECK( prewups[4] < wakeups[4], "iset_flg: Wakeups[4] not hit" );
|
CYG_TEST_CHECK( prewups[4] < wakeups[4], "iset_flg: Wakeups[4] not hit" );
|
diag_printf( "INFO:<(fg loops %10d) flag waits/sets: %2d %2d %2d >\n", count,
|
diag_printf( "INFO:<(fg loops %10d) flag waits/sets: %2d %2d %2d >\n", count,
|
wakeups[2] - prewups[2],
|
wakeups[2] - prewups[2],
|
wakeups[3] - prewups[3],
|
wakeups[3] - prewups[3],
|
wakeups[4] - prewups[4] );
|
wakeups[4] - prewups[4] );
|
prewups[2] = wakeups[2];
|
prewups[2] = wakeups[2];
|
prewups[3] = wakeups[3];
|
prewups[3] = wakeups[3];
|
prewups[4] = wakeups[4];
|
prewups[4] = wakeups[4];
|
|
|
// move them on to waiting for a message box
|
// move them on to waiting for a message box
|
intercom = MBX;
|
intercom = MBX;
|
ercd = set_flg( 2, 0xfff );
|
ercd = set_flg( 2, 0xfff );
|
CYG_TEST_CHECK( E_OK == ercd, "set_flg(2) bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "set_flg(2) bad ercd" );
|
ercd = set_flg( 3, 0xfff );
|
ercd = set_flg( 3, 0xfff );
|
CYG_TEST_CHECK( E_OK == ercd, "set_flg(3) bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "set_flg(3) bad ercd" );
|
ercd = set_flg( 4, 0xfff );
|
ercd = set_flg( 4, 0xfff );
|
CYG_TEST_CHECK( E_OK == ercd, "set_flg(4) bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "set_flg(4) bad ercd" );
|
|
|
CYG_TEST_CHECK( 0 == wakeups[0], "set_flg: Wakeups[0] hit" );
|
CYG_TEST_CHECK( 0 == wakeups[0], "set_flg: Wakeups[0] hit" );
|
CYG_TEST_CHECK( 0 == wakeups[1], "set_flg: Wakeups[1] hit" );
|
CYG_TEST_CHECK( 0 == wakeups[1], "set_flg: Wakeups[1] hit" );
|
CYG_TEST_CHECK( prewups[2] + 1 == wakeups[2], "set_flg: Wakeups[2] not hit" );
|
CYG_TEST_CHECK( prewups[2] + 1 == wakeups[2], "set_flg: Wakeups[2] not hit" );
|
CYG_TEST_CHECK( prewups[3] + 1 == wakeups[3], "set_flg: Wakeups[3] not hit" );
|
CYG_TEST_CHECK( prewups[3] + 1 == wakeups[3], "set_flg: Wakeups[3] not hit" );
|
CYG_TEST_CHECK( prewups[4] + 1 == wakeups[4], "set_flg: Wakeups[4] not hit" );
|
CYG_TEST_CHECK( prewups[4] + 1 == wakeups[4], "set_flg: Wakeups[4] not hit" );
|
prewups[2] = wakeups[2];
|
prewups[2] = wakeups[2];
|
prewups[3] = wakeups[3];
|
prewups[3] = wakeups[3];
|
prewups[4] = wakeups[4];
|
prewups[4] = wakeups[4];
|
|
|
// -------- TIMERS AND TIMESLICING DISABLED ---------
|
// -------- TIMERS AND TIMESLICING DISABLED ---------
|
// install an isr that will wake them all up in turn
|
// install an isr that will wake them all up in turn
|
attach_isr( isr_snd_msg );
|
attach_isr( isr_snd_msg );
|
DELAY();
|
DELAY();
|
detach_isr( isr_snd_msg );
|
detach_isr( isr_snd_msg );
|
// -------- timers and timeslicing ENABLED ---------
|
// -------- timers and timeslicing ENABLED ---------
|
|
|
CYG_TEST_CHECK( 0 == wakeups[0], "isnd_msg: Wakeups[0] hit" );
|
CYG_TEST_CHECK( 0 == wakeups[0], "isnd_msg: Wakeups[0] hit" );
|
CYG_TEST_CHECK( 0 == wakeups[1], "isnd_msg: Wakeups[1] hit" );
|
CYG_TEST_CHECK( 0 == wakeups[1], "isnd_msg: Wakeups[1] hit" );
|
CYG_TEST_CHECK( prewups[2] < wakeups[2], "isnd_msg: Wakeups[2] not hit" );
|
CYG_TEST_CHECK( prewups[2] < wakeups[2], "isnd_msg: Wakeups[2] not hit" );
|
CYG_TEST_CHECK( prewups[3] < wakeups[3], "isnd_msg: Wakeups[3] not hit" );
|
CYG_TEST_CHECK( prewups[3] < wakeups[3], "isnd_msg: Wakeups[3] not hit" );
|
CYG_TEST_CHECK( prewups[4] < wakeups[4], "isnd_msg: Wakeups[4] not hit" );
|
CYG_TEST_CHECK( prewups[4] < wakeups[4], "isnd_msg: Wakeups[4] not hit" );
|
diag_printf( "INFO:<(fg loops %10d) message rec'pts: %2d %2d %2d >\n", count,
|
diag_printf( "INFO:<(fg loops %10d) message rec'pts: %2d %2d %2d >\n", count,
|
wakeups[2] - prewups[2],
|
wakeups[2] - prewups[2],
|
wakeups[3] - prewups[3],
|
wakeups[3] - prewups[3],
|
wakeups[4] - prewups[4] );
|
wakeups[4] - prewups[4] );
|
prewups[2] = wakeups[2];
|
prewups[2] = wakeups[2];
|
prewups[3] = wakeups[3];
|
prewups[3] = wakeups[3];
|
prewups[4] = wakeups[4];
|
prewups[4] = wakeups[4];
|
|
|
// move them on to exiting, all done
|
// move them on to exiting, all done
|
if ( 1 == loops )
|
if ( 1 == loops )
|
// then we are about to exit
|
// then we are about to exit
|
intercom = EXIT;
|
intercom = EXIT;
|
else
|
else
|
intercom = SLP;
|
intercom = SLP;
|
ercd = snd_msg( 2, (T_MSG *)&intercom );
|
ercd = snd_msg( 2, (T_MSG *)&intercom );
|
CYG_TEST_CHECK( E_OK == ercd, "snd_msg(2) bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "snd_msg(2) bad ercd" );
|
ercd = snd_msg( 3, (T_MSG *)&intercom );
|
ercd = snd_msg( 3, (T_MSG *)&intercom );
|
CYG_TEST_CHECK( E_OK == ercd, "snd_msg(3) bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "snd_msg(3) bad ercd" );
|
ercd = snd_msg( 4, (T_MSG *)&intercom );
|
ercd = snd_msg( 4, (T_MSG *)&intercom );
|
CYG_TEST_CHECK( E_OK == ercd, "snd_msg(4) bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "snd_msg(4) bad ercd" );
|
|
|
CYG_TEST_CHECK( 0 == wakeups[0], "snd_msg: Wakeups[0] hit" );
|
CYG_TEST_CHECK( 0 == wakeups[0], "snd_msg: Wakeups[0] hit" );
|
CYG_TEST_CHECK( 0 == wakeups[1], "snd_msg: Wakeups[1] hit" );
|
CYG_TEST_CHECK( 0 == wakeups[1], "snd_msg: Wakeups[1] hit" );
|
CYG_TEST_CHECK( prewups[2] + 1 == wakeups[2], "snd_msg: Wakeups[2] not hit" );
|
CYG_TEST_CHECK( prewups[2] + 1 == wakeups[2], "snd_msg: Wakeups[2] not hit" );
|
CYG_TEST_CHECK( prewups[3] + 1 == wakeups[3], "snd_msg: Wakeups[3] not hit" );
|
CYG_TEST_CHECK( prewups[3] + 1 == wakeups[3], "snd_msg: Wakeups[3] not hit" );
|
CYG_TEST_CHECK( prewups[4] + 1 == wakeups[4], "snd_msg: Wakeups[4] not hit" );
|
CYG_TEST_CHECK( prewups[4] + 1 == wakeups[4], "snd_msg: Wakeups[4] not hit" );
|
prewups[2] = wakeups[2];
|
prewups[2] = wakeups[2];
|
prewups[3] = wakeups[3];
|
prewups[3] = wakeups[3];
|
prewups[4] = wakeups[4];
|
prewups[4] = wakeups[4];
|
|
|
CYG_TEST_PASS( "Tested ISR invoked uITRON functions" );
|
CYG_TEST_PASS( "Tested ISR invoked uITRON functions" );
|
|
|
} while ( 0 < --loops );
|
} while ( 0 < --loops );
|
|
|
CYG_TEST_EXIT( "All done" );
|
CYG_TEST_EXIT( "All done" );
|
ext_tsk();
|
ext_tsk();
|
}
|
}
|
|
|
|
|
void body( int n )
|
void body( int n )
|
{
|
{
|
unsigned int z;
|
unsigned int z;
|
ER ercd;
|
ER ercd;
|
T_MSG *pk_msg;
|
T_MSG *pk_msg;
|
|
|
do {
|
do {
|
switch ( intercom ) {
|
switch ( intercom ) {
|
case NOTHING:
|
case NOTHING:
|
ercd = slp_tsk();
|
ercd = slp_tsk();
|
CYG_TEST_CHECK( E_OK == ercd, "slp_tsk (doing nothing)" );
|
CYG_TEST_CHECK( E_OK == ercd, "slp_tsk (doing nothing)" );
|
continue;
|
continue;
|
case SLP:
|
case SLP:
|
ercd = slp_tsk();
|
ercd = slp_tsk();
|
CYG_TEST_CHECK( E_OK == ercd, "slp_tsk bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "slp_tsk bad ercd" );
|
wakeups[ n ]++;
|
wakeups[ n ]++;
|
break;
|
break;
|
case SEM:
|
case SEM:
|
ercd = wai_sem( n-1 ); // 1..3 for semas
|
ercd = wai_sem( n-1 ); // 1..3 for semas
|
CYG_TEST_CHECK( E_OK == ercd, "wai_sem bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "wai_sem bad ercd" );
|
wakeups[ n ]++;
|
wakeups[ n ]++;
|
break;
|
break;
|
case FLG:
|
case FLG:
|
ercd = wai_flg( &z, n, (1<<n), TWF_CLR | TWF_ANDW );
|
ercd = wai_flg( &z, n, (1<<n), TWF_CLR | TWF_ANDW );
|
CYG_TEST_CHECK( E_OK == ercd, "wai_flg bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "wai_flg bad ercd" );
|
CYG_TEST_CHECK( z & (1<<n), "Flag bit not set" );
|
CYG_TEST_CHECK( z & (1<<n), "Flag bit not set" );
|
wakeups[ n ]++;
|
wakeups[ n ]++;
|
break;
|
break;
|
case MBX:
|
case MBX:
|
ercd = rcv_msg( &pk_msg, n );
|
ercd = rcv_msg( &pk_msg, n );
|
CYG_TEST_CHECK( E_OK == ercd, "rcv_msg bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "rcv_msg bad ercd" );
|
CYG_TEST_CHECK( pk_msg, "rcv_msg NULL msg" );
|
CYG_TEST_CHECK( pk_msg, "rcv_msg NULL msg" );
|
wakeups[ n ]++;
|
wakeups[ n ]++;
|
break;
|
break;
|
case EXIT:
|
case EXIT:
|
return;
|
return;
|
}
|
}
|
} while ( 1 );
|
} while ( 1 );
|
}
|
}
|
|
|
void task2( unsigned int arg )
|
void task2( unsigned int arg )
|
{
|
{
|
ER ercd;
|
ER ercd;
|
CYG_TEST_INFO( "Task 2 running" );
|
CYG_TEST_INFO( "Task 2 running" );
|
ercd = get_tid( &scratch );
|
ercd = get_tid( &scratch );
|
CYG_TEST_CHECK( E_OK == ercd, "get_tid bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "get_tid bad ercd" );
|
CYG_TEST_CHECK( 2 == scratch, "tid not 2" );
|
CYG_TEST_CHECK( 2 == scratch, "tid not 2" );
|
if ( 222 != arg )
|
if ( 222 != arg )
|
CYG_TEST_FAIL( "Task 2 arg not 222" );
|
CYG_TEST_FAIL( "Task 2 arg not 222" );
|
body(2);
|
body(2);
|
CYG_TEST_INFO( "Task 2 exiting" );
|
CYG_TEST_INFO( "Task 2 exiting" );
|
ext_tsk();
|
ext_tsk();
|
CYG_TEST_FAIL( "Task 2 failed to exit" );
|
CYG_TEST_FAIL( "Task 2 failed to exit" );
|
}
|
}
|
|
|
void task3( unsigned int arg )
|
void task3( unsigned int arg )
|
{
|
{
|
ER ercd;
|
ER ercd;
|
CYG_TEST_INFO("Task 3 running");
|
CYG_TEST_INFO("Task 3 running");
|
ercd = get_tid( &scratch );
|
ercd = get_tid( &scratch );
|
CYG_TEST_CHECK( E_OK == ercd, "get_tid bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "get_tid bad ercd" );
|
CYG_TEST_CHECK( 3 == scratch, "tid not 3" );
|
CYG_TEST_CHECK( 3 == scratch, "tid not 3" );
|
if ( 333 != arg )
|
if ( 333 != arg )
|
CYG_TEST_FAIL( "Task 3 arg not 333" );
|
CYG_TEST_FAIL( "Task 3 arg not 333" );
|
body(3);
|
body(3);
|
CYG_TEST_INFO( "Task 3 exiting" );
|
CYG_TEST_INFO( "Task 3 exiting" );
|
ext_tsk();
|
ext_tsk();
|
CYG_TEST_FAIL( "Task 3 failed to exit" );
|
CYG_TEST_FAIL( "Task 3 failed to exit" );
|
}
|
}
|
|
|
void task4( unsigned int arg )
|
void task4( unsigned int arg )
|
{
|
{
|
ER ercd;
|
ER ercd;
|
CYG_TEST_INFO("Task 4 running");
|
CYG_TEST_INFO("Task 4 running");
|
ercd = get_tid( &scratch );
|
ercd = get_tid( &scratch );
|
CYG_TEST_CHECK( E_OK == ercd, "get_tid bad ercd" );
|
CYG_TEST_CHECK( E_OK == ercd, "get_tid bad ercd" );
|
CYG_TEST_CHECK( 4 == scratch, "tid not 4" );
|
CYG_TEST_CHECK( 4 == scratch, "tid not 4" );
|
if ( 444 != arg )
|
if ( 444 != arg )
|
CYG_TEST_FAIL( "Task 4 arg not 444" );
|
CYG_TEST_FAIL( "Task 4 arg not 444" );
|
body(4);
|
body(4);
|
CYG_TEST_INFO( "Task 4 exiting" );
|
CYG_TEST_INFO( "Task 4 exiting" );
|
ext_tsk();
|
ext_tsk();
|
CYG_TEST_FAIL( "Task 4 failed to exit" );
|
CYG_TEST_FAIL( "Task 4 failed to exit" );
|
}
|
}
|
|
|
// ------------------------------------------------------------------------
|
// ------------------------------------------------------------------------
|
// Start of C++ aware portion, so to speak.
|
// Start of C++ aware portion, so to speak.
|
//
|
//
|
|
|
#include <cyg/hal/hal_intr.h>
|
#include <cyg/hal/hal_intr.h>
|
#include <cyg/kernel/intr.hxx>
|
#include <cyg/kernel/intr.hxx>
|
#include <cyg/kernel/clock.hxx>
|
#include <cyg/kernel/clock.hxx>
|
#include <cyg/kernel/sched.hxx>
|
#include <cyg/kernel/sched.hxx>
|
#include <cyg/kernel/sched.inl>
|
#include <cyg/kernel/sched.inl>
|
|
|
void set_interrupt_number( void )
|
void set_interrupt_number( void )
|
{
|
{
|
clock_interrupt = CYGNUM_HAL_INTERRUPT_RTC;
|
clock_interrupt = CYGNUM_HAL_INTERRUPT_RTC;
|
}
|
}
|
|
|
// This snippet stolen from kernel/.../clock.cxx to be able to detach
|
// This snippet stolen from kernel/.../clock.cxx to be able to detach
|
// the RTC from its interrupt source.
|
// the RTC from its interrupt source.
|
class Cyg_RealTimeClock
|
class Cyg_RealTimeClock
|
: public Cyg_Clock
|
: public Cyg_Clock
|
{
|
{
|
public:
|
public:
|
Cyg_Interrupt interrupt;
|
Cyg_Interrupt interrupt;
|
|
|
static cyg_uint32 isr(cyg_vector vector, CYG_ADDRWORD data);
|
static cyg_uint32 isr(cyg_vector vector, CYG_ADDRWORD data);
|
|
|
static void dsr(cyg_vector vector, cyg_ucount32 count, CYG_ADDRWORD data);
|
static void dsr(cyg_vector vector, cyg_ucount32 count, CYG_ADDRWORD data);
|
|
|
Cyg_RealTimeClock();
|
Cyg_RealTimeClock();
|
};
|
};
|
|
|
|
|
static Cyg_Interrupt uit_intr(
|
static Cyg_Interrupt uit_intr(
|
(unsigned)CYGNUM_HAL_INTERRUPT_RTC, // Vector to attach to
|
(unsigned)CYGNUM_HAL_INTERRUPT_RTC, // Vector to attach to
|
0, // Queue priority
|
0, // Queue priority
|
(unsigned)0, // Data pointer
|
(unsigned)0, // Data pointer
|
&isr_wup_tsk, // Interrupt Service Routine
|
&isr_wup_tsk, // Interrupt Service Routine
|
&cyg_uitron_dsr // Deferred Service Routine
|
&cyg_uitron_dsr // Deferred Service Routine
|
);
|
);
|
|
|
void
|
void
|
attach_isr( unsigned int (*isr)(unsigned int, unsigned int) )
|
attach_isr( unsigned int (*isr)(unsigned int, unsigned int) )
|
{
|
{
|
int inuse;
|
int inuse;
|
int old_ints;
|
int old_ints;
|
Cyg_RealTimeClock *prtc = (Cyg_RealTimeClock *)Cyg_Clock::real_time_clock;
|
Cyg_RealTimeClock *prtc = (Cyg_RealTimeClock *)Cyg_Clock::real_time_clock;
|
HAL_DISABLE_INTERRUPTS(old_ints);
|
HAL_DISABLE_INTERRUPTS(old_ints);
|
HAL_INTERRUPT_MASK( CYGNUM_HAL_INTERRUPT_RTC );
|
HAL_INTERRUPT_MASK( CYGNUM_HAL_INTERRUPT_RTC );
|
prtc->interrupt.detach();
|
prtc->interrupt.detach();
|
#ifndef CYGIMP_KERNEL_INTERRUPTS_CHAIN
|
#ifndef CYGIMP_KERNEL_INTERRUPTS_CHAIN
|
// Only check that the vector was cleared when there's a specific
|
// Only check that the vector was cleared when there's a specific
|
// vector for the RTC. In chain mode, other interrupt handlers
|
// vector for the RTC. In chain mode, other interrupt handlers
|
// may prevent the shared vector from being cleared when detaching
|
// may prevent the shared vector from being cleared when detaching
|
// the RTC ISR, and this assertion fails.
|
// the RTC ISR, and this assertion fails.
|
HAL_INTERRUPT_IN_USE( CYGNUM_HAL_INTERRUPT_RTC, inuse );
|
HAL_INTERRUPT_IN_USE( CYGNUM_HAL_INTERRUPT_RTC, inuse );
|
CYG_TEST_CHECK( !inuse, "Failed to detach clock ISR" );
|
CYG_TEST_CHECK( !inuse, "Failed to detach clock ISR" );
|
#endif
|
#endif
|
uit_intr = Cyg_Interrupt(
|
uit_intr = Cyg_Interrupt(
|
CYGNUM_HAL_INTERRUPT_RTC, // Vector to attach to
|
CYGNUM_HAL_INTERRUPT_RTC, // Vector to attach to
|
1, // Queue priority
|
1, // Queue priority
|
0, // Data pointer
|
0, // Data pointer
|
isr, // Interrupt Service Routine
|
isr, // Interrupt Service Routine
|
cyg_uitron_dsr // Deferred Service Routine
|
cyg_uitron_dsr // Deferred Service Routine
|
);
|
);
|
uit_intr.attach();
|
uit_intr.attach();
|
HAL_INTERRUPT_IN_USE( CYGNUM_HAL_INTERRUPT_RTC, inuse );
|
HAL_INTERRUPT_IN_USE( CYGNUM_HAL_INTERRUPT_RTC, inuse );
|
CYG_TEST_CHECK( inuse, "Failed to attach new ISR" );
|
CYG_TEST_CHECK( inuse, "Failed to attach new ISR" );
|
ACK_CLOCK();
|
ACK_CLOCK();
|
HAL_INTERRUPT_UNMASK( CYGNUM_HAL_INTERRUPT_RTC );
|
HAL_INTERRUPT_UNMASK( CYGNUM_HAL_INTERRUPT_RTC );
|
HAL_RESTORE_INTERRUPTS(old_ints);
|
HAL_RESTORE_INTERRUPTS(old_ints);
|
}
|
}
|
|
|
void
|
void
|
detach_isr( unsigned int (*isr)(unsigned int, unsigned int) )
|
detach_isr( unsigned int (*isr)(unsigned int, unsigned int) )
|
{
|
{
|
int inuse;
|
int inuse;
|
int old_ints;
|
int old_ints;
|
Cyg_RealTimeClock *prtc = (Cyg_RealTimeClock *)Cyg_Clock::real_time_clock;
|
Cyg_RealTimeClock *prtc = (Cyg_RealTimeClock *)Cyg_Clock::real_time_clock;
|
HAL_DISABLE_INTERRUPTS(old_ints);
|
HAL_DISABLE_INTERRUPTS(old_ints);
|
HAL_INTERRUPT_MASK( CYGNUM_HAL_INTERRUPT_RTC );
|
HAL_INTERRUPT_MASK( CYGNUM_HAL_INTERRUPT_RTC );
|
uit_intr.detach();
|
uit_intr.detach();
|
#ifndef CYGIMP_KERNEL_INTERRUPTS_CHAIN
|
#ifndef CYGIMP_KERNEL_INTERRUPTS_CHAIN
|
// See comment above in attach_isr.
|
// See comment above in attach_isr.
|
HAL_INTERRUPT_IN_USE( CYGNUM_HAL_INTERRUPT_RTC, inuse );
|
HAL_INTERRUPT_IN_USE( CYGNUM_HAL_INTERRUPT_RTC, inuse );
|
CYG_TEST_CHECK( !inuse, "Failed to detach my ISR" );
|
CYG_TEST_CHECK( !inuse, "Failed to detach my ISR" );
|
#endif
|
#endif
|
prtc->interrupt.attach();
|
prtc->interrupt.attach();
|
HAL_INTERRUPT_IN_USE( CYGNUM_HAL_INTERRUPT_RTC, inuse );
|
HAL_INTERRUPT_IN_USE( CYGNUM_HAL_INTERRUPT_RTC, inuse );
|
CYG_TEST_CHECK( inuse, "Failed to attach clock ISR" );
|
CYG_TEST_CHECK( inuse, "Failed to attach clock ISR" );
|
ACK_CLOCK();
|
ACK_CLOCK();
|
HAL_INTERRUPT_UNMASK( CYGNUM_HAL_INTERRUPT_RTC );
|
HAL_INTERRUPT_UNMASK( CYGNUM_HAL_INTERRUPT_RTC );
|
HAL_RESTORE_INTERRUPTS(old_ints);
|
HAL_RESTORE_INTERRUPTS(old_ints);
|
}
|
}
|
|
|
|
|
void
|
void
|
lock_sched( void )
|
lock_sched( void )
|
{
|
{
|
cyg_uint32 l;
|
cyg_uint32 l;
|
Cyg_Scheduler::lock();
|
Cyg_Scheduler::lock();
|
l = Cyg_Scheduler::get_sched_lock();
|
l = Cyg_Scheduler::get_sched_lock();
|
CYG_TEST_CHECK( 0 < l, "lock: Sched not locked" );
|
CYG_TEST_CHECK( 0 < l, "lock: Sched not locked" );
|
CYG_TEST_CHECK( 2 > l, "lock: Sched already locked" );
|
CYG_TEST_CHECK( 2 > l, "lock: Sched already locked" );
|
}
|
}
|
|
|
void
|
void
|
unlock_sched( void )
|
unlock_sched( void )
|
{
|
{
|
cyg_uint32 l;
|
cyg_uint32 l;
|
l = Cyg_Scheduler::get_sched_lock();
|
l = Cyg_Scheduler::get_sched_lock();
|
CYG_TEST_CHECK( 0 < l, "unlock: Sched not locked" );
|
CYG_TEST_CHECK( 0 < l, "unlock: Sched not locked" );
|
CYG_TEST_CHECK( 2 > l, "unlock: Sched already locked" );
|
CYG_TEST_CHECK( 2 > l, "unlock: Sched already locked" );
|
Cyg_Scheduler::unlock();
|
Cyg_Scheduler::unlock();
|
}
|
}
|
|
|
|
|
#else // not enough (or too many) uITRON objects configured in
|
#else // not enough (or too many) uITRON objects configured in
|
#define N_A_MSG "not enough uITRON objects to run test"
|
#define N_A_MSG "not enough uITRON objects to run test"
|
#endif // not enough (or too many) uITRON objects configured in
|
#endif // not enough (or too many) uITRON objects configured in
|
#else // not C++ and some C++ specific options enabled
|
#else // not C++ and some C++ specific options enabled
|
#define N_A_MSG "C++ specific options selected but this is C"
|
#define N_A_MSG "C++ specific options selected but this is C"
|
#endif // not C++ and some C++ specific options enabled
|
#endif // not C++ and some C++ specific options enabled
|
#else // ! CYGVAR_KERNEL_COUNTERS_CLOCK - can't test without it
|
#else // ! CYGVAR_KERNEL_COUNTERS_CLOCK - can't test without it
|
#define N_A_MSG "no CYGVAR_KERNEL_COUNTERS_CLOCK"
|
#define N_A_MSG "no CYGVAR_KERNEL_COUNTERS_CLOCK"
|
#endif // ! CYGVAR_KERNEL_COUNTERS_CLOCK - can't test without it
|
#endif // ! CYGVAR_KERNEL_COUNTERS_CLOCK - can't test without it
|
#else // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it
|
#else // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it
|
#define N_A_MSG "no CYGFUN_KERNEL_THREADS_TIMER"
|
#define N_A_MSG "no CYGFUN_KERNEL_THREADS_TIMER"
|
#endif // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it
|
#endif // ! CYGFUN_KERNEL_THREADS_TIMER - can't test without it
|
#else // ! CYGIMP_THREAD_PRIORITY - can't test without it
|
#else // ! CYGIMP_THREAD_PRIORITY - can't test without it
|
#define N_A_MSG "no CYGSEM_KERNEL_SCHED_MLQUEUE"
|
#define N_A_MSG "no CYGSEM_KERNEL_SCHED_MLQUEUE"
|
#endif // ! CYGSEM_KERNEL_SCHED_MLQUEUE - can't test without it
|
#endif // ! CYGSEM_KERNEL_SCHED_MLQUEUE - can't test without it
|
#else // ! CYGPKG_UITRON
|
#else // ! CYGPKG_UITRON
|
#define N_A_MSG "uITRON Compatibility layer disabled"
|
#define N_A_MSG "uITRON Compatibility layer disabled"
|
#endif // CYGPKG_UITRON
|
#endif // CYGPKG_UITRON
|
|
|
#ifdef N_A_MSG
|
#ifdef N_A_MSG
|
externC void
|
externC void
|
cyg_start( void )
|
cyg_start( void )
|
{
|
{
|
CYG_TEST_INIT();
|
CYG_TEST_INIT();
|
CYG_TEST_NA( N_A_MSG );
|
CYG_TEST_NA( N_A_MSG );
|
}
|
}
|
#endif // N_A_MSG defined ie. we are N/A.
|
#endif // N_A_MSG defined ie. we are N/A.
|
|
|
// EOF testintr.c
|
// EOF testintr.c
|
|
|
