/* Support file for c based tests */
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/* Support file for c based tests */
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#include "spr_defs.h"
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#include "spr_defs.h"
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#include "board.h"
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#include "board.h"
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#include "mc.h"
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#include "mc.h"
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.global _stack_top
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.global _stack_top
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.section .vectors, "ax"
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.section .vectors, "ax"
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.org 0x100
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.org 0x100
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_reset_vector:
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_reset_vector:
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l.nop
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l.nop
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l.nop
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l.nop
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l.addi r2,r0,0x0
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l.addi r2,r0,0x0
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l.addi r3,r0,0x0
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l.addi r3,r0,0x0
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l.addi r4,r0,0x0
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l.addi r4,r0,0x0
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l.addi r5,r0,0x0
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l.addi r5,r0,0x0
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l.addi r6,r0,0x0
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l.addi r6,r0,0x0
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l.addi r7,r0,0x0
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l.addi r7,r0,0x0
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l.addi r8,r0,0x0
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l.addi r8,r0,0x0
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l.addi r9,r0,0x0
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l.addi r9,r0,0x0
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l.addi r10,r0,0x0
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l.addi r10,r0,0x0
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l.addi r11,r0,0x0
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l.addi r11,r0,0x0
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l.addi r12,r0,0x0
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l.addi r12,r0,0x0
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l.addi r13,r0,0x0
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l.addi r13,r0,0x0
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l.addi r14,r0,0x0
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l.addi r14,r0,0x0
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l.addi r15,r0,0x0
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l.addi r15,r0,0x0
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l.addi r16,r0,0x0
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l.addi r16,r0,0x0
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l.addi r17,r0,0x0
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l.addi r17,r0,0x0
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l.addi r18,r0,0x0
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l.addi r18,r0,0x0
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l.addi r19,r0,0x0
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l.addi r19,r0,0x0
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l.addi r20,r0,0x0
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l.addi r20,r0,0x0
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l.addi r21,r0,0x0
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l.addi r21,r0,0x0
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l.addi r22,r0,0x0
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l.addi r22,r0,0x0
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l.addi r23,r0,0x0
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l.addi r23,r0,0x0
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l.addi r24,r0,0x0
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l.addi r24,r0,0x0
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l.addi r25,r0,0x0
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l.addi r25,r0,0x0
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l.addi r26,r0,0x0
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l.addi r26,r0,0x0
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l.addi r27,r0,0x0
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l.addi r27,r0,0x0
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l.addi r28,r0,0x0
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l.addi r28,r0,0x0
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l.addi r29,r0,0x0
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l.addi r29,r0,0x0
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l.addi r30,r0,0x0
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l.addi r30,r0,0x0
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l.addi r31,r0,0x0
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l.addi r31,r0,0x0
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l.movhi r3,hi(_start)
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l.movhi r3,hi(_start)
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l.ori r3,r3,lo(_start)
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l.ori r3,r3,lo(_start)
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l.jr r3
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l.jr r3
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l.nop
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l.nop
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.org 0x200
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.org 0x200
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_except_200:
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_except_200:
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l.nop
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l.nop
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l.addi r1,r1,-116 // free 29 words of stack (stack is r1)
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l.sw -4(r1), r3
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l.sw 0x18(r1),r9 // save register r9(return addr) to stack
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l.addi r3, r0, 0x200
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l.jal store_regs // save registers r3-r31 (except r9) to stack (r9 is changed here)
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l.sw -132(r1), r3
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l.lwz r3, -4(r1)
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l.j vPortMiscIntHandler
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l.nop
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l.nop
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l.movhi r9,hi(end_except) // set return addr to end_except instruction
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l.ori r9,r9,lo(end_except) // set return addr to end_except instruction
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l.j buserr_except
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l.nop
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.org 0x300
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.org 0x300
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_except_300:
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_except_300:
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l.nop
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l.nop
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l.addi r1,r1,-116 // free 29 words of stack (stack is r1)
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l.sw -4(r1), r3
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l.sw 0x18(r1),r9 // save register r9(return addr) to stack
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l.addi r3, r0, 0x300
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l.jal store_regs // save registers r3-r31 (except r9) to stack (r9 is changed here)
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l.sw -132(r1), r3
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l.lwz r3, -4(r1)
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l.j vPortMiscIntHandler
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l.nop
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l.nop
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l.movhi r9,hi(end_except) // set return addr to end_except instruction
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l.ori r9,r9,lo(end_except) // set return addr to end_except instruction
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l.j dpf_except
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l.nop
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.org 0x400
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.org 0x400
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_except_400:
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_except_400:
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l.nop
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l.nop
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l.addi r1,r1,-116 // free 29 words of stack (stack is r1)
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l.sw -4(r1), r3
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l.sw 0x18(r1),r9 // save register r9(return addr) to stack
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l.addi r3, r0, 0x400
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l.jal store_regs // save registers r3-r31 (except r9) to stack (r9 is changed here)
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l.sw -132(r1), r3
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l.lwz r3, -4(r1)
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l.j vPortMiscIntHandler
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l.nop
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l.nop
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l.movhi r9,hi(end_except) // set return addr to end_except instruction
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l.ori r9,r9,lo(end_except) // set return addr to end_except instruction
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l.j ipf_except
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l.nop
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.org 0x500
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.org 0x500
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_except_500:
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_except_500:
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l.nop
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l.nop
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l.j vTickHandler
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l.j vPortTickHandler
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l.nop
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l.nop
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.org 0x600
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.org 0x600
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_except_600:
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_except_600:
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l.nop
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l.nop
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l.addi r1,r1,-116 // free 29 words of stack (stack is r1)
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l.sw -4(r1), r3
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l.sw 0x18(r1),r9 // save register r9(return addr) to stack
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l.addi r3, r0, 0x600
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l.jal store_regs // save registers r3-r31 (except r9) to stack (r9 is changed here)
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l.sw -132(r1), r3
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l.lwz r3, -4(r1)
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l.j vPortMiscIntHandler
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l.nop
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l.nop
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l.movhi r9,hi(end_except) // set return addr to end_except instruction
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l.ori r9,r9,lo(end_except) // set return addr to end_except instruction
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l.j align_except
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l.nop
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.org 0x700
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.org 0x700
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_except_700:
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_except_700:
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l.nop
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l.nop
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l.addi r1,r1,-116 // free 29 words of stack (stack is r1)
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l.sw -4(r1), r3
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l.sw 0x18(r1),r9 // save register r9(return addr) to stack
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l.addi r3, r0, 0x700
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l.jal store_regs // save registers r3-r31 (except r9) to stack (r9 is changed here)
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l.sw -132(r1), r3
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l.lwz r3, -4(r1)
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l.j vPortMiscIntHandler
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l.nop
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l.nop
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l.movhi r9,hi(end_except) //set return addr to end_except instruction
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l.ori r9,r9,lo(end_except) //set return addr to end_except instruction
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l.j illegal_except
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l.nop
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.org 0x800
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.org 0x800
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_except_800:
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_except_800:
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l.nop
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l.nop
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l.addi r1,r1,-116 //free 29 words of stack (stack is r1)
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l.j vPortExtIntHandler
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l.sw 0x18(r1),r9 //save register r9(return addr) to stack
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l.jal store_regs //save registers r3-r31 (except r9) to stack (r9 is changed here)
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l.nop
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l.movhi r9,hi(end_except) //set return addr to end_except instruction
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l.ori r9,r9,lo(end_except) //set return addr to end_except instruction
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l.j ext_except //jmp to C interrupt handler (returns later to end_except)
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l.nop
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l.nop
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.org 0x900
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.org 0x900
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_except_900:
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_except_900:
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l.nop
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l.nop
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l.addi r1,r1,-116 //free 29 words of stack (stack is r1)
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l.sw -4(r1), r3
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l.sw 0x18(r1),r9 //save register r9(return addr) to stack
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l.addi r3, r0, 0x900
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l.jal store_regs //save registers r3-r31 (except r9) to stack (r9 is changed here)
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l.sw -132(r1), r3
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l.lwz r3, -4(r1)
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l.j vPortMiscIntHandler
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l.nop
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l.nop
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l.movhi r9,hi(end_except) //set return addr to end_except instruction
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l.ori r9,r9,lo(end_except) //set return addr to end_except instruction
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l.j dtlbmiss_except
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l.nop
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.org 0xa00
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.org 0xa00
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_except_a00:
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_except_a00:
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l.nop
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l.nop
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l.addi r1,r1,-116 //free 29 words of stack (stack is r1)
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l.sw -4(r1), r3
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l.sw 0x18(r1),r9 //save register r9(return addr) to stack
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l.addi r3, r0, 0xa00
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l.jal store_regs //save registers r3-r31 (except r9) to stack (r9 is changed here)
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l.sw -132(r1), r3
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l.lwz r3, -4(r1)
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l.j vPortMiscIntHandler
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l.nop
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l.nop
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l.movhi r9,hi(end_except) //set return addr to end_except instruction
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l.ori r9,r9,lo(end_except) //set return addr to end_except instruction
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l.j itlbmiss_except
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l.nop
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.org 0xb00
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.org 0xb00
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_except_b00:
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_except_b00:
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l.nop
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l.nop
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l.addi r1,r1,-116 //free 29 words of stack (stack is r1)
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l.sw -4(r1), r3
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l.sw 0x18(r1),r9 //save register r9(return addr) to stack
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l.addi r3, r0, 0xb00
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l.jal store_regs //save registers r3-r31 (except r9) to stack (r9 is changed here)
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l.sw -132(r1), r3
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l.lwz r3, -4(r1)
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l.j vPortMiscIntHandler
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l.nop
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l.nop
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l.movhi r9,hi(end_except) //set return addr to end_except instruction
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l.ori r9,r9,lo(end_except) //set return addr to end_except instruction
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l.j range_except
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l.nop
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.org 0xc00
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.org 0xc00
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_except_c00:
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_except_c00:
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.global PortCC
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.global vPortSystemCall
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l.nop
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l.sfeqi r11, 0x0FCC
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l.bnf 1f
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l.nop
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l.nop
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l.j PortCC
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l.j vPortSystemCall
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l.nop
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l.nop
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1:
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l.addi r1, r1, 4 //FIXME
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l.addi r1,r1,-116 //free 29 words of stack (stack is r1), FIXME comment
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l.sw -0x8(r1), r11
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l.lwz r11, 112(r1)
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l.sw 0x18(r1),r9 //save register r9(return addr) to stack
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l.jal store_regs //save registers r3-r31 (except r9) to stack (r9 is changed here)
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l.nop
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l.lwz r3, -0x8(r1)
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l.movhi r9,hi(end_except) //set return addr to end_except instruction
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l.ori r9,r9,lo(end_except) //set return addr to end_except instruction
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l.j syscall_except
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l.nop
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.org 0xd00
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.org 0xd00
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_except_d00:
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_except_d00:
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l.nop
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l.nop
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l.addi r1,r1,-116 //free 29 words of stack (stack is r1)
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l.sw -4(r1), r3
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l.sw 0x18(r1),r9 //save register r9(return addr) to stack
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l.addi r3, r0, 0xd00
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l.jal store_regs //save registers r3-r31 (except r9) to stack (r9 is changed here)
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l.sw -132(r1), r3
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l.lwz r3, -4(r1)
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l.j vPortMiscIntHandler
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l.nop
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l.nop
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l.movhi r9,hi(end_except) //set return addr to end_except instruction
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l.ori r9,r9,lo(end_except) //set return addr to end_except instruction
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l.j res1_except
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l.nop
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.org 0xe00
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.org 0xe00
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_except_e00:
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_except_e00:
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l.nop
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l.nop
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l.addi r1,r1,-116 //free 29 words of stack (stack is r1)
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l.sw -4(r1), r3
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l.sw 0x18(r1),r9 //save register r9(return addr) to stack
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l.addi r3, r0, 0xe00
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l.jal store_regs //save registers r3-r31 (except r9) to stack (r9 is changed here)
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l.sw -132(r1), r3
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l.lwz r3, -4(r1)
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l.j vPortMiscIntHandler
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l.nop
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l.nop
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l.movhi r9,hi(end_except) //set return addr to end_except instruction
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l.ori r9,r9,lo(end_except) //set return addr to end_except instruction
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l.j trap_except
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l.nop
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.org 0xf00
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.org 0xf00
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_except_f00:
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_except_f00:
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l.nop
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l.nop
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l.addi r1,r1,-116 //free 29 words of stack (stack is r1)
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l.sw -4(r1), r3
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l.sw 0x18(r1),r9 //save register r9(return addr) to stack
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l.addi r3, r0, 0xf00
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l.jal store_regs //save registers r3-r31 (except r9) to stack (r9 is changed here)
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l.sw -132(r1), r3
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l.nop
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l.lwz r3, -4(r1)
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l.j vPortMiscIntHandler
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l.movhi r9,hi(end_except) //set return addr to end_except instruction
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l.ori r9,r9,lo(end_except) //set return addr to end_except instruction
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l.j res2_except
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l.nop
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store_regs: //save registers r3-r31 (except r9) to stack
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l.sw 0x00(r1),r3
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l.sw 0x04(r1),r4
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l.sw 0x08(r1),r5
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l.sw 0x0c(r1),r6
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l.sw 0x10(r1),r7
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l.sw 0x14(r1),r8
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l.sw 0x1c(r1),r10
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l.sw 0x20(r1),r11
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l.sw 0x24(r1),r12
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l.sw 0x28(r1),r13
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l.sw 0x2c(r1),r14
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l.sw 0x30(r1),r15
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l.sw 0x34(r1),r16
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l.sw 0x38(r1),r17
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l.sw 0x3c(r1),r18
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l.sw 0x40(r1),r19
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l.sw 0x44(r1),r20
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l.sw 0x48(r1),r21
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l.sw 0x4c(r1),r22
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l.sw 0x50(r1),r23
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l.sw 0x54(r1),r24
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l.sw 0x58(r1),r25
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l.sw 0x5c(r1),r26
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l.sw 0x60(r1),r27
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l.sw 0x64(r1),r28
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l.sw 0x68(r1),r29
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l.sw 0x6c(r1),r30
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l.sw 0x70(r1),r31
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l.jr r9
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l.nop
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end_except: //load back registers from stack r3-r31
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l.lwz r3,0x00(r1)
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l.lwz r4,0x04(r1)
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l.lwz r5,0x08(r1)
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l.lwz r6,0x0c(r1)
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l.lwz r7,0x10(r1)
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l.lwz r8,0x14(r1)
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l.lwz r9,0x18(r1)
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l.lwz r10,0x1c(r1)
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l.lwz r11,0x20(r1)
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l.lwz r12,0x24(r1)
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l.lwz r13,0x28(r1)
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l.lwz r14,0x2c(r1)
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l.lwz r15,0x30(r1)
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l.lwz r16,0x34(r1)
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l.lwz r17,0x38(r1)
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l.lwz r18,0x3c(r1)
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l.lwz r19,0x40(r1)
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l.lwz r20,0x44(r1)
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l.lwz r21,0x48(r1)
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l.lwz r22,0x4c(r1)
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l.lwz r23,0x50(r1)
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l.lwz r24,0x54(r1)
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l.lwz r25,0x58(r1)
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l.lwz r26,0x5c(r1)
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l.lwz r27,0x60(r1)
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l.lwz r28,0x64(r1)
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l.lwz r29,0x68(r1)
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l.lwz r30,0x6c(r1)
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l.lwz r31,0x70(r1)
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l.addi r1,r1,116 //free stack places
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l.rfe //recover SR register and prior PC (jumps back to program)
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l.nop
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l.nop
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.section .text
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.section .text
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_start:
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_start:
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.if IC | DC
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.if IC | DC
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/* Flush IC and/or DC */
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/* Flush IC and/or DC */
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l.addi r10,r0,0
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l.addi r10,r0,0
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l.addi r11,r0,0
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l.addi r11,r0,0
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l.addi r12,r0,0
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l.addi r12,r0,0
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.if IC
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.if IC
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l.addi r11,r0,IC_SIZE
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l.addi r11,r0,IC_SIZE
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.endif
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.endif
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.if DC
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.if DC
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l.addi r12,r0,DC_SIZE
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l.addi r12,r0,DC_SIZE
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.endif
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.endif
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l.sfleu r12,r11
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l.sfleu r12,r11
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l.bf loop
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l.bf loop
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l.nop
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l.nop
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l.add r11,r0,r12
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l.add r11,r0,r12
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loop:
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loop:
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.if IC
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.if IC
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l.mtspr r0,r10,SPR_ICBIR
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l.mtspr r0,r10,SPR_ICBIR
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.endif
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.endif
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.if DC
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.if DC
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l.mtspr r0,r10,SPR_DCBIR
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l.mtspr r0,r10,SPR_DCBIR
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.endif
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.endif
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l.sfne r10,r11
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l.sfne r10,r11
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l.bf loop
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l.bf loop
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l.addi r10,r10,16
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l.addi r10,r10,16
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|
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/* Enable IC and/or DC */
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/* Enable IC and/or DC */
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l.addi r10,r0,(SPR_SR_SM)
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l.addi r10,r0,(SPR_SR_SM)
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.if IC
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.if IC
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l.ori r10,r10,(SPR_SR_ICE)
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l.ori r10,r10,(SPR_SR_ICE)
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.endif
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.endif
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.if DC
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.if DC
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l.ori r10,r10,(SPR_SR_DCE)
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l.ori r10,r10,(SPR_SR_DCE)
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.endif
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.endif
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l.mtspr r0,r10,SPR_SR
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l.mtspr r0,r10,SPR_SR
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l.nop
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l.nop
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l.nop
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l.nop
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l.nop
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l.nop
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l.nop
|
l.nop
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l.nop
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l.nop
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.endif
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.endif
|
|
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/* Set stack pointer */
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/* Set stack pointer */
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l.movhi r1, hi(_stack_top)
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l.movhi r1, hi(_stack_top)
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l.ori r1, r1, lo(_stack_top)
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l.ori r1, r1, lo(_stack_top)
|
|
|
/* clear BSS */
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/* clear BSS */
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l.movhi r2, hi(_bss_beg)
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l.movhi r2, hi(_bss_beg)
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l.ori r2, r2, lo(_bss_beg)
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l.ori r2, r2, lo(_bss_beg)
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l.movhi r3, hi(_bss_end)
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l.movhi r3, hi(_bss_end)
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l.ori r3, r2, lo(_bss_end)
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l.ori r3, r2, lo(_bss_end)
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1:
|
1:
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l.sfeq r2, r3
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l.sfeq r2, r3
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l.bf __main
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l.bf __main
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l.noP
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l.nop
|
|
|
l.sw 0x0(r2), r0
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l.sw 0x0(r2), r0
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l.addi r2, r2, 0x4
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l.addi r2, r2, 0x4
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l.j 1b
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l.j 1b
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l.nop
|
l.nop
|
|
|
/* Jump to main */
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/* Jump to main */
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__main:
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__main:
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l.movhi r2,hi(_main)
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l.movhi r2, hi(_main)
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l.ori r2,r2,lo(_main)
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l.ori r2, r2, lo(_main)
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l.jr r2
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l.jr r2
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l.nop
|
l.nop
|
|
|