/* timer_isr()
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/* timer_isr()
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*
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*
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* This routine initializes the Z8536 timer on the SQSIO4 SQUALL
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* This routine initializes the Z8536 timer on the SQSIO4 SQUALL
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* board for the CVME961 board. The timer is setup to provide a
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* board for the CVME961 board. The timer is setup to provide a
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* tick every 0x10000 / 2 milliseconds. This is used to time
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* tick every 0x10000 / 2 milliseconds. This is used to time
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* executing code.
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* executing code.
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*
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*
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* Input parameters: NONE
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* Input parameters: NONE
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*
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*
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* Output parameters: NONE
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* Output parameters: NONE
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*
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*
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* COPYRIGHT (c) 1989-1997.
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* COPYRIGHT (c) 1989-1997.
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* On-Line Applications Research Corporation (OAR).
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* On-Line Applications Research Corporation (OAR).
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* Copyright assigned to U.S. Government, 1994.
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* Copyright assigned to U.S. Government, 1994.
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*
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*
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* The license and distribution terms for this file may in
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* The license and distribution terms for this file may in
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* the file LICENSE in this distribution or at
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* the file LICENSE in this distribution or at
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* http://www.OARcorp.com/rtems/license.html.
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* http://www.OARcorp.com/rtems/license.html.
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*
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*
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* $Id: timerisr.S,v 1.2 2001-09-27 12:00:00 chris Exp $
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* $Id: timerisr.S,v 1.2 2001-09-27 12:00:00 chris Exp $
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*/
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*/
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#include "asm.h"
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#include "asm.h"
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.set PORT_A, 0xc00000a8 # port A
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.set PORT_A, 0xc00000a8 # port A
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.set PORT_B, 0xc00000a4 # port B
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.set PORT_B, 0xc00000a4 # port B
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.set PORT_C, 0xc00000a0 # port C
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.set PORT_C, 0xc00000a0 # port C
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.set CTL_PORT, 0xc00000ac # control port
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.set CTL_PORT, 0xc00000ac # control port
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.set T1CSR, 0x0a # T1 command/status reg
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.set T1CSR, 0x0a # T1 command/status reg
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.set RELOAD, 0x24 # clr IP & IUS,allow countdown
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.set RELOAD, 0x24 # clr IP & IUS,allow countdown
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/*
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/*
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* Duplicating this symbol is stupid but eliminates
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* Duplicating this symbol is stupid but eliminates
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* toolset variation problems.
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* toolset variation problems.
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*/
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*/
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PUBLIC(timerisr)
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PUBLIC(timerisr)
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PUBLIC(_timerisr)
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PUBLIC(_timerisr)
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SYM (timerisr):
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SYM (timerisr):
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SYM (_timerisr):
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SYM (_timerisr):
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#ldconst 1,r4
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#ldconst 1,r4
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#modpc 0,r4,r4 # enable tracing
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#modpc 0,r4,r4 # enable tracing
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ld _Ttimer_val,r6 # r6 = test timer
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ld _Ttimer_val,r6 # r6 = test timer
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ldconst T1CSR,r4 # r4 = T1 control status reg
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ldconst T1CSR,r4 # r4 = T1 control status reg
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stob r4,CTL_PORT # select T1CSR
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stob r4,CTL_PORT # select T1CSR
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ldconst RELOAD,r5 # r5 = reset value
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ldconst RELOAD,r5 # r5 = reset value
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stob r5,CTL_PORT # reset countdown
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stob r5,CTL_PORT # reset countdown
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addo 1,r6,r6
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addo 1,r6,r6
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st r6,_Ttimer_val # increment test timer
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st r6,_Ttimer_val # increment test timer
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loop_til_cleared:
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loop_til_cleared:
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/* clrbit 4,sf0,sf0 XXX JRS */
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/* clrbit 4,sf0,sf0 XXX JRS */
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/* bbs 4,sf0,loop_til_cleared XXX JRS */
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/* bbs 4,sf0,loop_til_cleared XXX JRS */
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leaf: ret
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leaf: ret
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.leafproc _flush_reg, flush_reg.lf
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.leafproc _flush_reg, flush_reg.lf
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.globl _flush_reg, flush_reg.lf
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.globl _flush_reg, flush_reg.lf
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_flush_reg:
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_flush_reg:
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lda leaf,g14 # g14 = exit address
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lda leaf,g14 # g14 = exit address
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flush_reg.lf:
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flush_reg.lf:
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flushreg
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flushreg
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mov g14,g0 # g0 = exit address
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mov g14,g0 # g0 = exit address
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ldconst 0,g14 # set g14 for non-leaf
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ldconst 0,g14 # set g14 for non-leaf
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bx (g0)
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bx (g0)
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