/*
|
/*
|
* This file contains directives for the GNU linker which are specific
|
* This file contains directives for the GNU linker which are specific
|
* to the helas-403
|
* to the helas-403
|
* This file is intended to be used together with flashentry.s
|
* This file is intended to be used together with flashentry.s
|
* it will generate a ROM that can be started directly after powerup reset
|
* it will generate a ROM that can be started directly after powerup reset
|
* $Id: linkcmds,v 1.2 2001-09-27 12:00:36 chris Exp $
|
* $Id: linkcmds,v 1.2 2001-09-27 12:00:36 chris Exp $
|
*/
|
*/
|
|
|
OUTPUT_FORMAT("elf32-powerpc", "elf32-powerpc",
|
OUTPUT_FORMAT("elf32-powerpc", "elf32-powerpc",
|
"elf32-powerpc")
|
"elf32-powerpc")
|
OUTPUT_ARCH(powerpc)
|
OUTPUT_ARCH(powerpc)
|
SEARCH_DIR(/usr/local/powerpc-rtems/lib);
|
SEARCH_DIR(/usr/local/powerpc-rtems/lib);
|
|
|
ENTRY(flash_entry)
|
ENTRY(flash_entry)
|
|
|
MEMORY
|
MEMORY
|
{
|
{
|
RAM : ORIGIN = 0, LENGTH = 8M
|
RAM : ORIGIN = 0, LENGTH = 8M
|
FLASH : ORIGIN = 0xFFF00000, LENGTH = 512K
|
FLASH : ORIGIN = 0xFFF00000, LENGTH = 512K
|
}
|
}
|
|
|
/* DIRTY TRICK: repeat addresses here, so we can work with them... */
|
/* DIRTY TRICK: repeat addresses here, so we can work with them... */
|
flash.start = 0xFFF00000;
|
flash.start = 0xFFF00000;
|
flash.size = 512K;
|
flash.size = 512K;
|
|
|
SECTIONS
|
SECTIONS
|
{
|
{
|
.entry :
|
.entry :
|
{
|
{
|
*(.entry)
|
*(.entry)
|
} > FLASH /* this is ROM for flash_entry */
|
} > FLASH /* this is ROM for flash_entry */
|
.text :
|
.text :
|
{
|
{
|
text.start = . ;
|
text.start = . ;
|
*(.entry2)
|
*(.entry2)
|
*(.text)
|
*(.text)
|
*(.rodata)
|
*(.rodata)
|
*(.rodata1)
|
*(.rodata1)
|
*(.descriptors)
|
*(.descriptors)
|
*(rom_ver)
|
*(rom_ver)
|
etext = ALIGN(0x10);
|
etext = ALIGN(0x10);
|
_etext = .;
|
_etext = .;
|
|
|
|
|
__CTOR_LIST__ = .;
|
__CTOR_LIST__ = .;
|
LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2)
|
LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2)
|
*(.ctors)
|
*(.ctors)
|
LONG(0)
|
LONG(0)
|
__CTOR_END__ = .;
|
__CTOR_END__ = .;
|
|
|
__DTOR_LIST__ = .;
|
__DTOR_LIST__ = .;
|
LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2)
|
LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2)
|
*(.dtors)
|
*(.dtors)
|
LONG(0)
|
LONG(0)
|
__DTOR_END__ = .;
|
__DTOR_END__ = .;
|
|
|
*(.lit)
|
*(.lit)
|
*(.shdata)
|
*(.shdata)
|
*(.init)
|
*(.init)
|
*(.fini)
|
*(.fini)
|
. = ALIGN(0x10);
|
. = ALIGN(0x10);
|
_endtext = .;
|
_endtext = .;
|
text.end = .;
|
text.end = .;
|
copy.src = .;
|
copy.src = .;
|
copy.tmptop.txt = .;
|
copy.tmptop.txt = .;
|
} > FLASH /* this is ROM for flash_entry */
|
} > FLASH /* this is ROM for flash_entry */
|
|
|
text.size = text.end - text.start;
|
text.size = text.end - text.start;
|
|
|
/* R/W Data */
|
/* R/W Data */
|
/* place vectors to start at offset 0x100... */
|
/* place vectors to start at offset 0x100... */
|
/* IMPORTANT: sections ".fill" and ".vectors" must be the first in RAM!!*/
|
/* IMPORTANT: sections ".fill" and ".vectors" must be the first in RAM!!*/
|
.fill 0x00010000 :
|
.fill 0x00010000 :
|
{
|
{
|
. = . + 0x0100;
|
. = . + 0x0100;
|
} > RAM
|
} > RAM
|
|
|
.vectors : AT (copy.src)
|
.vectors : AT (copy.src)
|
{
|
{
|
copy.dest = .;
|
copy.dest = .;
|
*(.vectors)
|
*(.vectors)
|
. = ALIGN(0x10);
|
. = ALIGN(0x10);
|
copy.tmptop.vec = .;
|
copy.tmptop.vec = .;
|
} > RAM
|
} > RAM
|
|
|
.data : AT (copy.tmptop.vec - copy.dest + copy.src)
|
.data : AT (copy.tmptop.vec - copy.dest + copy.src)
|
{
|
{
|
*(.data)
|
*(.data)
|
*(.data1)
|
*(.data1)
|
PROVIDE (__SDATA_START__ = .);
|
PROVIDE (__SDATA_START__ = .);
|
*(.sdata)
|
*(.sdata)
|
. = ALIGN(0x10);
|
. = ALIGN(0x10);
|
copy.tmptop.dat = .;
|
copy.tmptop.dat = .;
|
} > RAM
|
} > RAM
|
|
|
PROVIDE (__EXCEPT_START__ = .);
|
PROVIDE (__EXCEPT_START__ = .);
|
.gcc_except_table : AT (copy.tmptop.dat - copy.dest + copy.src)
|
.gcc_except_table : AT (copy.tmptop.dat - copy.dest + copy.src)
|
{
|
{
|
*(.gcc_except_table)
|
*(.gcc_except_table)
|
. = ALIGN(0x10);
|
. = ALIGN(0x10);
|
copy.tmptop.exc = .;
|
copy.tmptop.exc = .;
|
} >RAM
|
} >RAM
|
PROVIDE (__EXCEPT_END__ = .);
|
PROVIDE (__EXCEPT_END__ = .);
|
|
|
__GOT_START__ = .;
|
__GOT_START__ = .;
|
.got : AT (copy.tmptop.exc - copy.dest + copy.src)
|
.got : AT (copy.tmptop.exc - copy.dest + copy.src)
|
{
|
{
|
s.got = .;
|
s.got = .;
|
*(.got.plt) *(.got)
|
*(.got.plt) *(.got)
|
. = ALIGN(0x10);
|
. = ALIGN(0x10);
|
copy.tmptop.got = .;
|
copy.tmptop.got = .;
|
} > RAM
|
} > RAM
|
__GOT_END__ = .;
|
__GOT_END__ = .;
|
|
|
.got1 : AT (copy.tmptop.got - copy.dest + copy.src)
|
.got1 : AT (copy.tmptop.got - copy.dest + copy.src)
|
{
|
{
|
*(.got1)
|
*(.got1)
|
. = ALIGN(0x10);
|
. = ALIGN(0x10);
|
copy.tmptop.gt1 = .;
|
copy.tmptop.gt1 = .;
|
} >RAM
|
} >RAM
|
|
|
PROVIDE (__GOT2_START__ = .);
|
PROVIDE (__GOT2_START__ = .);
|
PROVIDE (_GOT2_START_ = .);
|
PROVIDE (_GOT2_START_ = .);
|
.got2 : AT (copy.tmptop.gt1 - copy.dest + copy.src)
|
.got2 : AT (copy.tmptop.gt1 - copy.dest + copy.src)
|
{
|
{
|
*(.got2)
|
*(.got2)
|
. = ALIGN(0x10);
|
. = ALIGN(0x10);
|
copy.tmptop.gt2 = .;
|
copy.tmptop.gt2 = .;
|
} >RAM
|
} >RAM
|
PROVIDE (__GOT2_END__ = .);
|
PROVIDE (__GOT2_END__ = .);
|
PROVIDE (_GOT2_END_ = .);
|
PROVIDE (_GOT2_END_ = .);
|
|
|
PROVIDE (__FIXUP_START__ = .);
|
PROVIDE (__FIXUP_START__ = .);
|
PROVIDE (_FIXUP_START_ = .);
|
PROVIDE (_FIXUP_START_ = .);
|
.fixup : AT (copy.tmptop.gt2 - copy.dest + copy.src)
|
.fixup : AT (copy.tmptop.gt2 - copy.dest + copy.src)
|
{
|
{
|
*(.fixup)
|
*(.fixup)
|
. = ALIGN(0x10);
|
. = ALIGN(0x10);
|
copy.tmptop.fix = .;
|
copy.tmptop.fix = .;
|
} >RAM
|
} >RAM
|
PROVIDE (_FIXUP_END_ = .);
|
PROVIDE (_FIXUP_END_ = .);
|
PROVIDE (__FIXUP_END__ = .);
|
PROVIDE (__FIXUP_END__ = .);
|
|
|
PROVIDE (__SDATA2_START__ = .);
|
PROVIDE (__SDATA2_START__ = .);
|
.sdata2 : AT (copy.tmptop.fix - copy.dest + copy.src)
|
.sdata2 : AT (copy.tmptop.fix - copy.dest + copy.src)
|
{
|
{
|
*(.sdata2)
|
*(.sdata2)
|
. = ALIGN(0x10);
|
. = ALIGN(0x10);
|
copy.tmptop.sda = .;
|
copy.tmptop.sda = .;
|
} >RAM
|
} >RAM
|
|
|
copy.size = copy.tmptop.sda - copy.dest;
|
copy.size = copy.tmptop.sda - copy.dest;
|
|
|
.sbss2 :
|
.sbss2 :
|
{
|
{
|
*(.sbss2)
|
*(.sbss2)
|
} >RAM
|
} >RAM
|
PROVIDE (__SBSS2_END__ = .);
|
PROVIDE (__SBSS2_END__ = .);
|
|
|
__SBSS_START__ = .;
|
__SBSS_START__ = .;
|
.bss :
|
.bss :
|
{
|
{
|
bss.start = .;
|
bss.start = .;
|
*(.bss) *(.sbss) *(COMMON)
|
*(.bss) *(.sbss) *(COMMON)
|
bss.end = ALIGN(4);
|
bss.end = ALIGN(4);
|
} > RAM
|
} > RAM
|
__SBSS_END__ = .;
|
__SBSS_END__ = .;
|
|
|
bss.size = bss.end - bss.start;
|
bss.size = bss.end - bss.start;
|
|
|
/* reserve 16KByte for stack... */
|
/* reserve 16KByte for stack... */
|
stack.end = bss.end + 16K;
|
stack.end = bss.end + 16K;
|
PROVIDE(_end = stack.end);
|
PROVIDE(_end = stack.end);
|
|
|
.line 0 : { *(.line) }
|
.line 0 : { *(.line) }
|
.debug 0 : { *(.debug) }
|
.debug 0 : { *(.debug) }
|
.debug_sfnames 0 : { *(.debug_sfnames) }
|
.debug_sfnames 0 : { *(.debug_sfnames) }
|
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
.debug_pubnames 0 : { *(.debug_pubnames) }
|
.debug_pubnames 0 : { *(.debug_pubnames) }
|
.debug_aranges 0 : { *(.debug_aranges) }
|
.debug_aranges 0 : { *(.debug_aranges) }
|
.debug_aregion 0 : { *(.debug_aregion) }
|
.debug_aregion 0 : { *(.debug_aregion) }
|
.debug_macinfo 0 : { *(.debug_macinfo) }
|
.debug_macinfo 0 : { *(.debug_macinfo) }
|
.stab 0 : { *(.stab) }
|
.stab 0 : { *(.stab) }
|
.stabstr 0 : { *(.stabstr) }
|
.stabstr 0 : { *(.stabstr) }
|
|
|
/*
|
/*
|
* place reset instruction into last word of FLASH
|
* place reset instruction into last word of FLASH
|
* NOTE: after reset, PPC403 starts executing from address
|
* NOTE: after reset, PPC403 starts executing from address
|
* 0xFFFFFFFC
|
* 0xFFFFFFFC
|
* The reset section is placed in ROM at 0xF7FFFFFC instead,
|
* The reset section is placed in ROM at 0xF7FFFFFC instead,
|
* but a mirror of this address exists at 0xFFFFFFFC due to
|
* but a mirror of this address exists at 0xFFFFFFFC due to
|
* the initial memory controller setup
|
* the initial memory controller setup
|
*/
|
*/
|
.reset flash.start - 4 + flash.size :
|
.reset flash.start - 4 + flash.size :
|
{
|
{
|
*(.reset)
|
*(.reset)
|
} > FLASH
|
} > FLASH
|
}
|
}
|
|
|
|
|
|
|