URL
https://opencores.org/ocsvn/or1200_soc/or1200_soc/trunk
Only display areas with differences |
Details |
Blame |
View Log
Rev 21 |
Rev 22 |
//
|
//
|
//
|
//
|
//
|
//
|
|
|
#include "de1_or1200.h"
|
#include "de1_or1200.h"
|
#include "serial.h"
|
#include "serial.h"
|
|
|
|
|
//
|
//
|
// use 57600 baud
|
// use 57600 baud
|
|
|
void init_serial( void )
|
void init_serial( void )
|
{
|
{
|
REG8(0x50000003) = 0x83;
|
REG8(0x50000003) = 0x83;
|
REG8(0x50000001) = 0x00;
|
REG8(0x50000001) = 0x00;
|
// REG8(0x50000000) = 0x06;
|
// REG8(0x50000000) = 0x06;
|
REG8(0x50000000) = 0x1a; // 57600 baud w/ clk=24MHz
|
REG8(0x50000000) = 0x1a; // 57600 baud w/ clk=24MHz
|
// REG8(0x50000000) = 0x2b; // 57600 baud w/ clk=40MHz
|
// REG8(0x50000000) = 0x2b; // 57600 baud w/ clk=40MHz
|
REG8(0x50000003) = 0x03;
|
REG8(0x50000003) = 0x03;
|
REG8(0x50000002) = 0x01;
|
REG8(0x50000002) = 0x01;
|
|
|
}
|
}
|
|
|
void NS16550_putc( char c )
|
void NS16550_putc( char c )
|
{
|
{
|
while ( (LSR_BASE & LSR_THRE) == 0);
|
while ( (LSR_BASE & LSR_THRE) == 0);
|
THR_BASE = c;
|
THR_BASE = c;
|
}
|
}
|
|
|
|
|
int puts( char *s )
|
int puts( char *s )
|
{
|
{
|
while (*s) {
|
while (*s) {
|
NS16550_putc (*s++);
|
NS16550_putc (*s++);
|
}
|
}
|
}
|
}
|
|
|
|
|
|
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.