/*
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/*
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* Copyright (c) 1999 Greg Haerr <greg@censoft.com>
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* Copyright (c) 1999 Greg Haerr <greg@censoft.com>
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* Copyright (c) 1991 David I. Bell
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* Copyright (c) 1991 David I. Bell
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* Permission is granted to use, distribute, or modify this source,
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* Permission is granted to use, distribute, or modify this source,
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* provided that this copyright notice remains intact.
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* provided that this copyright notice remains intact.
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*
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*
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* Alternate EGA/VGA Screen Driver Init, direct hw programming
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* Alternate EGA/VGA Screen Driver Init, direct hw programming
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*/
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*/
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#include "device.h"
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#include "device.h"
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#include "vgaplan4.h"
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#include "vgaplan4.h"
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#ifdef __rtems__
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#ifdef __rtems__
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#define ROMFONT 0 /* =0 no bios rom fonts available*/
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#define ROMFONT 0 /* =0 no bios rom fonts available*/
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#else
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#else
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#define ROMFONT 1 /* =1 uses PC rom fonts */
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#define ROMFONT 1 /* =1 uses PC rom fonts */
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#endif
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#endif
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/* Define one and only one of the following to be nonzero*/
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/* Define one and only one of the following to be nonzero*/
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#define VGA_ET4000 0 /* TSENG LABS ET4000 chip 800x600*/
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#define VGA_ET4000 0 /* TSENG LABS ET4000 chip 800x600*/
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#define VGA_STANDARD 1 /* standard VGA 640x480*/
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#define VGA_STANDARD 1 /* standard VGA 640x480*/
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#define EGA_STANDARD 0 /* standard EGA 640x350*/
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#define EGA_STANDARD 0 /* standard EGA 640x350*/
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#define DONE 0
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#define DONE 0
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#define IN 1
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#define IN 1
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#define OUT 2
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#define OUT 2
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#define RAM_SCAN_LINES 32 /* number of scan lines in fonts in RAM */
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#define RAM_SCAN_LINES 32 /* number of scan lines in fonts in RAM */
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#define FONT_CHARS 256 /* number of characters in font tables */
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#define FONT_CHARS 256 /* number of characters in font tables */
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#define CHAR_WIDTH 8 /* number of pixels for character width */
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#define CHAR_WIDTH 8 /* number of pixels for character width */
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#define PALREG 0x3c0
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#define PALREG 0x3c0
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#define SEQREG 0x3c4
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#define SEQREG 0x3c4
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#define SEQVAL 0x3c5
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#define SEQVAL 0x3c5
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#define GRREG 0x3ce
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#define GRREG 0x3ce
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#define GRVAL 0x3cf
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#define GRVAL 0x3cf
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#define ATTRREG 0x3da
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#define ATTRREG 0x3da
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#define CRTCREG 0x3d4
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#define CRTCREG 0x3d4
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#define CRTCVAL 0x3d5
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#define CRTCVAL 0x3d5
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#define GENREG1 0x3c2
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#define GENREG1 0x3c2
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#define GENREG2 0x3cc
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#define GENREG2 0x3cc
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#define GENREG3 0x3ca
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#define GENREG3 0x3ca
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#define DATA_ROTATE 3 /* register number for data rotate */
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#define DATA_ROTATE 3 /* register number for data rotate */
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typedef struct {
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typedef struct {
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int action;
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int action;
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int port1;
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int port1;
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int data1;
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int data1;
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int port2;
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int port2;
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int data2;
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int data2;
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} REGIO;
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} REGIO;
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/* extern data*/
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/* extern data*/
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#if ROMFONT
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#if ROMFONT
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extern FARADDR rom_char_addr; /* address of ROM font*/
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extern FARADDR rom_char_addr; /* address of ROM font*/
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extern int ROM_CHAR_HEIGHT; /* ROM character height*/
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extern int ROM_CHAR_HEIGHT; /* ROM character height*/
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#endif
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#endif
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/* local data*/
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/* local data*/
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extern REGIO graphics_on[];
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extern REGIO graphics_on[];
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extern REGIO graph_off[];
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extern REGIO graph_off[];
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/* entry points*/
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/* entry points*/
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void ega_hwinit(void);
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void ega_hwinit(void);
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void ega_hwterm(void);
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void ega_hwterm(void);
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/* local routines*/
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/* local routines*/
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static void writeregs(REGIO *rp);
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static void writeregs(REGIO *rp);
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static void out_word(unsigned int p,unsigned int d);
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static void out_word(unsigned int p,unsigned int d);
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static void setmode(int mode);
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static void setmode(int mode);
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void
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void
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ega_hwinit(void)
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ega_hwinit(void)
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{
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{
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writeregs(graphics_on);
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writeregs(graphics_on);
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}
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}
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void
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void
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ega_hwterm(void)
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ega_hwterm(void)
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{
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{
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setmode(MWMODE_COPY);
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setmode(MWMODE_COPY);
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/* Copy character table from ROM back into bit plane 2 before turning
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/* Copy character table from ROM back into bit plane 2 before turning
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* off graphics.
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* off graphics.
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*/
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*/
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out_word(SEQREG, 0x0100); /* syn reset */
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out_word(SEQREG, 0x0100); /* syn reset */
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out_word(SEQREG, 0x0402); /* cpu writes only to map 2 */
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out_word(SEQREG, 0x0402); /* cpu writes only to map 2 */
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out_word(SEQREG, 0x0704); /* sequential addressing */
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out_word(SEQREG, 0x0704); /* sequential addressing */
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out_word(SEQREG, 0x0300); /* clear synchronous reset */
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out_word(SEQREG, 0x0300); /* clear synchronous reset */
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out_word(GRREG, 0x0204); /* select map 2 for CPU reads */
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out_word(GRREG, 0x0204); /* select map 2 for CPU reads */
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out_word(GRREG, 0x0005); /* disable odd-even addressing */
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out_word(GRREG, 0x0005); /* disable odd-even addressing */
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#if ROMFONT
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#if ROMFONT
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{
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{
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FARADDR srcoffset;
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FARADDR srcoffset;
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FARADDR destoffset;
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FARADDR destoffset;
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int data;
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int data;
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int ch;
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int ch;
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int row;
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int row;
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srcoffset = rom_char_addr;
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srcoffset = rom_char_addr;
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destoffset = EGA_BASE;
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destoffset = EGA_BASE;
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for (ch = 0; ch < FONT_CHARS; ch++) {
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for (ch = 0; ch < FONT_CHARS; ch++) {
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for(row = 0; row < ROM_CHAR_HEIGHT; row++) {
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for(row = 0; row < ROM_CHAR_HEIGHT; row++) {
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data = GETBYTE_FP(srcoffset++);
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data = GETBYTE_FP(srcoffset++);
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PUTBYTE_FP(destoffset++, data);
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PUTBYTE_FP(destoffset++, data);
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}
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}
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destoffset += (RAM_SCAN_LINES - ROM_CHAR_HEIGHT);
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destoffset += (RAM_SCAN_LINES - ROM_CHAR_HEIGHT);
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}
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}
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}
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}
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#endif
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#endif
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/* Finally set the registers back for text mode. */
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/* Finally set the registers back for text mode. */
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writeregs(graph_off);
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writeregs(graph_off);
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}
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}
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/* Set the graphics registers as indicated by the given table */
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/* Set the graphics registers as indicated by the given table */
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static void
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static void
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writeregs(REGIO *rp)
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writeregs(REGIO *rp)
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{
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{
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for (; rp->action != DONE; rp++) {
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for (; rp->action != DONE; rp++) {
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switch (rp->action) {
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switch (rp->action) {
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case IN:
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case IN:
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inp(rp->port1);
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inp(rp->port1);
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break;
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break;
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case OUT:
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case OUT:
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outp(rp->port1, rp->data1);
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outp(rp->port1, rp->data1);
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if (rp->port2)
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if (rp->port2)
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outp(rp->port2, rp->data2);
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outp(rp->port2, rp->data2);
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break;
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break;
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}
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}
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}
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}
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}
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}
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/* Output a word to an I/O port. */
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/* Output a word to an I/O port. */
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static void
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static void
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out_word(unsigned int p,unsigned int d)
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out_word(unsigned int p,unsigned int d)
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{
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{
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outp(p, d & 0xff);
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outp(p, d & 0xff);
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outp(p + 1, (d >> 8) & 0xff);
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outp(p + 1, (d >> 8) & 0xff);
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}
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}
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/* Values for the data rotate register to implement drawing modes. */
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/* Values for the data rotate register to implement drawing modes. */
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static unsigned char mode_table[MWMODE_MAX + 1] = {
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static unsigned char mode_table[MWMODE_MAX + 1] = {
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0x00, 0x18, 0x10, 0x08, /* COPY, XOR, AND, OR implemented*/
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0x00, 0x18, 0x10, 0x08, /* COPY, XOR, AND, OR implemented*/
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0x00, 0x00, 0x00, 0x00, /* no VGA HW for other modes*/
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0x00, 0x00, 0x00, 0x00, /* no VGA HW for other modes*/
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0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00,
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};
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};
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/* Set the drawing mode.
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/* Set the drawing mode.
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* This is either SET, OR, AND, or XOR.
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* This is either SET, OR, AND, or XOR.
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*/
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*/
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static void
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static void
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setmode(int mode)
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setmode(int mode)
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{
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{
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if (mode > MWMODE_MAX)
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if (mode > MWMODE_MAX)
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return;
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return;
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outp(GRREG, DATA_ROTATE);
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outp(GRREG, DATA_ROTATE);
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outp(GRVAL, mode_table[mode]);
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outp(GRVAL, mode_table[mode]);
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}
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}
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#if VGA_ET4000
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#if VGA_ET4000
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/* VGA 800x600 16-color graphics (BIOS mode 0x29).
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/* VGA 800x600 16-color graphics (BIOS mode 0x29).
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*/
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*/
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static REGIO graphics_on[] = {
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static REGIO graphics_on[] = {
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/* Reset attr F/F */
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/* Reset attr F/F */
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IN, ATTRREG, 0, 0, 0,
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IN, ATTRREG, 0, 0, 0,
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/* Disable palette */
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/* Disable palette */
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OUT, PALREG, 0, 0, 0,
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OUT, PALREG, 0, 0, 0,
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/* Reset sequencer regs */
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/* Reset sequencer regs */
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OUT, SEQREG, 0, SEQVAL, 0,
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OUT, SEQREG, 0, SEQVAL, 0,
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OUT, SEQREG, 1, SEQVAL, 1,
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OUT, SEQREG, 1, SEQVAL, 1,
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OUT, SEQREG, 2, SEQVAL, 0x0f,
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OUT, SEQREG, 2, SEQVAL, 0x0f,
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OUT, SEQREG, 3, SEQVAL, 0,
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OUT, SEQREG, 3, SEQVAL, 0,
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OUT, SEQREG, 4, SEQVAL, 6,
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OUT, SEQREG, 4, SEQVAL, 6,
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/* Misc out reg */
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/* Misc out reg */
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OUT, GENREG1, 0xe3, 0, 0,
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OUT, GENREG1, 0xe3, 0, 0,
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/* Sequencer enable */
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/* Sequencer enable */
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OUT, SEQREG, 0, SEQVAL, 0x03,
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OUT, SEQREG, 0, SEQVAL, 0x03,
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/* Unprotect crtc regs 0-7 */
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/* Unprotect crtc regs 0-7 */
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OUT, CRTCREG, 0x11, CRTCVAL, 0,
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OUT, CRTCREG, 0x11, CRTCVAL, 0,
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/* Crtc */
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/* Crtc */
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OUT, CRTCREG, 0, CRTCVAL, 0x7a,
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OUT, CRTCREG, 0, CRTCVAL, 0x7a,
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OUT, CRTCREG, 1, CRTCVAL, 0x63,
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OUT, CRTCREG, 1, CRTCVAL, 0x63,
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OUT, CRTCREG, 2, CRTCVAL, 0x64,
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OUT, CRTCREG, 2, CRTCVAL, 0x64,
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OUT, CRTCREG, 3, CRTCVAL, 0x1d,
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OUT, CRTCREG, 3, CRTCVAL, 0x1d,
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OUT, CRTCREG, 4, CRTCVAL, 0x68,
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OUT, CRTCREG, 4, CRTCVAL, 0x68,
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OUT, CRTCREG, 5, CRTCVAL, 0x9a,
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OUT, CRTCREG, 5, CRTCVAL, 0x9a,
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OUT, CRTCREG, 6, CRTCVAL, 0x78,
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OUT, CRTCREG, 6, CRTCVAL, 0x78,
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OUT, CRTCREG, 7, CRTCVAL, 0xf0,
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OUT, CRTCREG, 7, CRTCVAL, 0xf0,
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OUT, CRTCREG, 8, CRTCVAL, 0x00,
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OUT, CRTCREG, 8, CRTCVAL, 0x00,
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OUT, CRTCREG, 9, CRTCVAL, 0x60,
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OUT, CRTCREG, 9, CRTCVAL, 0x60,
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OUT, CRTCREG, 10, CRTCVAL, 0x00,
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OUT, CRTCREG, 10, CRTCVAL, 0x00,
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OUT, CRTCREG, 11, CRTCVAL, 0x00,
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OUT, CRTCREG, 11, CRTCVAL, 0x00,
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OUT, CRTCREG, 12, CRTCVAL, 0x00,
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OUT, CRTCREG, 12, CRTCVAL, 0x00,
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OUT, CRTCREG, 13, CRTCVAL, 0x00,
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OUT, CRTCREG, 13, CRTCVAL, 0x00,
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OUT, CRTCREG, 14, CRTCVAL, 0x00,
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OUT, CRTCREG, 14, CRTCVAL, 0x00,
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OUT, CRTCREG, 15, CRTCVAL, 0x00,
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OUT, CRTCREG, 15, CRTCVAL, 0x00,
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OUT, CRTCREG, 16, CRTCVAL, 0x5c,
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OUT, CRTCREG, 16, CRTCVAL, 0x5c,
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OUT, CRTCREG, 17, CRTCVAL, 0x8e,
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OUT, CRTCREG, 17, CRTCVAL, 0x8e,
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OUT, CRTCREG, 18, CRTCVAL, 0x57,
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OUT, CRTCREG, 18, CRTCVAL, 0x57,
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OUT, CRTCREG, 19, CRTCVAL, 0x32,
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OUT, CRTCREG, 19, CRTCVAL, 0x32,
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OUT, CRTCREG, 20, CRTCVAL, 0x00,
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OUT, CRTCREG, 20, CRTCVAL, 0x00,
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OUT, CRTCREG, 21, CRTCVAL, 0x5b,
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OUT, CRTCREG, 21, CRTCVAL, 0x5b,
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OUT, CRTCREG, 22, CRTCVAL, 0x75,
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OUT, CRTCREG, 22, CRTCVAL, 0x75,
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OUT, CRTCREG, 23, CRTCVAL, 0xc3,
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OUT, CRTCREG, 23, CRTCVAL, 0xc3,
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OUT, CRTCREG, 24, CRTCVAL, 0xff,
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OUT, CRTCREG, 24, CRTCVAL, 0xff,
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/* Graphics controller */
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/* Graphics controller */
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OUT, GENREG2, 0x00, 0, 0,
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OUT, GENREG2, 0x00, 0, 0,
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OUT, GENREG3, 0x01, 0, 0,
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OUT, GENREG3, 0x01, 0, 0,
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OUT, GRREG, 0, GRVAL, 0x00,
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OUT, GRREG, 0, GRVAL, 0x00,
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OUT, GRREG, 1, GRVAL, 0x00,
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OUT, GRREG, 1, GRVAL, 0x00,
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OUT, GRREG, 2, GRVAL, 0x00,
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OUT, GRREG, 2, GRVAL, 0x00,
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OUT, GRREG, 3, GRVAL, 0x00,
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OUT, GRREG, 3, GRVAL, 0x00,
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OUT, GRREG, 4, GRVAL, 0x00,
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OUT, GRREG, 4, GRVAL, 0x00,
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OUT, GRREG, 5, GRVAL, 0x00,
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OUT, GRREG, 5, GRVAL, 0x00,
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OUT, GRREG, 6, GRVAL, 0x05,
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OUT, GRREG, 6, GRVAL, 0x05,
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OUT, GRREG, 7, GRVAL, 0x0f,
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OUT, GRREG, 7, GRVAL, 0x0f,
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OUT, GRREG, 8, GRVAL, 0xff,
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OUT, GRREG, 8, GRVAL, 0xff,
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/* Reset attribute flip/flop */
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/* Reset attribute flip/flop */
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IN, ATTRREG, 0, 0, 0,
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IN, ATTRREG, 0, 0, 0,
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/* Palette */
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/* Palette */
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OUT, PALREG, 0, PALREG, 0x00,
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OUT, PALREG, 0, PALREG, 0x00,
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OUT, PALREG, 1, PALREG, 0x01,
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OUT, PALREG, 1, PALREG, 0x01,
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OUT, PALREG, 2, PALREG, 0x02,
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OUT, PALREG, 2, PALREG, 0x02,
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OUT, PALREG, 3, PALREG, 0x03,
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OUT, PALREG, 3, PALREG, 0x03,
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OUT, PALREG, 4, PALREG, 0x04,
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OUT, PALREG, 4, PALREG, 0x04,
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OUT, PALREG, 5, PALREG, 0x05,
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OUT, PALREG, 5, PALREG, 0x05,
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OUT, PALREG, 6, PALREG, 0x06,
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OUT, PALREG, 6, PALREG, 0x06,
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OUT, PALREG, 7, PALREG, 0x07,
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OUT, PALREG, 7, PALREG, 0x07,
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OUT, PALREG, 8, PALREG, 0x38,
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OUT, PALREG, 8, PALREG, 0x38,
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OUT, PALREG, 9, PALREG, 0x39,
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OUT, PALREG, 9, PALREG, 0x39,
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OUT, PALREG, 10, PALREG, 0x3a,
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OUT, PALREG, 10, PALREG, 0x3a,
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OUT, PALREG, 11, PALREG, 0x3b,
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OUT, PALREG, 11, PALREG, 0x3b,
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OUT, PALREG, 12, PALREG, 0x3c,
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OUT, PALREG, 12, PALREG, 0x3c,
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OUT, PALREG, 13, PALREG, 0x3d,
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OUT, PALREG, 13, PALREG, 0x3d,
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OUT, PALREG, 14, PALREG, 0x3e,
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OUT, PALREG, 14, PALREG, 0x3e,
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OUT, PALREG, 15, PALREG, 0x3f,
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OUT, PALREG, 15, PALREG, 0x3f,
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OUT, PALREG, 16, PALREG, 0x01,
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OUT, PALREG, 16, PALREG, 0x01,
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OUT, PALREG, 17, PALREG, 0x00,
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OUT, PALREG, 17, PALREG, 0x00,
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OUT, PALREG, 18, PALREG, 0x0f,
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OUT, PALREG, 18, PALREG, 0x0f,
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OUT, PALREG, 19, PALREG, 0x00,
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OUT, PALREG, 19, PALREG, 0x00,
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|
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/* Enable palette */
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/* Enable palette */
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OUT, PALREG, 0x20, 0, 0,
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OUT, PALREG, 0x20, 0, 0,
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|
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/* End of table */
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/* End of table */
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DONE, 0, 0, 0, 0
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DONE, 0, 0, 0, 0
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};
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};
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|
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/* VGA 80x25 text (BIOS mode 3).
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/* VGA 80x25 text (BIOS mode 3).
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*/
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*/
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static REGIO graph_off[] = {
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static REGIO graph_off[] = {
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/* Reset attr F/F */
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/* Reset attr F/F */
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IN, ATTRREG, 0, 0, 0,
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IN, ATTRREG, 0, 0, 0,
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|
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/* Disable palette */
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/* Disable palette */
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OUT, PALREG, 0, 0, 0,
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OUT, PALREG, 0, 0, 0,
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|
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/* Reset sequencer regs */
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/* Reset sequencer regs */
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OUT, SEQREG, 0, SEQVAL, 1,
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OUT, SEQREG, 0, SEQVAL, 1,
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OUT, SEQREG, 1, SEQVAL, 1,
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OUT, SEQREG, 1, SEQVAL, 1,
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OUT, SEQREG, 2, SEQVAL, 3,
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OUT, SEQREG, 2, SEQVAL, 3,
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OUT, SEQREG, 3, SEQVAL, 0,
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OUT, SEQREG, 3, SEQVAL, 0,
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OUT, SEQREG, 4, SEQVAL, 2,
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OUT, SEQREG, 4, SEQVAL, 2,
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|
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/* Misc out reg */
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/* Misc out reg */
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OUT, GENREG1, 0x63, 0, 0,
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OUT, GENREG1, 0x63, 0, 0,
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|
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/* Sequencer enable */
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/* Sequencer enable */
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OUT, SEQREG, 0, SEQVAL, 3,
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OUT, SEQREG, 0, SEQVAL, 3,
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|
|
/* Unprotect crtc regs 0-7 */
|
/* Unprotect crtc regs 0-7 */
|
OUT, CRTCREG, 0x11, CRTCVAL, 0,
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OUT, CRTCREG, 0x11, CRTCVAL, 0,
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|
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/* Crtc */
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/* Crtc */
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OUT, CRTCREG, 0, CRTCVAL, 0x5f, /* horiz total */
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OUT, CRTCREG, 0, CRTCVAL, 0x5f, /* horiz total */
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OUT, CRTCREG, 1, CRTCVAL, 0x4f, /* horiz end */
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OUT, CRTCREG, 1, CRTCVAL, 0x4f, /* horiz end */
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OUT, CRTCREG, 2, CRTCVAL, 0x50, /* horiz blank */
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OUT, CRTCREG, 2, CRTCVAL, 0x50, /* horiz blank */
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OUT, CRTCREG, 3, CRTCVAL, 0x82, /* end blank */
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OUT, CRTCREG, 3, CRTCVAL, 0x82, /* end blank */
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OUT, CRTCREG, 4, CRTCVAL, 0x55, /* horiz retrace */
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OUT, CRTCREG, 4, CRTCVAL, 0x55, /* horiz retrace */
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OUT, CRTCREG, 5, CRTCVAL, 0x81, /* end retrace */
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OUT, CRTCREG, 5, CRTCVAL, 0x81, /* end retrace */
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OUT, CRTCREG, 6, CRTCVAL, 0xbf, /* vert total */
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OUT, CRTCREG, 6, CRTCVAL, 0xbf, /* vert total */
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OUT, CRTCREG, 7, CRTCVAL, 0x1f, /* overflows */
|
OUT, CRTCREG, 7, CRTCVAL, 0x1f, /* overflows */
|
OUT, CRTCREG, 8, CRTCVAL, 0x00, /* row scan */
|
OUT, CRTCREG, 8, CRTCVAL, 0x00, /* row scan */
|
OUT, CRTCREG, 9, CRTCVAL, 0x4f, /* max scan line */
|
OUT, CRTCREG, 9, CRTCVAL, 0x4f, /* max scan line */
|
OUT, CRTCREG, 10, CRTCVAL, 0x00, /* cursor start */
|
OUT, CRTCREG, 10, CRTCVAL, 0x00, /* cursor start */
|
OUT, CRTCREG, 11, CRTCVAL, 0x0f, /* cursor end */
|
OUT, CRTCREG, 11, CRTCVAL, 0x0f, /* cursor end */
|
OUT, CRTCREG, 12, CRTCVAL, 0x0e, /* start high addr */
|
OUT, CRTCREG, 12, CRTCVAL, 0x0e, /* start high addr */
|
OUT, CRTCREG, 13, CRTCVAL, 0xb0, /* low addr */
|
OUT, CRTCREG, 13, CRTCVAL, 0xb0, /* low addr */
|
OUT, CRTCREG, 14, CRTCVAL, 0x16, /* cursor high */
|
OUT, CRTCREG, 14, CRTCVAL, 0x16, /* cursor high */
|
OUT, CRTCREG, 15, CRTCVAL, 0x30, /* cursor low */
|
OUT, CRTCREG, 15, CRTCVAL, 0x30, /* cursor low */
|
OUT, CRTCREG, 16, CRTCVAL, 0x9c, /* vert retrace */
|
OUT, CRTCREG, 16, CRTCVAL, 0x9c, /* vert retrace */
|
OUT, CRTCREG, 17, CRTCVAL, 0x8e, /* retrace end */
|
OUT, CRTCREG, 17, CRTCVAL, 0x8e, /* retrace end */
|
OUT, CRTCREG, 18, CRTCVAL, 0x8f, /* vert end */
|
OUT, CRTCREG, 18, CRTCVAL, 0x8f, /* vert end */
|
OUT, CRTCREG, 19, CRTCVAL, 0x28, /* offset */
|
OUT, CRTCREG, 19, CRTCVAL, 0x28, /* offset */
|
OUT, CRTCREG, 20, CRTCVAL, 0x1f, /* underline */
|
OUT, CRTCREG, 20, CRTCVAL, 0x1f, /* underline */
|
OUT, CRTCREG, 21, CRTCVAL, 0x96, /* vert blank */
|
OUT, CRTCREG, 21, CRTCVAL, 0x96, /* vert blank */
|
OUT, CRTCREG, 22, CRTCVAL, 0xb9, /* end blank */
|
OUT, CRTCREG, 22, CRTCVAL, 0xb9, /* end blank */
|
OUT, CRTCREG, 23, CRTCVAL, 0xa3, /* crt mode */
|
OUT, CRTCREG, 23, CRTCVAL, 0xa3, /* crt mode */
|
OUT, CRTCREG, 24, CRTCVAL, 0xff, /* line compare */
|
OUT, CRTCREG, 24, CRTCVAL, 0xff, /* line compare */
|
|
|
/* Graphics controller */
|
/* Graphics controller */
|
OUT, GENREG2, 0x00, 0, 0,
|
OUT, GENREG2, 0x00, 0, 0,
|
OUT, GENREG3, 0x01, 0, 0,
|
OUT, GENREG3, 0x01, 0, 0,
|
OUT, GRREG, 0, GRVAL, 0x00,
|
OUT, GRREG, 0, GRVAL, 0x00,
|
OUT, GRREG, 1, GRVAL, 0x00,
|
OUT, GRREG, 1, GRVAL, 0x00,
|
OUT, GRREG, 2, GRVAL, 0x00,
|
OUT, GRREG, 2, GRVAL, 0x00,
|
OUT, GRREG, 3, GRVAL, 0x00,
|
OUT, GRREG, 3, GRVAL, 0x00,
|
OUT, GRREG, 4, GRVAL, 0x00,
|
OUT, GRREG, 4, GRVAL, 0x00,
|
OUT, GRREG, 5, GRVAL, 0x10,
|
OUT, GRREG, 5, GRVAL, 0x10,
|
OUT, GRREG, 6, GRVAL, 0x0e,
|
OUT, GRREG, 6, GRVAL, 0x0e,
|
OUT, GRREG, 7, GRVAL, 0x00,
|
OUT, GRREG, 7, GRVAL, 0x00,
|
OUT, GRREG, 8, GRVAL, 0xff,
|
OUT, GRREG, 8, GRVAL, 0xff,
|
|
|
/* Reset attribute flip/flop */
|
/* Reset attribute flip/flop */
|
IN, ATTRREG, 0, 0, 0,
|
IN, ATTRREG, 0, 0, 0,
|
|
|
/* Palette */
|
/* Palette */
|
OUT, PALREG, 0, PALREG, 0x00,
|
OUT, PALREG, 0, PALREG, 0x00,
|
OUT, PALREG, 1, PALREG, 0x01,
|
OUT, PALREG, 1, PALREG, 0x01,
|
OUT, PALREG, 2, PALREG, 0x02,
|
OUT, PALREG, 2, PALREG, 0x02,
|
OUT, PALREG, 3, PALREG, 0x03,
|
OUT, PALREG, 3, PALREG, 0x03,
|
OUT, PALREG, 4, PALREG, 0x04,
|
OUT, PALREG, 4, PALREG, 0x04,
|
OUT, PALREG, 5, PALREG, 0x05,
|
OUT, PALREG, 5, PALREG, 0x05,
|
OUT, PALREG, 6, PALREG, 0x06,
|
OUT, PALREG, 6, PALREG, 0x06,
|
OUT, PALREG, 7, PALREG, 0x07,
|
OUT, PALREG, 7, PALREG, 0x07,
|
OUT, PALREG, 8, PALREG, 0x10,
|
OUT, PALREG, 8, PALREG, 0x10,
|
OUT, PALREG, 9, PALREG, 0x11,
|
OUT, PALREG, 9, PALREG, 0x11,
|
OUT, PALREG, 10, PALREG, 0x12,
|
OUT, PALREG, 10, PALREG, 0x12,
|
OUT, PALREG, 11, PALREG, 0x13,
|
OUT, PALREG, 11, PALREG, 0x13,
|
OUT, PALREG, 12, PALREG, 0x14,
|
OUT, PALREG, 12, PALREG, 0x14,
|
OUT, PALREG, 13, PALREG, 0x15,
|
OUT, PALREG, 13, PALREG, 0x15,
|
OUT, PALREG, 14, PALREG, 0x16,
|
OUT, PALREG, 14, PALREG, 0x16,
|
OUT, PALREG, 15, PALREG, 0x17,
|
OUT, PALREG, 15, PALREG, 0x17,
|
OUT, PALREG, 16, PALREG, 0x08,
|
OUT, PALREG, 16, PALREG, 0x08,
|
OUT, PALREG, 17, PALREG, 0x00,
|
OUT, PALREG, 17, PALREG, 0x00,
|
OUT, PALREG, 18, PALREG, 0x0f,
|
OUT, PALREG, 18, PALREG, 0x0f,
|
OUT, PALREG, 19, PALREG, 0x00,
|
OUT, PALREG, 19, PALREG, 0x00,
|
|
|
/* Enable palette */
|
/* Enable palette */
|
OUT, PALREG, 0x20, 0, 0,
|
OUT, PALREG, 0x20, 0, 0,
|
|
|
/* End of table */
|
/* End of table */
|
DONE, 0, 0, 0, 0
|
DONE, 0, 0, 0, 0
|
};
|
};
|
|
|
#endif
|
#endif
|
|
|
|
|
#if VGA_STANDARD
|
#if VGA_STANDARD
|
|
|
/* VGA 640x480 16-color graphics (BIOS mode 0x12).
|
/* VGA 640x480 16-color graphics (BIOS mode 0x12).
|
*/
|
*/
|
static REGIO graphics_on[] = {
|
static REGIO graphics_on[] = {
|
/* Reset attr F/F */
|
/* Reset attr F/F */
|
IN, ATTRREG, 0, 0, 0,
|
IN, ATTRREG, 0, 0, 0,
|
|
|
/* Disable palette */
|
/* Disable palette */
|
OUT, PALREG, 0, 0, 0,
|
OUT, PALREG, 0, 0, 0,
|
|
|
/* Reset sequencer regs */
|
/* Reset sequencer regs */
|
OUT, SEQREG, 0, SEQVAL, 0,
|
OUT, SEQREG, 0, SEQVAL, 0,
|
OUT, SEQREG, 1, SEQVAL, 1,
|
OUT, SEQREG, 1, SEQVAL, 1,
|
OUT, SEQREG, 2, SEQVAL, 0x0f,
|
OUT, SEQREG, 2, SEQVAL, 0x0f,
|
OUT, SEQREG, 3, SEQVAL, 0,
|
OUT, SEQREG, 3, SEQVAL, 0,
|
OUT, SEQREG, 4, SEQVAL, 6,
|
OUT, SEQREG, 4, SEQVAL, 6,
|
|
|
/* Misc out reg */
|
/* Misc out reg */
|
OUT, GENREG1, 0xe3, 0, 0,
|
OUT, GENREG1, 0xe3, 0, 0,
|
|
|
/* Sequencer enable */
|
/* Sequencer enable */
|
OUT, SEQREG, 0, SEQVAL, 0x03,
|
OUT, SEQREG, 0, SEQVAL, 0x03,
|
|
|
/* Unprotect crtc regs 0-7 */
|
/* Unprotect crtc regs 0-7 */
|
OUT, CRTCREG, 0x11, CRTCVAL, 0,
|
OUT, CRTCREG, 0x11, CRTCVAL, 0,
|
|
|
/* Crtc */
|
/* Crtc */
|
OUT, CRTCREG, 0, CRTCVAL, 0x5f,
|
OUT, CRTCREG, 0, CRTCVAL, 0x5f,
|
OUT, CRTCREG, 1, CRTCVAL, 0x4f,
|
OUT, CRTCREG, 1, CRTCVAL, 0x4f,
|
OUT, CRTCREG, 2, CRTCVAL, 0x50,
|
OUT, CRTCREG, 2, CRTCVAL, 0x50,
|
OUT, CRTCREG, 3, CRTCVAL, 0x82,
|
OUT, CRTCREG, 3, CRTCVAL, 0x82,
|
OUT, CRTCREG, 4, CRTCVAL, 0x54,
|
OUT, CRTCREG, 4, CRTCVAL, 0x54,
|
OUT, CRTCREG, 5, CRTCVAL, 0x80,
|
OUT, CRTCREG, 5, CRTCVAL, 0x80,
|
OUT, CRTCREG, 6, CRTCVAL, 0x0b,
|
OUT, CRTCREG, 6, CRTCVAL, 0x0b,
|
OUT, CRTCREG, 7, CRTCVAL, 0x3e,
|
OUT, CRTCREG, 7, CRTCVAL, 0x3e,
|
OUT, CRTCREG, 8, CRTCVAL, 0x00,
|
OUT, CRTCREG, 8, CRTCVAL, 0x00,
|
OUT, CRTCREG, 9, CRTCVAL, 0x40,
|
OUT, CRTCREG, 9, CRTCVAL, 0x40,
|
OUT, CRTCREG, 10, CRTCVAL, 0x00,
|
OUT, CRTCREG, 10, CRTCVAL, 0x00,
|
OUT, CRTCREG, 11, CRTCVAL, 0x00,
|
OUT, CRTCREG, 11, CRTCVAL, 0x00,
|
OUT, CRTCREG, 12, CRTCVAL, 0x00,
|
OUT, CRTCREG, 12, CRTCVAL, 0x00,
|
OUT, CRTCREG, 13, CRTCVAL, 0x00,
|
OUT, CRTCREG, 13, CRTCVAL, 0x00,
|
OUT, CRTCREG, 14, CRTCVAL, 0x00,
|
OUT, CRTCREG, 14, CRTCVAL, 0x00,
|
OUT, CRTCREG, 15, CRTCVAL, 0x59,
|
OUT, CRTCREG, 15, CRTCVAL, 0x59,
|
OUT, CRTCREG, 16, CRTCVAL, 0xea,
|
OUT, CRTCREG, 16, CRTCVAL, 0xea,
|
OUT, CRTCREG, 17, CRTCVAL, 0x8c,
|
OUT, CRTCREG, 17, CRTCVAL, 0x8c,
|
OUT, CRTCREG, 18, CRTCVAL, 0xdf,
|
OUT, CRTCREG, 18, CRTCVAL, 0xdf,
|
OUT, CRTCREG, 19, CRTCVAL, 0x28,
|
OUT, CRTCREG, 19, CRTCVAL, 0x28,
|
OUT, CRTCREG, 20, CRTCVAL, 0x00,
|
OUT, CRTCREG, 20, CRTCVAL, 0x00,
|
OUT, CRTCREG, 21, CRTCVAL, 0xe7,
|
OUT, CRTCREG, 21, CRTCVAL, 0xe7,
|
OUT, CRTCREG, 22, CRTCVAL, 0x04,
|
OUT, CRTCREG, 22, CRTCVAL, 0x04,
|
OUT, CRTCREG, 23, CRTCVAL, 0xe3,
|
OUT, CRTCREG, 23, CRTCVAL, 0xe3,
|
OUT, CRTCREG, 24, CRTCVAL, 0xff,
|
OUT, CRTCREG, 24, CRTCVAL, 0xff,
|
|
|
/* Graphics controller */
|
/* Graphics controller */
|
OUT, GENREG2, 0x00, 0, 0,
|
OUT, GENREG2, 0x00, 0, 0,
|
OUT, GENREG3, 0x01, 0, 0,
|
OUT, GENREG3, 0x01, 0, 0,
|
OUT, GRREG, 0, GRVAL, 0x00,
|
OUT, GRREG, 0, GRVAL, 0x00,
|
OUT, GRREG, 1, GRVAL, 0x00,
|
OUT, GRREG, 1, GRVAL, 0x00,
|
OUT, GRREG, 2, GRVAL, 0x00,
|
OUT, GRREG, 2, GRVAL, 0x00,
|
OUT, GRREG, 3, GRVAL, 0x00,
|
OUT, GRREG, 3, GRVAL, 0x00,
|
OUT, GRREG, 4, GRVAL, 0x00,
|
OUT, GRREG, 4, GRVAL, 0x00,
|
OUT, GRREG, 5, GRVAL, 0x00,
|
OUT, GRREG, 5, GRVAL, 0x00,
|
OUT, GRREG, 6, GRVAL, 0x05,
|
OUT, GRREG, 6, GRVAL, 0x05,
|
OUT, GRREG, 7, GRVAL, 0x0f,
|
OUT, GRREG, 7, GRVAL, 0x0f,
|
OUT, GRREG, 8, GRVAL, 0xff,
|
OUT, GRREG, 8, GRVAL, 0xff,
|
|
|
/* Reset attribute flip/flop */
|
/* Reset attribute flip/flop */
|
IN, ATTRREG, 0, 0, 0,
|
IN, ATTRREG, 0, 0, 0,
|
|
|
/* Palette */
|
/* Palette */
|
OUT, PALREG, 0, PALREG, 0x00,
|
OUT, PALREG, 0, PALREG, 0x00,
|
OUT, PALREG, 1, PALREG, 0x01,
|
OUT, PALREG, 1, PALREG, 0x01,
|
OUT, PALREG, 2, PALREG, 0x02,
|
OUT, PALREG, 2, PALREG, 0x02,
|
OUT, PALREG, 3, PALREG, 0x03,
|
OUT, PALREG, 3, PALREG, 0x03,
|
OUT, PALREG, 4, PALREG, 0x04,
|
OUT, PALREG, 4, PALREG, 0x04,
|
OUT, PALREG, 5, PALREG, 0x05,
|
OUT, PALREG, 5, PALREG, 0x05,
|
OUT, PALREG, 6, PALREG, 0x06,
|
OUT, PALREG, 6, PALREG, 0x06,
|
OUT, PALREG, 7, PALREG, 0x07,
|
OUT, PALREG, 7, PALREG, 0x07,
|
OUT, PALREG, 8, PALREG, 0x38,
|
OUT, PALREG, 8, PALREG, 0x38,
|
OUT, PALREG, 9, PALREG, 0x39,
|
OUT, PALREG, 9, PALREG, 0x39,
|
OUT, PALREG, 10, PALREG, 0x3a,
|
OUT, PALREG, 10, PALREG, 0x3a,
|
OUT, PALREG, 11, PALREG, 0x3b,
|
OUT, PALREG, 11, PALREG, 0x3b,
|
OUT, PALREG, 12, PALREG, 0x3c,
|
OUT, PALREG, 12, PALREG, 0x3c,
|
OUT, PALREG, 13, PALREG, 0x3d,
|
OUT, PALREG, 13, PALREG, 0x3d,
|
OUT, PALREG, 14, PALREG, 0x3e,
|
OUT, PALREG, 14, PALREG, 0x3e,
|
OUT, PALREG, 15, PALREG, 0x3f,
|
OUT, PALREG, 15, PALREG, 0x3f,
|
OUT, PALREG, 16, PALREG, 0x01,
|
OUT, PALREG, 16, PALREG, 0x01,
|
OUT, PALREG, 17, PALREG, 0x00,
|
OUT, PALREG, 17, PALREG, 0x00,
|
OUT, PALREG, 18, PALREG, 0x0f,
|
OUT, PALREG, 18, PALREG, 0x0f,
|
OUT, PALREG, 19, PALREG, 0x00,
|
OUT, PALREG, 19, PALREG, 0x00,
|
|
|
/* Enable palette */
|
/* Enable palette */
|
OUT, PALREG, 0x20, 0, 0,
|
OUT, PALREG, 0x20, 0, 0,
|
|
|
/* End of table */
|
/* End of table */
|
DONE, 0, 0, 0, 0
|
DONE, 0, 0, 0, 0
|
};
|
};
|
|
|
|
|
/* VGA 80x25 text (BIOS mode 3).
|
/* VGA 80x25 text (BIOS mode 3).
|
*/
|
*/
|
static REGIO graph_off[] = {
|
static REGIO graph_off[] = {
|
/* Reset attr F/F */
|
/* Reset attr F/F */
|
IN, ATTRREG, 0, 0, 0,
|
IN, ATTRREG, 0, 0, 0,
|
|
|
/* Disable palette */
|
/* Disable palette */
|
OUT, PALREG, 0, 0, 0,
|
OUT, PALREG, 0, 0, 0,
|
|
|
/* Reset sequencer regs */
|
/* Reset sequencer regs */
|
OUT, SEQREG, 0, SEQVAL, 1,
|
OUT, SEQREG, 0, SEQVAL, 1,
|
OUT, SEQREG, 1, SEQVAL, 1,
|
OUT, SEQREG, 1, SEQVAL, 1,
|
OUT, SEQREG, 2, SEQVAL, 3,
|
OUT, SEQREG, 2, SEQVAL, 3,
|
OUT, SEQREG, 3, SEQVAL, 0,
|
OUT, SEQREG, 3, SEQVAL, 0,
|
OUT, SEQREG, 4, SEQVAL, 2,
|
OUT, SEQREG, 4, SEQVAL, 2,
|
|
|
/* Misc out reg */
|
/* Misc out reg */
|
OUT, GENREG1, 0x63, 0, 0,
|
OUT, GENREG1, 0x63, 0, 0,
|
|
|
/* Sequencer enable */
|
/* Sequencer enable */
|
OUT, SEQREG, 0, SEQVAL, 3,
|
OUT, SEQREG, 0, SEQVAL, 3,
|
|
|
/* Unprotect crtc regs 0-7 */
|
/* Unprotect crtc regs 0-7 */
|
OUT, CRTCREG, 0x11, CRTCVAL, 0,
|
OUT, CRTCREG, 0x11, CRTCVAL, 0,
|
|
|
/* Crtc */
|
/* Crtc */
|
OUT, CRTCREG, 0, CRTCVAL, 0x5f, /* horiz total */
|
OUT, CRTCREG, 0, CRTCVAL, 0x5f, /* horiz total */
|
OUT, CRTCREG, 1, CRTCVAL, 0x4f, /* horiz end */
|
OUT, CRTCREG, 1, CRTCVAL, 0x4f, /* horiz end */
|
OUT, CRTCREG, 2, CRTCVAL, 0x50, /* horiz blank */
|
OUT, CRTCREG, 2, CRTCVAL, 0x50, /* horiz blank */
|
OUT, CRTCREG, 3, CRTCVAL, 0x82, /* end blank */
|
OUT, CRTCREG, 3, CRTCVAL, 0x82, /* end blank */
|
OUT, CRTCREG, 4, CRTCVAL, 0x55, /* horiz retrace */
|
OUT, CRTCREG, 4, CRTCVAL, 0x55, /* horiz retrace */
|
OUT, CRTCREG, 5, CRTCVAL, 0x81, /* end retrace */
|
OUT, CRTCREG, 5, CRTCVAL, 0x81, /* end retrace */
|
OUT, CRTCREG, 6, CRTCVAL, 0xbf, /* vert total */
|
OUT, CRTCREG, 6, CRTCVAL, 0xbf, /* vert total */
|
OUT, CRTCREG, 7, CRTCVAL, 0x1f, /* overflows */
|
OUT, CRTCREG, 7, CRTCVAL, 0x1f, /* overflows */
|
OUT, CRTCREG, 8, CRTCVAL, 0x00, /* row scan */
|
OUT, CRTCREG, 8, CRTCVAL, 0x00, /* row scan */
|
OUT, CRTCREG, 9, CRTCVAL, 0x4f, /* max scan line */
|
OUT, CRTCREG, 9, CRTCVAL, 0x4f, /* max scan line */
|
OUT, CRTCREG, 10, CRTCVAL, 0x00, /* cursor start */
|
OUT, CRTCREG, 10, CRTCVAL, 0x00, /* cursor start */
|
OUT, CRTCREG, 11, CRTCVAL, 0x0f, /* cursor end */
|
OUT, CRTCREG, 11, CRTCVAL, 0x0f, /* cursor end */
|
OUT, CRTCREG, 12, CRTCVAL, 0x0e, /* start high addr */
|
OUT, CRTCREG, 12, CRTCVAL, 0x0e, /* start high addr */
|
OUT, CRTCREG, 13, CRTCVAL, 0xb0, /* low addr */
|
OUT, CRTCREG, 13, CRTCVAL, 0xb0, /* low addr */
|
OUT, CRTCREG, 14, CRTCVAL, 0x16, /* cursor high */
|
OUT, CRTCREG, 14, CRTCVAL, 0x16, /* cursor high */
|
OUT, CRTCREG, 15, CRTCVAL, 0x30, /* cursor low */
|
OUT, CRTCREG, 15, CRTCVAL, 0x30, /* cursor low */
|
OUT, CRTCREG, 16, CRTCVAL, 0x9c, /* vert retrace */
|
OUT, CRTCREG, 16, CRTCVAL, 0x9c, /* vert retrace */
|
OUT, CRTCREG, 17, CRTCVAL, 0x8e, /* retrace end */
|
OUT, CRTCREG, 17, CRTCVAL, 0x8e, /* retrace end */
|
OUT, CRTCREG, 18, CRTCVAL, 0x8f, /* vert end */
|
OUT, CRTCREG, 18, CRTCVAL, 0x8f, /* vert end */
|
OUT, CRTCREG, 19, CRTCVAL, 0x28, /* offset */
|
OUT, CRTCREG, 19, CRTCVAL, 0x28, /* offset */
|
OUT, CRTCREG, 20, CRTCVAL, 0x1f, /* underline */
|
OUT, CRTCREG, 20, CRTCVAL, 0x1f, /* underline */
|
OUT, CRTCREG, 21, CRTCVAL, 0x96, /* vert blank */
|
OUT, CRTCREG, 21, CRTCVAL, 0x96, /* vert blank */
|
OUT, CRTCREG, 22, CRTCVAL, 0xb9, /* end blank */
|
OUT, CRTCREG, 22, CRTCVAL, 0xb9, /* end blank */
|
OUT, CRTCREG, 23, CRTCVAL, 0xa3, /* crt mode */
|
OUT, CRTCREG, 23, CRTCVAL, 0xa3, /* crt mode */
|
OUT, CRTCREG, 24, CRTCVAL, 0xff, /* line compare */
|
OUT, CRTCREG, 24, CRTCVAL, 0xff, /* line compare */
|
|
|
/* Graphics controller */
|
/* Graphics controller */
|
OUT, GENREG2, 0x00, 0, 0,
|
OUT, GENREG2, 0x00, 0, 0,
|
OUT, GENREG3, 0x01, 0, 0,
|
OUT, GENREG3, 0x01, 0, 0,
|
OUT, GRREG, 0, GRVAL, 0x00,
|
OUT, GRREG, 0, GRVAL, 0x00,
|
OUT, GRREG, 1, GRVAL, 0x00,
|
OUT, GRREG, 1, GRVAL, 0x00,
|
OUT, GRREG, 2, GRVAL, 0x00,
|
OUT, GRREG, 2, GRVAL, 0x00,
|
OUT, GRREG, 3, GRVAL, 0x00,
|
OUT, GRREG, 3, GRVAL, 0x00,
|
OUT, GRREG, 4, GRVAL, 0x00,
|
OUT, GRREG, 4, GRVAL, 0x00,
|
OUT, GRREG, 5, GRVAL, 0x10,
|
OUT, GRREG, 5, GRVAL, 0x10,
|
OUT, GRREG, 6, GRVAL, 0x0e,
|
OUT, GRREG, 6, GRVAL, 0x0e,
|
OUT, GRREG, 7, GRVAL, 0x00,
|
OUT, GRREG, 7, GRVAL, 0x00,
|
OUT, GRREG, 8, GRVAL, 0xff,
|
OUT, GRREG, 8, GRVAL, 0xff,
|
|
|
/* Reset attribute flip/flop */
|
/* Reset attribute flip/flop */
|
IN, ATTRREG, 0, 0, 0,
|
IN, ATTRREG, 0, 0, 0,
|
|
|
/* Palette */
|
/* Palette */
|
OUT, PALREG, 0, PALREG, 0x00,
|
OUT, PALREG, 0, PALREG, 0x00,
|
OUT, PALREG, 1, PALREG, 0x01,
|
OUT, PALREG, 1, PALREG, 0x01,
|
OUT, PALREG, 2, PALREG, 0x02,
|
OUT, PALREG, 2, PALREG, 0x02,
|
OUT, PALREG, 3, PALREG, 0x03,
|
OUT, PALREG, 3, PALREG, 0x03,
|
OUT, PALREG, 4, PALREG, 0x04,
|
OUT, PALREG, 4, PALREG, 0x04,
|
OUT, PALREG, 5, PALREG, 0x05,
|
OUT, PALREG, 5, PALREG, 0x05,
|
OUT, PALREG, 6, PALREG, 0x06,
|
OUT, PALREG, 6, PALREG, 0x06,
|
OUT, PALREG, 7, PALREG, 0x07,
|
OUT, PALREG, 7, PALREG, 0x07,
|
OUT, PALREG, 8, PALREG, 0x10,
|
OUT, PALREG, 8, PALREG, 0x10,
|
OUT, PALREG, 9, PALREG, 0x11,
|
OUT, PALREG, 9, PALREG, 0x11,
|
OUT, PALREG, 10, PALREG, 0x12,
|
OUT, PALREG, 10, PALREG, 0x12,
|
OUT, PALREG, 11, PALREG, 0x13,
|
OUT, PALREG, 11, PALREG, 0x13,
|
OUT, PALREG, 12, PALREG, 0x14,
|
OUT, PALREG, 12, PALREG, 0x14,
|
OUT, PALREG, 13, PALREG, 0x15,
|
OUT, PALREG, 13, PALREG, 0x15,
|
OUT, PALREG, 14, PALREG, 0x16,
|
OUT, PALREG, 14, PALREG, 0x16,
|
OUT, PALREG, 15, PALREG, 0x17,
|
OUT, PALREG, 15, PALREG, 0x17,
|
OUT, PALREG, 16, PALREG, 0x08,
|
OUT, PALREG, 16, PALREG, 0x08,
|
OUT, PALREG, 17, PALREG, 0x00,
|
OUT, PALREG, 17, PALREG, 0x00,
|
OUT, PALREG, 18, PALREG, 0x0f,
|
OUT, PALREG, 18, PALREG, 0x0f,
|
OUT, PALREG, 19, PALREG, 0x00,
|
OUT, PALREG, 19, PALREG, 0x00,
|
|
|
/* Enable palette */
|
/* Enable palette */
|
OUT, PALREG, 0x20, 0, 0,
|
OUT, PALREG, 0x20, 0, 0,
|
|
|
/* End of table */
|
/* End of table */
|
DONE, 0, 0, 0, 0
|
DONE, 0, 0, 0, 0
|
};
|
};
|
|
|
#endif
|
#endif
|
|
|
|
|
#if EGA_STANDARD
|
#if EGA_STANDARD
|
|
|
/* EGA 640x350 16-color graphics (BIOS mode 0x10).
|
/* EGA 640x350 16-color graphics (BIOS mode 0x10).
|
*/
|
*/
|
static REGIO graphics_on[] = {
|
static REGIO graphics_on[] = {
|
/* Reset attr F/F */
|
/* Reset attr F/F */
|
IN, ATTRREG, 0, 0, 0,
|
IN, ATTRREG, 0, 0, 0,
|
|
|
/* Disable palette */
|
/* Disable palette */
|
OUT, PALREG, 0, 0, 0,
|
OUT, PALREG, 0, 0, 0,
|
|
|
/* Reset sequencer regs */
|
/* Reset sequencer regs */
|
OUT, SEQREG, 0, SEQVAL, 0,
|
OUT, SEQREG, 0, SEQVAL, 0,
|
OUT, SEQREG, 1, SEQVAL, 1,
|
OUT, SEQREG, 1, SEQVAL, 1,
|
OUT, SEQREG, 2, SEQVAL, 0x0f,
|
OUT, SEQREG, 2, SEQVAL, 0x0f,
|
OUT, SEQREG, 3, SEQVAL, 0,
|
OUT, SEQREG, 3, SEQVAL, 0,
|
OUT, SEQREG, 4, SEQVAL, 6,
|
OUT, SEQREG, 4, SEQVAL, 6,
|
|
|
/* Misc out reg */
|
/* Misc out reg */
|
OUT, GENREG1, 0xa7, 0, 0,
|
OUT, GENREG1, 0xa7, 0, 0,
|
|
|
/* Sequencer enable */
|
/* Sequencer enable */
|
OUT, SEQREG, 0, SEQVAL, 0x03,
|
OUT, SEQREG, 0, SEQVAL, 0x03,
|
|
|
/* Unprotect crtc regs 0-7 */
|
/* Unprotect crtc regs 0-7 */
|
OUT, CRTCREG, 0x11, CRTCVAL, 0,
|
OUT, CRTCREG, 0x11, CRTCVAL, 0,
|
|
|
/* Crtc */
|
/* Crtc */
|
OUT, CRTCREG, 0, CRTCVAL, 0x5b,
|
OUT, CRTCREG, 0, CRTCVAL, 0x5b,
|
OUT, CRTCREG, 1, CRTCVAL, 0x4f,
|
OUT, CRTCREG, 1, CRTCVAL, 0x4f,
|
OUT, CRTCREG, 2, CRTCVAL, 0x53,
|
OUT, CRTCREG, 2, CRTCVAL, 0x53,
|
OUT, CRTCREG, 3, CRTCVAL, 0x37,
|
OUT, CRTCREG, 3, CRTCVAL, 0x37,
|
OUT, CRTCREG, 4, CRTCVAL, 0x52,
|
OUT, CRTCREG, 4, CRTCVAL, 0x52,
|
OUT, CRTCREG, 5, CRTCVAL, 0x00,
|
OUT, CRTCREG, 5, CRTCVAL, 0x00,
|
OUT, CRTCREG, 6, CRTCVAL, 0x6c,
|
OUT, CRTCREG, 6, CRTCVAL, 0x6c,
|
OUT, CRTCREG, 7, CRTCVAL, 0x1f,
|
OUT, CRTCREG, 7, CRTCVAL, 0x1f,
|
OUT, CRTCREG, 8, CRTCVAL, 0x00,
|
OUT, CRTCREG, 8, CRTCVAL, 0x00,
|
OUT, CRTCREG, 9, CRTCVAL, 0x00,
|
OUT, CRTCREG, 9, CRTCVAL, 0x00,
|
OUT, CRTCREG, 10, CRTCVAL, 0x00,
|
OUT, CRTCREG, 10, CRTCVAL, 0x00,
|
OUT, CRTCREG, 11, CRTCVAL, 0x00,
|
OUT, CRTCREG, 11, CRTCVAL, 0x00,
|
OUT, CRTCREG, 12, CRTCVAL, 0x00,
|
OUT, CRTCREG, 12, CRTCVAL, 0x00,
|
OUT, CRTCREG, 13, CRTCVAL, 0x00,
|
OUT, CRTCREG, 13, CRTCVAL, 0x00,
|
OUT, CRTCREG, 14, CRTCVAL, 0x00,
|
OUT, CRTCREG, 14, CRTCVAL, 0x00,
|
OUT, CRTCREG, 15, CRTCVAL, 0x00,
|
OUT, CRTCREG, 15, CRTCVAL, 0x00,
|
OUT, CRTCREG, 16, CRTCVAL, 0x5e,
|
OUT, CRTCREG, 16, CRTCVAL, 0x5e,
|
OUT, CRTCREG, 17, CRTCVAL, 0x2b,
|
OUT, CRTCREG, 17, CRTCVAL, 0x2b,
|
OUT, CRTCREG, 18, CRTCVAL, 0x5d,
|
OUT, CRTCREG, 18, CRTCVAL, 0x5d,
|
OUT, CRTCREG, 19, CRTCVAL, 0x28,
|
OUT, CRTCREG, 19, CRTCVAL, 0x28,
|
OUT, CRTCREG, 20, CRTCVAL, 0x0f,
|
OUT, CRTCREG, 20, CRTCVAL, 0x0f,
|
OUT, CRTCREG, 21, CRTCVAL, 0x5f,
|
OUT, CRTCREG, 21, CRTCVAL, 0x5f,
|
OUT, CRTCREG, 22, CRTCVAL, 0x0a,
|
OUT, CRTCREG, 22, CRTCVAL, 0x0a,
|
OUT, CRTCREG, 23, CRTCVAL, 0xe3,
|
OUT, CRTCREG, 23, CRTCVAL, 0xe3,
|
OUT, CRTCREG, 24, CRTCVAL, 0xff,
|
OUT, CRTCREG, 24, CRTCVAL, 0xff,
|
|
|
/* Graphics controller */
|
/* Graphics controller */
|
OUT, GENREG2, 0x00, 0, 0,
|
OUT, GENREG2, 0x00, 0, 0,
|
OUT, GENREG3, 0x01, 0, 0,
|
OUT, GENREG3, 0x01, 0, 0,
|
OUT, GRREG, 0, GRVAL, 0x00,
|
OUT, GRREG, 0, GRVAL, 0x00,
|
OUT, GRREG, 1, GRVAL, 0x00,
|
OUT, GRREG, 1, GRVAL, 0x00,
|
OUT, GRREG, 2, GRVAL, 0x00,
|
OUT, GRREG, 2, GRVAL, 0x00,
|
OUT, GRREG, 3, GRVAL, 0x00,
|
OUT, GRREG, 3, GRVAL, 0x00,
|
OUT, GRREG, 4, GRVAL, 0x00,
|
OUT, GRREG, 4, GRVAL, 0x00,
|
OUT, GRREG, 5, GRVAL, 0x00,
|
OUT, GRREG, 5, GRVAL, 0x00,
|
OUT, GRREG, 6, GRVAL, 0x05,
|
OUT, GRREG, 6, GRVAL, 0x05,
|
OUT, GRREG, 7, GRVAL, 0x0f,
|
OUT, GRREG, 7, GRVAL, 0x0f,
|
OUT, GRREG, 8, GRVAL, 0xff,
|
OUT, GRREG, 8, GRVAL, 0xff,
|
|
|
/* Reset attribute flip/flop */
|
/* Reset attribute flip/flop */
|
IN, ATTRREG, 0, 0, 0,
|
IN, ATTRREG, 0, 0, 0,
|
|
|
/* Palette */
|
/* Palette */
|
OUT, PALREG, 0, PALREG, 0x00,
|
OUT, PALREG, 0, PALREG, 0x00,
|
OUT, PALREG, 1, PALREG, 0x01,
|
OUT, PALREG, 1, PALREG, 0x01,
|
OUT, PALREG, 2, PALREG, 0x02,
|
OUT, PALREG, 2, PALREG, 0x02,
|
OUT, PALREG, 3, PALREG, 0x03,
|
OUT, PALREG, 3, PALREG, 0x03,
|
OUT, PALREG, 4, PALREG, 0x04,
|
OUT, PALREG, 4, PALREG, 0x04,
|
OUT, PALREG, 5, PALREG, 0x05,
|
OUT, PALREG, 5, PALREG, 0x05,
|
OUT, PALREG, 6, PALREG, 0x06,
|
OUT, PALREG, 6, PALREG, 0x06,
|
OUT, PALREG, 7, PALREG, 0x07,
|
OUT, PALREG, 7, PALREG, 0x07,
|
OUT, PALREG, 8, PALREG, 0x38,
|
OUT, PALREG, 8, PALREG, 0x38,
|
OUT, PALREG, 9, PALREG, 0x39,
|
OUT, PALREG, 9, PALREG, 0x39,
|
OUT, PALREG, 10, PALREG, 0x3a,
|
OUT, PALREG, 10, PALREG, 0x3a,
|
OUT, PALREG, 11, PALREG, 0x3b,
|
OUT, PALREG, 11, PALREG, 0x3b,
|
OUT, PALREG, 12, PALREG, 0x3c,
|
OUT, PALREG, 12, PALREG, 0x3c,
|
OUT, PALREG, 13, PALREG, 0x3d,
|
OUT, PALREG, 13, PALREG, 0x3d,
|
OUT, PALREG, 14, PALREG, 0x3e,
|
OUT, PALREG, 14, PALREG, 0x3e,
|
OUT, PALREG, 15, PALREG, 0x3f,
|
OUT, PALREG, 15, PALREG, 0x3f,
|
OUT, PALREG, 16, PALREG, 0x01,
|
OUT, PALREG, 16, PALREG, 0x01,
|
OUT, PALREG, 17, PALREG, 0x00,
|
OUT, PALREG, 17, PALREG, 0x00,
|
OUT, PALREG, 18, PALREG, 0x0f,
|
OUT, PALREG, 18, PALREG, 0x0f,
|
OUT, PALREG, 19, PALREG, 0x00,
|
OUT, PALREG, 19, PALREG, 0x00,
|
|
|
/* Enable palette */
|
/* Enable palette */
|
OUT, PALREG, 0x20, 0, 0,
|
OUT, PALREG, 0x20, 0, 0,
|
|
|
/* End of table */
|
/* End of table */
|
DONE, 0, 0, 0, 0
|
DONE, 0, 0, 0, 0
|
};
|
};
|
|
|
|
|
/* EGA 80x25 text (BIOS mode 3).
|
/* EGA 80x25 text (BIOS mode 3).
|
*/
|
*/
|
static REGIO graph_off[] = {
|
static REGIO graph_off[] = {
|
/* Reset attr F/F */
|
/* Reset attr F/F */
|
IN, ATTRREG, 0, 0, 0,
|
IN, ATTRREG, 0, 0, 0,
|
|
|
/* Disable palette */
|
/* Disable palette */
|
OUT, PALREG, 0, 0, 0,
|
OUT, PALREG, 0, 0, 0,
|
|
|
/* Reset sequencer regs */
|
/* Reset sequencer regs */
|
OUT, SEQREG, 0, SEQVAL, 1,
|
OUT, SEQREG, 0, SEQVAL, 1,
|
OUT, SEQREG, 1, SEQVAL, 1,
|
OUT, SEQREG, 1, SEQVAL, 1,
|
OUT, SEQREG, 2, SEQVAL, 3,
|
OUT, SEQREG, 2, SEQVAL, 3,
|
OUT, SEQREG, 3, SEQVAL, 0,
|
OUT, SEQREG, 3, SEQVAL, 0,
|
OUT, SEQREG, 4, SEQVAL, 3,
|
OUT, SEQREG, 4, SEQVAL, 3,
|
|
|
/* Misc out reg */
|
/* Misc out reg */
|
OUT, GENREG1, 0xa7, 0, 0,
|
OUT, GENREG1, 0xa7, 0, 0,
|
|
|
/* Sequencer enable */
|
/* Sequencer enable */
|
OUT, SEQREG, 0, SEQVAL, 3,
|
OUT, SEQREG, 0, SEQVAL, 3,
|
|
|
/* Crtc */
|
/* Crtc */
|
OUT, CRTCREG, 0, CRTCVAL, 0x5b, /* horiz total */
|
OUT, CRTCREG, 0, CRTCVAL, 0x5b, /* horiz total */
|
OUT, CRTCREG, 1, CRTCVAL, 0x4f, /* horiz end */
|
OUT, CRTCREG, 1, CRTCVAL, 0x4f, /* horiz end */
|
OUT, CRTCREG, 2, CRTCVAL, 0x53, /* horiz blank */
|
OUT, CRTCREG, 2, CRTCVAL, 0x53, /* horiz blank */
|
OUT, CRTCREG, 3, CRTCVAL, 0x37, /* end blank */
|
OUT, CRTCREG, 3, CRTCVAL, 0x37, /* end blank */
|
OUT, CRTCREG, 4, CRTCVAL, 0x51, /* horiz retrace */
|
OUT, CRTCREG, 4, CRTCVAL, 0x51, /* horiz retrace */
|
OUT, CRTCREG, 5, CRTCVAL, 0x5b, /* end retrace */
|
OUT, CRTCREG, 5, CRTCVAL, 0x5b, /* end retrace */
|
OUT, CRTCREG, 6, CRTCVAL, 0x6c, /* vert total */
|
OUT, CRTCREG, 6, CRTCVAL, 0x6c, /* vert total */
|
OUT, CRTCREG, 7, CRTCVAL, 0x1f, /* overflows */
|
OUT, CRTCREG, 7, CRTCVAL, 0x1f, /* overflows */
|
OUT, CRTCREG, 8, CRTCVAL, 0x00, /* row scan */
|
OUT, CRTCREG, 8, CRTCVAL, 0x00, /* row scan */
|
OUT, CRTCREG, 9, CRTCVAL, 0x0d, /* max scan line */
|
OUT, CRTCREG, 9, CRTCVAL, 0x0d, /* max scan line */
|
OUT, CRTCREG, 10, CRTCVAL, 0x00, /* cursor start */
|
OUT, CRTCREG, 10, CRTCVAL, 0x00, /* cursor start */
|
OUT, CRTCREG, 11, CRTCVAL, 0x0f, /* cursor end */
|
OUT, CRTCREG, 11, CRTCVAL, 0x0f, /* cursor end */
|
OUT, CRTCREG, 12, CRTCVAL, 0x00, /* start high addr */
|
OUT, CRTCREG, 12, CRTCVAL, 0x00, /* start high addr */
|
OUT, CRTCREG, 13, CRTCVAL, 0x00, /* low addr */
|
OUT, CRTCREG, 13, CRTCVAL, 0x00, /* low addr */
|
OUT, CRTCREG, 14, CRTCVAL, 0x00, /* cursor high */
|
OUT, CRTCREG, 14, CRTCVAL, 0x00, /* cursor high */
|
OUT, CRTCREG, 15, CRTCVAL, 0x00, /* cursor low */
|
OUT, CRTCREG, 15, CRTCVAL, 0x00, /* cursor low */
|
OUT, CRTCREG, 16, CRTCVAL, 0x5e, /* vert retrace */
|
OUT, CRTCREG, 16, CRTCVAL, 0x5e, /* vert retrace */
|
OUT, CRTCREG, 17, CRTCVAL, 0x2b, /* retrace end */
|
OUT, CRTCREG, 17, CRTCVAL, 0x2b, /* retrace end */
|
OUT, CRTCREG, 18, CRTCVAL, 0x5d, /* vert end */
|
OUT, CRTCREG, 18, CRTCVAL, 0x5d, /* vert end */
|
OUT, CRTCREG, 19, CRTCVAL, 0x28, /* offset */
|
OUT, CRTCREG, 19, CRTCVAL, 0x28, /* offset */
|
OUT, CRTCREG, 20, CRTCVAL, 0x0f, /* underline */
|
OUT, CRTCREG, 20, CRTCVAL, 0x0f, /* underline */
|
OUT, CRTCREG, 21, CRTCVAL, 0x5e, /* vert blank */
|
OUT, CRTCREG, 21, CRTCVAL, 0x5e, /* vert blank */
|
OUT, CRTCREG, 22, CRTCVAL, 0x0a, /* end blank */
|
OUT, CRTCREG, 22, CRTCVAL, 0x0a, /* end blank */
|
OUT, CRTCREG, 23, CRTCVAL, 0xa3, /* crt mode */
|
OUT, CRTCREG, 23, CRTCVAL, 0xa3, /* crt mode */
|
OUT, CRTCREG, 24, CRTCVAL, 0xff, /* line compare */
|
OUT, CRTCREG, 24, CRTCVAL, 0xff, /* line compare */
|
|
|
/* Graphics controller */
|
/* Graphics controller */
|
OUT, GENREG2, 0x00, 0, 0,
|
OUT, GENREG2, 0x00, 0, 0,
|
OUT, GENREG3, 0x01, 0, 0,
|
OUT, GENREG3, 0x01, 0, 0,
|
OUT, GRREG, 0, GRVAL, 0x00,
|
OUT, GRREG, 0, GRVAL, 0x00,
|
OUT, GRREG, 1, GRVAL, 0x00,
|
OUT, GRREG, 1, GRVAL, 0x00,
|
OUT, GRREG, 2, GRVAL, 0x00,
|
OUT, GRREG, 2, GRVAL, 0x00,
|
OUT, GRREG, 3, GRVAL, 0x00,
|
OUT, GRREG, 3, GRVAL, 0x00,
|
OUT, GRREG, 4, GRVAL, 0x00,
|
OUT, GRREG, 4, GRVAL, 0x00,
|
OUT, GRREG, 5, GRVAL, 0x10,
|
OUT, GRREG, 5, GRVAL, 0x10,
|
OUT, GRREG, 6, GRVAL, 0x0e,
|
OUT, GRREG, 6, GRVAL, 0x0e,
|
OUT, GRREG, 7, GRVAL, 0x00,
|
OUT, GRREG, 7, GRVAL, 0x00,
|
OUT, GRREG, 8, GRVAL, 0xff,
|
OUT, GRREG, 8, GRVAL, 0xff,
|
|
|
/* Reset attribute flip/flop */
|
/* Reset attribute flip/flop */
|
IN, ATTRREG, 0, 0, 0,
|
IN, ATTRREG, 0, 0, 0,
|
|
|
/* Palette */
|
/* Palette */
|
OUT, PALREG, 0, PALREG, 0x00,
|
OUT, PALREG, 0, PALREG, 0x00,
|
OUT, PALREG, 1, PALREG, 0x01,
|
OUT, PALREG, 1, PALREG, 0x01,
|
OUT, PALREG, 2, PALREG, 0x02,
|
OUT, PALREG, 2, PALREG, 0x02,
|
OUT, PALREG, 3, PALREG, 0x03,
|
OUT, PALREG, 3, PALREG, 0x03,
|
OUT, PALREG, 4, PALREG, 0x04,
|
OUT, PALREG, 4, PALREG, 0x04,
|
OUT, PALREG, 5, PALREG, 0x05,
|
OUT, PALREG, 5, PALREG, 0x05,
|
OUT, PALREG, 6, PALREG, 0x14,
|
OUT, PALREG, 6, PALREG, 0x14,
|
OUT, PALREG, 7, PALREG, 0x07,
|
OUT, PALREG, 7, PALREG, 0x07,
|
OUT, PALREG, 8, PALREG, 0x38,
|
OUT, PALREG, 8, PALREG, 0x38,
|
OUT, PALREG, 9, PALREG, 0x39,
|
OUT, PALREG, 9, PALREG, 0x39,
|
OUT, PALREG, 10, PALREG, 0x3a,
|
OUT, PALREG, 10, PALREG, 0x3a,
|
OUT, PALREG, 11, PALREG, 0x3b,
|
OUT, PALREG, 11, PALREG, 0x3b,
|
OUT, PALREG, 12, PALREG, 0x3c,
|
OUT, PALREG, 12, PALREG, 0x3c,
|
OUT, PALREG, 13, PALREG, 0x3d,
|
OUT, PALREG, 13, PALREG, 0x3d,
|
OUT, PALREG, 14, PALREG, 0x3e,
|
OUT, PALREG, 14, PALREG, 0x3e,
|
OUT, PALREG, 15, PALREG, 0x3f,
|
OUT, PALREG, 15, PALREG, 0x3f,
|
OUT, PALREG, 16, PALREG, 0x08,
|
OUT, PALREG, 16, PALREG, 0x08,
|
OUT, PALREG, 17, PALREG, 0x00,
|
OUT, PALREG, 17, PALREG, 0x00,
|
OUT, PALREG, 18, PALREG, 0x0f,
|
OUT, PALREG, 18, PALREG, 0x0f,
|
OUT, PALREG, 19, PALREG, 0x00,
|
OUT, PALREG, 19, PALREG, 0x00,
|
|
|
/* Enable palette */
|
/* Enable palette */
|
OUT, PALREG, 0x20, 0, 0,
|
OUT, PALREG, 0x20, 0, 0,
|
|
|
/* End of table */
|
/* End of table */
|
DONE, 0, 0, 0, 0
|
DONE, 0, 0, 0, 0
|
};
|
};
|
|
|
#endif
|
#endif
|
|
|
