URL https://opencores.org/ocsvn/or1k/or1k/trunk

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[/] [or1k/] [tags/] [VER_5_3/] [gdb-5.3/] [sim/] [testsuite/] [d30v-elf/] [os-dbt.S] - Diff between revs 1182 and 1765

Rev 1182	Rev 1765
`.globl _start`	`.globl _start`
`#`	`#`
`# NOTE: Registers r10-r11 are reserved for the interrupt handler`	`# NOTE: Registers r10-r11 are reserved for the interrupt handler`
`# while the others can be used by the main loop/start code.`	`# while the others can be used by the main loop/start code.`

`_start:`	`_start:`
`# patch the DBT handler`	`# patch the DBT handler`
`add r1, r0, handler`	`add r1, r0, handler`
`ldw r2, @(r1, 0)`	`ldw r2, @(r1, 0)`
`ldw r3, @(r1, 4)`	`ldw r3, @(r1, 4)`
`# DBT vector address`	`# DBT vector address`
`add r1, r0, 0xfffff120`	`add r1, r0, 0xfffff120`
`stw r2, @(r1, 0)`	`stw r2, @(r1, 0)`
`stw r3, @(r1, 4)`	`stw r3, @(r1, 4)`

`# try out the breakpoint/return`	`# try out the breakpoint/return`
`add r2, r0, 47`	`add r2, r0, 47`
`#dbt`	`#dbt`
`nop`	`nop`
`.long 0x00b00000`	`.long 0x00b00000`
`nop`	`nop`

`# exit with what ever the breakpoint hander set r2 to.`	`# exit with what ever the breakpoint hander set r2 to.`
`nop`	`nop`
`.long 0x0e000004`	`.long 0x0e000004`
`nop`	`nop`

`handler:`	`handler:`
`jmp real_handler`	`jmp real_handler`

`# The Breakpoint handler sets r2 to 0 if PSW was set correctly.`	`# The Breakpoint handler sets r2 to 0 if PSW was set correctly.`
`real_handler:`	`real_handler:`
`mvfsys r2, cr0`	`mvfsys r2, cr0`
`sub r2, r0, 0x08000000`	`sub r2, r0, 0x08000000`
`#rtd`	`#rtd`
`nop`	`nop`
`.long 0x00a00000`	`.long 0x00a00000`
`nop`	`nop`