/* inline functions for Z8KSIM
|
/* inline functions for Z8KSIM
|
Copyright (C) 1992, 1993 Free Software Foundation, Inc.
|
Copyright (C) 1992, 1993 Free Software Foundation, Inc.
|
|
|
This file is part of Z8KSIM
|
This file is part of Z8KSIM
|
|
|
GNU CC is free software; you can redistribute it and/or modify
|
GNU CC is free software; you can redistribute it and/or modify
|
it under the terms of the GNU General Public License as published by
|
it under the terms of the GNU General Public License as published by
|
the Free Software Foundation; either version 2, or (at your option)
|
the Free Software Foundation; either version 2, or (at your option)
|
any later version.
|
any later version.
|
|
|
GNU CC is distributed in the hope that it will be useful,
|
GNU CC is distributed in the hope that it will be useful,
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
GNU General Public License for more details.
|
GNU General Public License for more details.
|
|
|
You should have received a copy of the GNU General Public License
|
You should have received a copy of the GNU General Public License
|
along with Z8KZIM; if not, write to the Free Software
|
along with Z8KZIM; if not, write to the Free Software
|
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
|
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
|
|
|
#ifndef INLINE
|
#ifndef INLINE
|
#define INLINE
|
#define INLINE
|
#endif
|
#endif
|
#define UGT 0x0b
|
#define UGT 0x0b
|
#define ULE 0x03
|
#define ULE 0x03
|
#define ULT 0x07
|
#define ULT 0x07
|
#define UGE 0x0f
|
#define UGE 0x0f
|
#define SLOW 0
|
#define SLOW 0
|
#define T 0x8
|
#define T 0x8
|
#define F 0x0
|
#define F 0x0
|
#define LT 0x1
|
#define LT 0x1
|
#define GT 0xa
|
#define GT 0xa
|
#define LE 0x2
|
#define LE 0x2
|
#define EQ 0x6
|
#define EQ 0x6
|
#define NE 0xe
|
#define NE 0xe
|
#define GE 0x9
|
#define GE 0x9
|
|
|
static int is_cond_true PARAMS((sim_state_type *context, int c));
|
static int is_cond_true PARAMS((sim_state_type *context, int c));
|
static void makeflags PARAMS((sim_state_type *context, int mask));
|
static void makeflags PARAMS((sim_state_type *context, int mask));
|
|
|
static INLINE
|
static INLINE
|
long
|
long
|
sitoptr (si)
|
sitoptr (si)
|
long si;
|
long si;
|
{
|
{
|
return ((si & 0xff000000) >> 8) | (si & 0xffff);
|
return ((si & 0xff000000) >> 8) | (si & 0xffff);
|
}
|
}
|
static INLINE long
|
static INLINE long
|
ptrtosi (ptr)
|
ptrtosi (ptr)
|
long ptr;
|
long ptr;
|
{
|
{
|
return ((ptr & 0xff0000) << 8) | (ptr & 0xffff);
|
return ((ptr & 0xff0000) << 8) | (ptr & 0xffff);
|
}
|
}
|
|
|
static INLINE
|
static INLINE
|
void
|
void
|
put_long_reg (context, reg, val)
|
put_long_reg (context, reg, val)
|
sim_state_type *context;
|
sim_state_type *context;
|
int reg;
|
int reg;
|
int val;
|
int val;
|
{
|
{
|
context->regs[reg].word = val >> 16;
|
context->regs[reg].word = val >> 16;
|
context->regs[reg + 1].word = val;
|
context->regs[reg + 1].word = val;
|
}
|
}
|
|
|
static INLINE
|
static INLINE
|
void
|
void
|
put_quad_reg (context, reg, val1, val2)
|
put_quad_reg (context, reg, val1, val2)
|
sim_state_type *context;
|
sim_state_type *context;
|
int reg;
|
int reg;
|
int val1;
|
int val1;
|
int val2;
|
int val2;
|
{
|
{
|
context->regs[reg].word = val2 >> 16;
|
context->regs[reg].word = val2 >> 16;
|
context->regs[reg + 1].word = val2;
|
context->regs[reg + 1].word = val2;
|
context->regs[reg + 2].word = val1 >> 16;
|
context->regs[reg + 2].word = val1 >> 16;
|
context->regs[reg + 3].word = val1;
|
context->regs[reg + 3].word = val1;
|
}
|
}
|
|
|
static INLINE
|
static INLINE
|
void
|
void
|
put_word_reg (context, reg, val)
|
put_word_reg (context, reg, val)
|
sim_state_type *context;
|
sim_state_type *context;
|
int reg;
|
int reg;
|
int val;
|
int val;
|
{
|
{
|
context->regs[reg].word = val;
|
context->regs[reg].word = val;
|
}
|
}
|
|
|
static INLINE
|
static INLINE
|
SItype get_long_reg (context, reg)
|
SItype get_long_reg (context, reg)
|
sim_state_type *context;
|
sim_state_type *context;
|
int reg;
|
int reg;
|
{
|
{
|
USItype lsw = context->regs[reg + 1].word;
|
USItype lsw = context->regs[reg + 1].word;
|
USItype msw = context->regs[reg].word;
|
USItype msw = context->regs[reg].word;
|
|
|
return (msw << 16) | lsw;
|
return (msw << 16) | lsw;
|
}
|
}
|
|
|
#ifdef __GNUC__
|
#ifdef __GNUC__
|
static INLINE
|
static INLINE
|
struct UDIstruct
|
struct UDIstruct
|
get_quad_reg (context, reg)
|
get_quad_reg (context, reg)
|
sim_state_type *context;
|
sim_state_type *context;
|
int reg;
|
int reg;
|
{
|
{
|
UDItype res;
|
UDItype res;
|
USItype lsw = get_long_reg (context, reg + 2);
|
USItype lsw = get_long_reg (context, reg + 2);
|
USItype msw = get_long_reg (context, reg);
|
USItype msw = get_long_reg (context, reg);
|
|
|
res.low = lsw;
|
res.low = lsw;
|
res.high = msw;
|
res.high = msw;
|
return res;
|
return res;
|
}
|
}
|
|
|
#endif
|
#endif
|
|
|
static INLINE void
|
static INLINE void
|
put_byte_mem_da (context, addr, value)
|
put_byte_mem_da (context, addr, value)
|
sim_state_type *context;
|
sim_state_type *context;
|
int addr;
|
int addr;
|
int value;
|
int value;
|
{
|
{
|
((unsigned char *) (context->memory))[addr] = value;
|
((unsigned char *) (context->memory))[addr] = value;
|
}
|
}
|
|
|
static INLINE
|
static INLINE
|
void
|
void
|
put_byte_reg (context, reg, val)
|
put_byte_reg (context, reg, val)
|
sim_state_type *context;
|
sim_state_type *context;
|
int reg;
|
int reg;
|
int val;
|
int val;
|
{
|
{
|
int old = context->regs[reg & 0x7].word;
|
int old = context->regs[reg & 0x7].word;
|
if (reg & 0x8)
|
if (reg & 0x8)
|
{
|
{
|
old = old & 0xff00 | (val & 0xff);
|
old = old & 0xff00 | (val & 0xff);
|
}
|
}
|
else
|
else
|
{
|
{
|
old = old & 0x00ff | (val << 8);
|
old = old & 0x00ff | (val << 8);
|
}
|
}
|
context->regs[reg & 0x7].word = old;
|
context->regs[reg & 0x7].word = old;
|
}
|
}
|
|
|
static INLINE
|
static INLINE
|
int
|
int
|
get_byte_reg (context, reg)
|
get_byte_reg (context, reg)
|
sim_state_type *context;
|
sim_state_type *context;
|
int reg;
|
int reg;
|
{
|
{
|
if (reg & 0x8)
|
if (reg & 0x8)
|
return context->regs[reg & 0x7].word & 0xff;
|
return context->regs[reg & 0x7].word & 0xff;
|
else
|
else
|
return (context->regs[reg & 0x7].word >> 8) & 0xff;
|
return (context->regs[reg & 0x7].word >> 8) & 0xff;
|
}
|
}
|
|
|
static INLINE
|
static INLINE
|
void
|
void
|
put_word_mem_da (context, addr, value)
|
put_word_mem_da (context, addr, value)
|
sim_state_type *context;
|
sim_state_type *context;
|
int addr;
|
int addr;
|
int value;
|
int value;
|
{
|
{
|
if (addr & 1)
|
if (addr & 1)
|
{
|
{
|
context->exception = SIM_BAD_ALIGN;
|
context->exception = SIM_BAD_ALIGN;
|
addr &= ~1;
|
addr &= ~1;
|
}
|
}
|
put_byte_mem_da(context, addr, value>>8);
|
put_byte_mem_da(context, addr, value>>8);
|
put_byte_mem_da(context, addr+1, value);
|
put_byte_mem_da(context, addr+1, value);
|
}
|
}
|
|
|
static INLINE unsigned char
|
static INLINE unsigned char
|
get_byte_mem_da (context, addr)
|
get_byte_mem_da (context, addr)
|
sim_state_type *context;
|
sim_state_type *context;
|
int addr;
|
int addr;
|
{
|
{
|
return ((unsigned char *) (context->memory))[addr];
|
return ((unsigned char *) (context->memory))[addr];
|
}
|
}
|
|
|
|
|
#if 0
|
#if 0
|
#define get_word_mem_da(context,addr)\
|
#define get_word_mem_da(context,addr)\
|
*((unsigned short*)((char*)((context)->memory)+(addr)))
|
*((unsigned short*)((char*)((context)->memory)+(addr)))
|
|
|
#else
|
#else
|
#define get_word_mem_da(context,addr) (get_byte_mem_da(context, addr) << 8) | (get_byte_mem_da(context,addr+1))
|
#define get_word_mem_da(context,addr) (get_byte_mem_da(context, addr) << 8) | (get_byte_mem_da(context,addr+1))
|
#endif
|
#endif
|
|
|
#define get_word_reg(context,reg) (context)->regs[reg].word
|
#define get_word_reg(context,reg) (context)->regs[reg].word
|
|
|
static INLINE
|
static INLINE
|
SItype
|
SItype
|
get_long_mem_da (context, addr)
|
get_long_mem_da (context, addr)
|
sim_state_type *context;
|
sim_state_type *context;
|
int addr;
|
int addr;
|
{
|
{
|
USItype lsw = get_word_mem_da(context,addr+2);
|
USItype lsw = get_word_mem_da(context,addr+2);
|
USItype msw = get_word_mem_da(context, addr);
|
USItype msw = get_word_mem_da(context, addr);
|
|
|
return (msw << 16) + lsw;
|
return (msw << 16) + lsw;
|
}
|
}
|
|
|
static INLINE
|
static INLINE
|
void
|
void
|
put_long_mem_da (context, addr, value)
|
put_long_mem_da (context, addr, value)
|
sim_state_type *context;
|
sim_state_type *context;
|
int addr;
|
int addr;
|
int value;
|
int value;
|
{
|
{
|
put_word_mem_da(context,addr, value>>16);
|
put_word_mem_da(context,addr, value>>16);
|
put_word_mem_da(context,addr+2, value);
|
put_word_mem_da(context,addr+2, value);
|
}
|
}
|
|
|
static INLINE
|
static INLINE
|
int
|
int
|
get_word_mem_ir (context, reg)
|
get_word_mem_ir (context, reg)
|
sim_state_type *context;
|
sim_state_type *context;
|
int reg;
|
int reg;
|
{
|
{
|
return get_word_mem_da (context, get_word_reg (context, reg));
|
return get_word_mem_da (context, get_word_reg (context, reg));
|
}
|
}
|
|
|
static INLINE
|
static INLINE
|
void
|
void
|
put_word_mem_ir (context, reg, value)
|
put_word_mem_ir (context, reg, value)
|
sim_state_type *context;
|
sim_state_type *context;
|
int reg;
|
int reg;
|
int value;
|
int value;
|
{
|
{
|
|
|
put_word_mem_da (context, get_word_reg (context, reg), value);
|
put_word_mem_da (context, get_word_reg (context, reg), value);
|
}
|
}
|
|
|
static INLINE
|
static INLINE
|
int
|
int
|
get_byte_mem_ir (context, reg)
|
get_byte_mem_ir (context, reg)
|
sim_state_type *context;
|
sim_state_type *context;
|
int reg;
|
int reg;
|
{
|
{
|
return get_byte_mem_da (context, get_word_reg (context, reg));
|
return get_byte_mem_da (context, get_word_reg (context, reg));
|
}
|
}
|
|
|
static INLINE
|
static INLINE
|
void
|
void
|
put_byte_mem_ir (context, reg, value)
|
put_byte_mem_ir (context, reg, value)
|
sim_state_type *context;
|
sim_state_type *context;
|
int reg;
|
int reg;
|
int value;
|
int value;
|
{
|
{
|
put_byte_mem_da (context, get_word_reg (context, reg), value);
|
put_byte_mem_da (context, get_word_reg (context, reg), value);
|
}
|
}
|
|
|
static INLINE
|
static INLINE
|
int
|
int
|
get_long_mem_ir (context, reg)
|
get_long_mem_ir (context, reg)
|
sim_state_type *context;
|
sim_state_type *context;
|
int reg;
|
int reg;
|
{
|
{
|
return get_long_mem_da (context, get_word_reg (context, reg));
|
return get_long_mem_da (context, get_word_reg (context, reg));
|
}
|
}
|
|
|
static INLINE
|
static INLINE
|
void
|
void
|
put_long_mem_ir (context, reg, value)
|
put_long_mem_ir (context, reg, value)
|
sim_state_type *context;
|
sim_state_type *context;
|
int reg;
|
int reg;
|
int value;
|
int value;
|
{
|
{
|
|
|
put_long_mem_da (context, get_word_reg (context, reg), value);
|
put_long_mem_da (context, get_word_reg (context, reg), value);
|
}
|
}
|
|
|
static INLINE
|
static INLINE
|
void
|
void
|
put_long_mem_x (context, base, reg, value)
|
put_long_mem_x (context, base, reg, value)
|
sim_state_type *context;
|
sim_state_type *context;
|
int base;
|
int base;
|
int reg;
|
int reg;
|
int value;
|
int value;
|
{
|
{
|
put_long_mem_da (context, get_word_reg (context, reg) + base, value);
|
put_long_mem_da (context, get_word_reg (context, reg) + base, value);
|
}
|
}
|
|
|
static INLINE
|
static INLINE
|
void
|
void
|
put_word_mem_x (context, base, reg, value)
|
put_word_mem_x (context, base, reg, value)
|
sim_state_type *context;
|
sim_state_type *context;
|
int base;
|
int base;
|
int reg;
|
int reg;
|
int value;
|
int value;
|
{
|
{
|
put_word_mem_da (context, get_word_reg (context, reg) + base, value);
|
put_word_mem_da (context, get_word_reg (context, reg) + base, value);
|
}
|
}
|
|
|
static INLINE
|
static INLINE
|
void
|
void
|
put_byte_mem_x (context, base, reg, value)
|
put_byte_mem_x (context, base, reg, value)
|
sim_state_type *context;
|
sim_state_type *context;
|
int base;
|
int base;
|
int reg;
|
int reg;
|
int value;
|
int value;
|
{
|
{
|
put_byte_mem_da (context, get_word_reg (context, reg) + base, value);
|
put_byte_mem_da (context, get_word_reg (context, reg) + base, value);
|
}
|
}
|
|
|
static INLINE
|
static INLINE
|
int
|
int
|
get_word_mem_x (context, base, reg)
|
get_word_mem_x (context, base, reg)
|
sim_state_type *context;
|
sim_state_type *context;
|
int base;
|
int base;
|
int reg;
|
int reg;
|
{
|
{
|
return get_word_mem_da (context, base + get_word_reg (context, reg));
|
return get_word_mem_da (context, base + get_word_reg (context, reg));
|
}
|
}
|
|
|
static INLINE
|
static INLINE
|
int
|
int
|
get_byte_mem_x (context, base, reg)
|
get_byte_mem_x (context, base, reg)
|
sim_state_type *context;
|
sim_state_type *context;
|
int base;
|
int base;
|
int reg;
|
int reg;
|
{
|
{
|
return get_byte_mem_da (context, base + get_word_reg (context, reg));
|
return get_byte_mem_da (context, base + get_word_reg (context, reg));
|
}
|
}
|
|
|
static INLINE
|
static INLINE
|
int
|
int
|
get_long_mem_x (context, base, reg)
|
get_long_mem_x (context, base, reg)
|
sim_state_type *context;
|
sim_state_type *context;
|
int base;
|
int base;
|
int reg;
|
int reg;
|
{
|
{
|
return get_long_mem_da (context, base + get_word_reg (context, reg));
|
return get_long_mem_da (context, base + get_word_reg (context, reg));
|
}
|
}
|
|
|
|
|
static
|
static
|
void
|
void
|
makeflags (context, mask)
|
makeflags (context, mask)
|
sim_state_type *context;
|
sim_state_type *context;
|
int mask;
|
int mask;
|
{
|
{
|
|
|
PSW_ZERO = (context->dst & mask) == 0;
|
PSW_ZERO = (context->dst & mask) == 0;
|
PSW_SIGN = (context->dst >> (context->size - 1));
|
PSW_SIGN = (context->dst >> (context->size - 1));
|
|
|
if (context->broken_flags == TST_FLAGS)
|
if (context->broken_flags == TST_FLAGS)
|
{
|
{
|
extern char the_parity[];
|
extern char the_parity[];
|
|
|
if (context->size == 8)
|
if (context->size == 8)
|
{
|
{
|
PSW_OVERFLOW = the_parity[context->dst & 0xff];
|
PSW_OVERFLOW = the_parity[context->dst & 0xff];
|
}
|
}
|
}
|
}
|
else
|
else
|
{
|
{
|
/* Overflow is set if both operands have the same sign and the
|
/* Overflow is set if both operands have the same sign and the
|
result is of different sign.
|
result is of different sign.
|
|
|
V = A==B && R!=B jumping logic
|
V = A==B && R!=B jumping logic
|
(~(A^B))&(R^B)
|
(~(A^B))&(R^B)
|
V = (A^B)^(R^B) boolean
|
V = (A^B)^(R^B) boolean
|
*/
|
*/
|
|
|
PSW_OVERFLOW =
|
PSW_OVERFLOW =
|
((
|
((
|
(~(context->srca ^ context->srcb)
|
(~(context->srca ^ context->srcb)
|
& (context->srca ^ context->dst))
|
& (context->srca ^ context->dst))
|
) >> (context->size - 1)
|
) >> (context->size - 1)
|
);
|
);
|
|
|
if (context->size < 32)
|
if (context->size < 32)
|
{
|
{
|
PSW_CARRY = ((context->dst >> context->size)) & 1;
|
PSW_CARRY = ((context->dst >> context->size)) & 1;
|
}
|
}
|
else
|
else
|
{
|
{
|
/* carry is set when the result is smaller than a source */
|
/* carry is set when the result is smaller than a source */
|
|
|
|
|
PSW_CARRY = (unsigned) context->dst > (unsigned) context->srca ;
|
PSW_CARRY = (unsigned) context->dst > (unsigned) context->srca ;
|
|
|
}
|
}
|
}
|
}
|
context->broken_flags = 0;
|
context->broken_flags = 0;
|
}
|
}
|
|
|
|
|
/* There are two ways to calculate the flags. We can
|
/* There are two ways to calculate the flags. We can
|
either always calculate them and so the cc will always
|
either always calculate them and so the cc will always
|
be correct, or we can only keep the arguments around and
|
be correct, or we can only keep the arguments around and
|
calc the flags when they're actually going to be used. */
|
calc the flags when they're actually going to be used. */
|
|
|
/* Right now we always calc the flags - I think it may be faster*/
|
/* Right now we always calc the flags - I think it may be faster*/
|
|
|
|
|
#define NORMAL_FLAGS(c,s,d,sa,sb,sub) \
|
#define NORMAL_FLAGS(c,s,d,sa,sb,sub) \
|
if (s == 8) \
|
if (s == 8) \
|
normal_flags_8(c,d,sa,sb,sub); \
|
normal_flags_8(c,d,sa,sb,sub); \
|
else if (s == 16) \
|
else if (s == 16) \
|
normal_flags_16(c,d,sa,sb,sub); \
|
normal_flags_16(c,d,sa,sb,sub); \
|
else if (s == 32) \
|
else if (s == 32) \
|
normal_flags_32(c,d,sa,sb,sub);
|
normal_flags_32(c,d,sa,sb,sub);
|
|
|
static INLINE
|
static INLINE
|
void
|
void
|
normal_flags (context, size, dst, srca, srcb)
|
normal_flags (context, size, dst, srca, srcb)
|
sim_state_type *context;
|
sim_state_type *context;
|
int size;
|
int size;
|
int dst;
|
int dst;
|
int srca;
|
int srca;
|
int srcb;
|
int srcb;
|
{
|
{
|
context->srca = srca;
|
context->srca = srca;
|
context->srcb = srcb;
|
context->srcb = srcb;
|
context->dst = dst;
|
context->dst = dst;
|
context->size = size;
|
context->size = size;
|
context->broken_flags = CMP_FLAGS;
|
context->broken_flags = CMP_FLAGS;
|
}
|
}
|
|
|
static INLINE
|
static INLINE
|
void
|
void
|
TEST_NORMAL_FLAGS (context, size, dst)
|
TEST_NORMAL_FLAGS (context, size, dst)
|
sim_state_type *context;
|
sim_state_type *context;
|
int size;
|
int size;
|
int dst;
|
int dst;
|
{
|
{
|
context->dst = dst;
|
context->dst = dst;
|
context->size = size;
|
context->size = size;
|
context->broken_flags = TST_FLAGS;
|
context->broken_flags = TST_FLAGS;
|
}
|
}
|
|
|
static INLINE
|
static INLINE
|
void
|
void
|
put_ptr_long_reg (context, reg, val)
|
put_ptr_long_reg (context, reg, val)
|
sim_state_type *context;
|
sim_state_type *context;
|
int reg;
|
int reg;
|
int val;
|
int val;
|
{
|
{
|
context->regs[reg].word = (val >> 8) & 0x7f00;
|
context->regs[reg].word = (val >> 8) & 0x7f00;
|
context->regs[reg + 1].word = val;
|
context->regs[reg + 1].word = val;
|
}
|
}
|
|
|
static INLINE
|
static INLINE
|
long
|
long
|
get_ptr_long_reg (context, reg)
|
get_ptr_long_reg (context, reg)
|
sim_state_type *context;
|
sim_state_type *context;
|
int reg;
|
int reg;
|
{
|
{
|
int val;
|
int val;
|
|
|
val = (context->regs[reg].word << 8) | context->regs[reg + 1].word;
|
val = (context->regs[reg].word << 8) | context->regs[reg + 1].word;
|
return val;
|
return val;
|
}
|
}
|
|
|
static INLINE
|
static INLINE
|
long
|
long
|
get_ptr_long_mem_ir (context, reg)
|
get_ptr_long_mem_ir (context, reg)
|
sim_state_type *context;
|
sim_state_type *context;
|
int reg;
|
int reg;
|
{
|
{
|
return sitoptr (get_long_mem_da (context, get_ptr_long_reg (context, reg)));
|
return sitoptr (get_long_mem_da (context, get_ptr_long_reg (context, reg)));
|
}
|
}
|
|
|
static INLINE
|
static INLINE
|
long
|
long
|
get_ptr_long_mem_da (context, addr)
|
get_ptr_long_mem_da (context, addr)
|
sim_state_type *context;
|
sim_state_type *context;
|
long addr;
|
long addr;
|
{
|
{
|
return sitoptr (get_long_mem_da (context, addr));
|
return sitoptr (get_long_mem_da (context, addr));
|
}
|
}
|
|
|
static INLINE
|
static INLINE
|
void
|
void
|
put_ptr_long_mem_da (context, addr, ptr)
|
put_ptr_long_mem_da (context, addr, ptr)
|
sim_state_type *context;
|
sim_state_type *context;
|
long addr;
|
long addr;
|
long ptr;
|
long ptr;
|
{
|
{
|
put_long_mem_da (context, addr, ptrtosi (ptr));
|
put_long_mem_da (context, addr, ptrtosi (ptr));
|
|
|
}
|
}
|
|
|
