#ifndef _BOARD_H_
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#ifndef _BOARD_H_
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#define _BOARD_H_
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#define _BOARD_H_
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#ifdef XESS
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#ifdef XESS
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#define MC_ENABLED 0
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#define MC_ENABLED 0
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#else
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#else
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#define MC_ENABLED 1
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#define MC_ENABLED 1
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#endif
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#endif
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#define IC_ENABLE 0
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#define IC_ENABLE 0
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#define IC_SIZE 8192
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#define IC_SIZE 8192
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#define DC_ENABLE 0
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#define DC_ENABLE 0
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#define DC_SIZE 8192
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#define DC_SIZE 8192
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#define MC_CSR_VAL 0x0B000300
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#define MC_CSR_VAL 0x0B000300
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#define MC_MASK_VAL 0x000000e0
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#define MC_MASK_VAL 0x000000e0
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#define FLASH_BASE_ADD 0x04000000
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#define FLASH_BASE_ADD 0x04000000
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#define FLASH_TMS_VAL 0x00102102
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#define FLASH_TMS_VAL 0x00102102
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#define SDRAM_BASE_ADD 0x00000000
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#define SDRAM_BASE_ADD 0x00000000
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#define SDRAM_TMS_VAL 0x07248230
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#define SDRAM_TMS_VAL 0x07248230
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#ifdef XESS
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#ifdef XESS
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#define IN_CLK 10000000
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#define IN_CLK 10000000
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#else
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#else
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#define IN_CLK 25000000
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#define IN_CLK 25000000
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#endif
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#endif
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#define STACK_SIZE 0x10000
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#define STACK_SIZE 0x10000
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#ifdef XESS
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#ifdef XESS
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#define UART_BAUD_RATE 19200
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#define UART_BAUD_RATE 19200
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#else
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#else
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#define UART_BAUD_RATE 9600 /* 115200 */
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#define UART_BAUD_RATE 9600 /* 115200 */
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#endif
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#endif
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#define UART_BASE 0x90000000
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#define UART_BASE 0x90000000
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#ifdef XESS
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#ifdef XESS
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#define ETH_BASE 0x92000000
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#define ETH_BASE 0x92000000
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#else
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#else
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#define ETH_BASE 0xD0000000
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#define ETH_BASE 0xD0000000
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#endif
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#endif
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#define MC_BASE_ADD 0x60000000
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#define MC_BASE_ADD 0x60000000
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#define ETH0_INT _int_main /* was: 0x00080000 */ /* Not correct */
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#define ETH0_INT _int_main /* was: 0x00080000 */ /* Not correct */
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/*#define ETH_DATA_BASE 0x00020000 Address for ETH_DATA */
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/*#define ETH_DATA_BASE 0x00020000 Address for ETH_DATA */
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#ifdef XESS
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#ifdef XESS
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#define ETH_DATA_BASE 0x00100000 /* Address for ETH_DATA */
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#define ETH_DATA_BASE 0x00100000 /* Address for ETH_DATA */
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#else
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#else
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#define ETH_DATA_BASE 0xa8000000 /* Address for ETH_DATA */
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#define ETH_DATA_BASE 0xa8000000 /* Address for ETH_DATA */
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#endif
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#endif
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#define ETH_MACADDR0 0x00
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#define ETH_MACADDR0 0x00
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#define ETH_MACADDR1 0x09
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#define ETH_MACADDR1 0x09
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#define ETH_MACADDR2 0x12
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#define ETH_MACADDR2 0x12
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#define ETH_MACADDR3 0x34
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#define ETH_MACADDR3 0x34
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#define ETH_MACADDR4 0x56
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#define ETH_MACADDR4 0x56
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#define ETH_MACADDR5 0x00
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#define ETH_MACADDR5 0x00
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#define CRT_ENABLED 1
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#define CRT_ENABLED 1
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#define CRT_BASE_ADD 0xc0000000
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#define CRT_BASE_ADD 0xc0000000
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#define FB_BASE_ADD 0xa8000000
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#define FB_BASE_ADD 0xa8000000
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/* Whether online help is available -- saves space */
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/* Whether online help is available -- saves space */
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#define HELP_ENABLED 1
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#define HELP_ENABLED 1
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#endif
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#endif
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