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[/] [or1k/] [tags/] [nog_patch_34/] [or1ksim/] [peripheral/] [16450.c] - Diff between revs 355 and 361

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/* 16450.c -- Simulation of 8250/16450 serial UART
/* 16450.c -- Simulation of 8250/16450 serial UART
   Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
   Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
 
 
This file is part of OpenRISC 1000 Architectural Simulator.
This file is part of OpenRISC 1000 Architectural Simulator.
 
 
This program is free software; you can redistribute it and/or modify
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
(at your option) any later version.
 
 
This program is distributed in the hope that it will be useful,
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.
GNU General Public License for more details.
 
 
You should have received a copy of the GNU General Public License
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 
 
/* This is functional simulation of 8250/16450 UARTs. Since we RX/TX data
/* This is functional simulation of 8250/16450 UARTs. Since we RX/TX data
   via file streams, we can't simulate modem control lines coming from the
   via file streams, we can't simulate modem control lines coming from the
   DCE and similar details of communication with the DCE.
   DCE and similar details of communication with the DCE.
 
 
   This simulated UART device is intended for basic UART device driver
   This simulated UART device is intended for basic UART device driver
   verification. From device driver perspective this device looks like a
   verification. From device driver perspective this device looks like a
   regular UART but never reports and modem control lines changes (the
   regular UART but never reports and modem control lines changes (the
   only DCE responses are incoming characters from the file stream).
   only DCE responses are incoming characters from the file stream).
*/
*/
 
 
#include <stdlib.h>
#include <stdlib.h>
#include <stdio.h>
#include <stdio.h>
#include <string.h>
#include <string.h>
 
 
#include "abstract.h"
#include "abstract.h"
#include "16450.h"
#include "16450.h"
#include "sim-config.h"
#include "sim-config.h"
#include "pic.h"
#include "pic.h"
#include "vapi.h"
#include "vapi.h"
 
 
static struct dev_16450 uarts[NR_UARTS];
static struct dev_16450 uarts[NR_UARTS];
static int thre_int;
static int thre_int;
 
 
/* Number of clock cycles (one clock cycle is one call to the uart_clock())
/* Number of clock cycles (one clock cycle is one call to the uart_clock())
   before a single character is transmitted or received. */
   before a single character is transmitted or received. */
static unsigned long char_clks(int dll, int dlh, int lcr)
static unsigned long char_clks(int dll, int dlh, int lcr)
{
{
  float bauds_per_char = 0;
  float bauds_per_char = 0;
  unsigned long char_clks = (dlh << 8) + dll;
  unsigned long char_clks = (dlh << 8) + dll;
 
 
  if (lcr & UART_LCR_PARITY)
  if (lcr & UART_LCR_PARITY)
    bauds_per_char = bauds_per_char + 1.;
    bauds_per_char = bauds_per_char + 1.;
 
 
  /* stop bits 1 or two */
  /* stop bits 1 or two */
  if (lcr & UART_LCR_STOP)
  if (lcr & UART_LCR_STOP)
    bauds_per_char = bauds_per_char + 2.;
    bauds_per_char = bauds_per_char + 2.;
  else
  else
    if ((lcr & 0x3) != 0)
    if ((lcr & 0x3) != 0)
      bauds_per_char = bauds_per_char + 1.;
      bauds_per_char = bauds_per_char + 1.;
    else
    else
      bauds_per_char = bauds_per_char + 1.5;
      bauds_per_char = bauds_per_char + 1.5;
 
 
  bauds_per_char = bauds_per_char + (5. + (lcr & 0x3));
  bauds_per_char = bauds_per_char + (5. + (lcr & 0x3));
 
 
  return char_clks * bauds_per_char;
  return char_clks * bauds_per_char;
}
}
 
 
/* Set a specific UART register with value. */
/* Set a specific UART register with value. */
void uart_write_byte(unsigned long addr, unsigned long value)
void uart_write_byte(unsigned long addr, unsigned long value)
{
{
  int chipsel;
  int chipsel;
 
 
  debug(4, "uart_write_byte(%x,%02x)\n", addr, (unsigned)value);
  debug(4, "uart_write_byte(%x,%02x)\n", addr, (unsigned)value);
 
 
  for(chipsel = 0; chipsel < NR_UARTS; chipsel++)
  for(chipsel = 0; chipsel < NR_UARTS; chipsel++)
    if ((addr & ~(UART_ADDR_SPACE-1)) == config.uarts[chipsel].baseaddr)
    if ((addr & ~(UART_ADDR_SPACE-1)) == config.uarts[chipsel].baseaddr)
      break;
      break;
  if (chipsel >= NR_UARTS) return;
  if (chipsel >= NR_UARTS) return;
 
 
  if (uarts[chipsel].regs.lcr & UART_LCR_DLAB) {
  if (uarts[chipsel].regs.lcr & UART_LCR_DLAB) {
    switch (addr % UART_ADDR_SPACE) {
    switch (addr % UART_ADDR_SPACE) {
      case UART_DLL:
      case UART_DLL:
        uarts[chipsel].regs.dll = value;
        uarts[chipsel].regs.dll = value;
        uarts[chipsel].char_clks = char_clks(uarts[chipsel].regs.dll, uarts[chipsel].regs.dlh, uarts[chipsel].regs.lcr);
        uarts[chipsel].char_clks = char_clks(uarts[chipsel].regs.dll, uarts[chipsel].regs.dlh, uarts[chipsel].regs.lcr);
        return;
        return;
      case UART_DLH:
      case UART_DLH:
        uarts[chipsel].regs.dlh = value;
        uarts[chipsel].regs.dlh = value;
        return;
        return;
    }
    }
  }
  }
 
 
  switch (addr % UART_ADDR_SPACE) {
  switch (addr % UART_ADDR_SPACE) {
    case UART_TXBUF:
    case UART_TXBUF:
      if (uarts[chipsel].istat.txbuf_full < uarts[chipsel].fifo_len) {
      if (uarts[chipsel].istat.txbuf_full < uarts[chipsel].fifo_len) {
        uarts[chipsel].istat.txbuf_full++;
        uarts[chipsel].istat.txbuf_full++;
        uarts[chipsel].regs.txbuf[uarts[chipsel].istat.txbuf_head] = value;
        uarts[chipsel].regs.txbuf[uarts[chipsel].istat.txbuf_head] = value;
        uarts[chipsel].istat.txbuf_head = (uarts[chipsel].istat.txbuf_head + 1) % uarts[chipsel].fifo_len;
        uarts[chipsel].istat.txbuf_head = (uarts[chipsel].istat.txbuf_head + 1) % uarts[chipsel].fifo_len;
      } else
      } else
        uarts[chipsel].regs.txbuf[uarts[chipsel].istat.txbuf_head] = value;
        uarts[chipsel].regs.txbuf[uarts[chipsel].istat.txbuf_head] = value;
 
 
      if (uarts[chipsel].istat.txbuf_full < uarts[chipsel].fifo_len)
      if (uarts[chipsel].istat.txbuf_full < uarts[chipsel].fifo_len)
        uarts[chipsel].regs.lsr &= ~UART_LSR_TXBUFE;
        uarts[chipsel].regs.lsr &= ~UART_LSR_TXBUFE;
      else
      else
        uarts[chipsel].regs.lsr |= UART_LSR_TXBUFE;
        uarts[chipsel].regs.lsr |= UART_LSR_TXBUFE;
      uarts[chipsel].regs.lsr &= ~UART_LSR_TXSERE;
      uarts[chipsel].regs.lsr &= ~UART_LSR_TXSERE;
 
 
      uarts[chipsel].istat.thre_int = 0;
      uarts[chipsel].istat.thre_int = 0;
      break;
      break;
    case UART_IER:
    case UART_IER:
      uarts[chipsel].regs.ier = value & UART_VALID_IER;
      uarts[chipsel].regs.ier = value & UART_VALID_IER;
      break;
      break;
    case UART_LCR:
    case UART_LCR:
      uarts[chipsel].regs.lcr = value & UART_VALID_LCR;
      uarts[chipsel].regs.lcr = value & UART_VALID_LCR;
      break;
      break;
    case UART_MCR:
    case UART_MCR:
      uarts[chipsel].regs.mcr = value & UART_VALID_MCR;
      uarts[chipsel].regs.mcr = value & UART_VALID_MCR;
      break;
      break;
    case UART_SCR:
    case UART_SCR:
      uarts[chipsel].regs.scr = value;
      uarts[chipsel].regs.scr = value;
      break;
      break;
    default:
    default:
      debug(1, "write out of range (addr %x)\n", addr);
      debug(1, "write out of range (addr %x)\n", addr);
  }
  }
}
}
 
 
/* Read a specific UART register. */
/* Read a specific UART register. */
unsigned long uart_read_byte(unsigned long addr)
unsigned long uart_read_byte(unsigned long addr)
{
{
  unsigned char value = 0;
  unsigned char value = 0;
  int chipsel;
  int chipsel;
 
 
  debug(4, "uart_read_byte(%x)", addr);
  debug(4, "uart_read_byte(%x)", addr);
 
 
  for(chipsel = 0; chipsel < NR_UARTS; chipsel++)
  for(chipsel = 0; chipsel < NR_UARTS; chipsel++)
    if ((addr & ~(UART_ADDR_SPACE-1)) == config.uarts[chipsel].baseaddr)
    if ((addr & ~(UART_ADDR_SPACE-1)) == config.uarts[chipsel].baseaddr)
      break;
      break;
 
 
  if (chipsel >= NR_UARTS)
  if (chipsel >= NR_UARTS)
    return 0;
    return 0;
 
 
  if (uarts[chipsel].regs.lcr & UART_LCR_DLAB) {
  if (uarts[chipsel].regs.lcr & UART_LCR_DLAB) {
    switch (addr % UART_ADDR_SPACE) {
    switch (addr % UART_ADDR_SPACE) {
      case UART_DLL:
      case UART_DLL:
        value = uarts[chipsel].regs.dll;
        value = uarts[chipsel].regs.dll;
        debug(4, "= %x\n", value);
        debug(4, "= %x\n", value);
        return value;
        return value;
      case UART_DLH:
      case UART_DLH:
        value = uarts[chipsel].regs.dlh;
        value = uarts[chipsel].regs.dlh;
        debug(4, "= %x\n", value);
        debug(4, "= %x\n", value);
        return value;
        return value;
    }
    }
  }
  }
 
 
  switch (addr % UART_ADDR_SPACE) {
  switch (addr % UART_ADDR_SPACE) {
    case UART_RXBUF:
    case UART_RXBUF:
      if (uarts[chipsel].istat.rxbuf_full) {
      if (uarts[chipsel].istat.rxbuf_full) {
        value = uarts[chipsel].regs.rxbuf[uarts[chipsel].istat.rxbuf_tail];
        value = uarts[chipsel].regs.rxbuf[uarts[chipsel].istat.rxbuf_tail];
        uarts[chipsel].istat.rxbuf_tail = (uarts[chipsel].istat.rxbuf_tail + 1) % uarts[chipsel].fifo_len;
        uarts[chipsel].istat.rxbuf_tail = (uarts[chipsel].istat.rxbuf_tail + 1) % uarts[chipsel].fifo_len;
        uarts[chipsel].istat.rxbuf_full--;
        uarts[chipsel].istat.rxbuf_full--;
      }
      }
 
 
      if (uarts[chipsel].istat.rxbuf_full)
      if (uarts[chipsel].istat.rxbuf_full)
        uarts[chipsel].regs.lsr |= UART_LSR_RDRDY;
        uarts[chipsel].regs.lsr |= UART_LSR_RDRDY;
      else
      else
        uarts[chipsel].regs.lsr &= ~UART_LSR_RDRDY;
        uarts[chipsel].regs.lsr &= ~UART_LSR_RDRDY;
      break;
      break;
    case UART_IER:
    case UART_IER:
      value = uarts[chipsel].regs.ier & UART_VALID_IER;
      value = uarts[chipsel].regs.ier & UART_VALID_IER;
      break;
      break;
    case UART_IIR:
    case UART_IIR:
      value = (uarts[chipsel].regs.iir & UART_VALID_IIR) | 0xc0;
      value = (uarts[chipsel].regs.iir & UART_VALID_IIR) | 0xc0;
      uarts[chipsel].istat.thre_int = 0;
      uarts[chipsel].istat.thre_int = 0;
      break;
      break;
    case UART_LCR:
    case UART_LCR:
      value = uarts[chipsel].regs.lcr & UART_VALID_LCR;
      value = uarts[chipsel].regs.lcr & UART_VALID_LCR;
      break;
      break;
    case UART_MCR:
    case UART_MCR:
      value = 0;
      value = 0;
      break;
      break;
    case UART_LSR:
    case UART_LSR:
      value = uarts[chipsel].regs.lsr & UART_VALID_LSR;
      value = uarts[chipsel].regs.lsr & UART_VALID_LSR;
      uarts[chipsel].regs.lsr &=
      uarts[chipsel].regs.lsr &=
        ~(UART_LSR_OVRRUN | UART_LSR_PARITY
        ~(UART_LSR_OVRRUN | UART_LSR_PARITY
         | UART_LSR_FRAME | UART_LSR_BREAK);
         | UART_LSR_FRAME | UART_LSR_BREAK);
      break;
      break;
    case UART_MSR:
    case UART_MSR:
      value = uarts[chipsel].regs.msr & UART_VALID_MSR;
      value = uarts[chipsel].regs.msr & UART_VALID_MSR;
      uarts[chipsel].regs.msr = 0;
      uarts[chipsel].regs.msr = 0;
      break;
      break;
    case UART_SCR:
    case UART_SCR:
      value = uarts[chipsel].regs.scr;
      value = uarts[chipsel].regs.scr;
      break;
      break;
    default:
    default:
      debug(1, "read out of range (addr %x)\n", addr);
      debug(1, "read out of range (addr %x)\n", addr);
  }
  }
  debug(4, " = %x\n", value);
  debug(4, " = %x\n", value);
  return value;
  return value;
}
}
 
 
/* Function that handles incoming VAPI data.  */
/* Function that handles incoming VAPI data.  */
void uart_vapi_read (unsigned long id, unsigned long data)
void uart_vapi_read (unsigned long id, unsigned long data)
{
{
  int uart;
  int uart;
  debug(4, "UART: id %08x, data %08x\n", id, data);
  debug(4, "UART: id %08x, data %08x\n", id, data);
  uart = id & VAPI_DEVICE_ID;
  uart = id & VAPI_DEVICE_ID;
  uarts[uart].vapi_buf[uarts[uart].vapi_buf_head_ptr] = data;
  uarts[uart].vapi_buf[uarts[uart].vapi_buf_head_ptr] = data;
  uarts[uart].vapi_buf_head_ptr = (uarts[uart].vapi_buf_head_ptr + 1) % UART_RX_BUF;
  uarts[uart].vapi_buf_head_ptr = (uarts[uart].vapi_buf_head_ptr + 1) % UART_RX_BUF;
  if (uarts[uart].vapi_buf_tail_ptr == uarts[uart].vapi_buf_head_ptr) {
  if (uarts[uart].vapi_buf_tail_ptr == uarts[uart].vapi_buf_head_ptr) {
    fprintf (stderr, "FATAL: uart VAPI buffer to small.\n");
    fprintf (stderr, "FATAL: uart VAPI buffer to small.\n");
    exit (1);
    exit (1);
  }
  }
}
}
 
 
/* Reset.  It initializes all registers of all UART devices to zero values,
/* Reset.  It initializes all registers of all UART devices to zero values,
   (re)opens all RX/TX file streams and places devices in memory address
   (re)opens all RX/TX file streams and places devices in memory address
   space.  */
   space.  */
void uart_reset()
void uart_reset()
{
{
  int i;
  int i;
 
 
  if (!config.uarts_enabled)
  if (!config.uarts_enabled)
    config.nuarts = 0;
    config.nuarts = 0;
 
 
  if (config.sim.verbose && config.nuarts)
  if (config.sim.verbose && config.nuarts)
    printf("Resetting %u UART(s).\n", config.nuarts);
    printf("Resetting %u UART(s).\n", config.nuarts);
 
 
  memset(uarts, 0, sizeof(uarts));
  memset(uarts, 0, sizeof(uarts));
 
 
  for(i = 0; i < config.nuarts; i++) {
  for(i = 0; i < config.nuarts; i++) {
    if (config.uarts[i].vapi_id) {
    if (config.uarts[i].vapi_id) {
      if ((config.uarts[i].vapi_id & VAPI_DEVICE_ID) != i) {
      if ((config.uarts[i].vapi_id & VAPI_DEVICE_ID) != i) {
        fprintf (stderr, "ERROR: Wrong vapi_id (0x%x) for uart %i, last byte is required to be %02x; ignoring.\n", config.uarts[i].vapi_id, i, i);
        fprintf (stderr, "ERROR: Wrong vapi_id (0x%x) for uart %i, last byte is required to be %02x; ignoring.\n", config.uarts[i].vapi_id, i, i);
        config.uarts[i].vapi_id = 0;
        config.uarts[i].vapi_id = 0;
        uarts[i].txfs = 0;
        uarts[i].txfs = 0;
      } else {
      } else {
        vapi_install_handler (config.uarts[i].vapi_id, uart_vapi_read);
        vapi_install_handler (config.uarts[i].vapi_id, uart_vapi_read);
        register_memoryarea(config.uarts[i].baseaddr, UART_ADDR_SPACE, 1, uart_read_byte, uart_write_byte);
        register_memoryarea(config.uarts[i].baseaddr, UART_ADDR_SPACE, 1, uart_read_byte, uart_write_byte);
      }
      }
    } else if (config.uarts[i].txfile) { /* MM: Try to create stream.  */
    } else if (config.uarts[i].txfile) { /* MM: Try to create stream.  */
      if (!(uarts[i].rxfs = fopen(config.uarts[i].rxfile, "r"))
      if (!(uarts[i].rxfs = fopen(config.uarts[i].rxfile, "r"))
        && !(uarts[i].rxfs = fopen(config.uarts[i].rxfile, "r+"))) {
        && !(uarts[i].rxfs = fopen(config.uarts[i].rxfile, "r+"))) {
        fprintf(stderr, "WARNING: UART%d has problems with RX file stream.\n", i);
        debug (0, "WARNING: UART%d has problems with RX file stream.\n", i);
        continue;
        continue;
      }
      }
      uarts[i].txfs = fopen(config.uarts[i].txfile, "a");
      uarts[i].txfs = fopen(config.uarts[i].txfile, "a");
      if (uarts[i].rxfs && uarts[i].txfs && config.sim.verbose) {
      if (uarts[i].rxfs && uarts[i].txfs && config.sim.verbose) {
        printf("UART%d at 0x%.8x uses ", i, config.uarts[i].baseaddr);
        printf("UART%d at 0x%.8x uses ", i, config.uarts[i].baseaddr);
        printf("%s for RX and %s for TX.\n", config.uarts[i].rxfile, config.uarts[i].txfile);
        printf("%s for RX and %s for TX.\n", config.uarts[i].rxfile, config.uarts[i].txfile);
      } else
      } else
        fprintf(stderr, "WARNING: UART%d has problems with TX file stream.\n", i);
        debug (1, "WARNING: UART%d has problems with TX file stream.\n", i);
      register_memoryarea(config.uarts[i].baseaddr, UART_ADDR_SPACE, 1, uart_read_byte, uart_write_byte);
      register_memoryarea(config.uarts[i].baseaddr, UART_ADDR_SPACE, 1, uart_read_byte, uart_write_byte);
    }
    }
 
 
    if (config.uarts[i].uart16550)
    if (config.uarts[i].uart16550)
      uarts[i].fifo_len = 16;
      uarts[i].fifo_len = 16;
    else
    else
      uarts[i].fifo_len = 1;
      uarts[i].fifo_len = 1;
 
 
    uarts[i].istat.rxbuf_head = uarts[i].istat.rxbuf_tail = 0;
    uarts[i].istat.rxbuf_head = uarts[i].istat.rxbuf_tail = 0;
    uarts[i].istat.txbuf_head = uarts[i].istat.txbuf_tail = 0;
    uarts[i].istat.txbuf_head = uarts[i].istat.txbuf_tail = 0;
 
 
    uarts[i].regs.lcr = UART_LCR_RESET;
    uarts[i].regs.lcr = UART_LCR_RESET;
  }
  }
}
}
 
 
/* Simulation hook. Must be called every clock cycle to simulate all UART
/* Simulation hook. Must be called every clock cycle to simulate all UART
   devices. It does internal functional UART simulation. */
   devices. It does internal functional UART simulation. */
void uart_clock()
void uart_clock()
{
{
  int i, retval;
  int i, retval;
 
 
  for(i = 0; i < config.nuarts; i++) {
  for(i = 0; i < config.nuarts; i++) {
    /* If VAPI is not selected, UART communicates with two file streams;
    /* If VAPI is not selected, UART communicates with two file streams;
       if VAPI is selected, we use VAPI streams.  */
       if VAPI is selected, we use VAPI streams.  */
 
 
    /* if txfs is corrupted, skip this uart. */
    /* if txfs is corrupted, skip this uart. */
    if (!config.uarts[i].vapi_id && !uarts[i].txfs) continue;
    if (!config.uarts[i].vapi_id && !uarts[i].txfs) continue;
 
 
    /* Transmit */
    /* Transmit */
    if (!uarts[i].istat.txser_full) {
    if (!uarts[i].istat.txser_full) {
      uarts[i].regs.lsr |= UART_LSR_TXBUFE;
      uarts[i].regs.lsr |= UART_LSR_TXBUFE;
      if (uarts[i].istat.txbuf_full) {
      if (uarts[i].istat.txbuf_full) {
        uarts[i].iregs.txser = uarts[i].regs.txbuf[uarts[i].istat.txbuf_tail];
        uarts[i].iregs.txser = uarts[i].regs.txbuf[uarts[i].istat.txbuf_tail];
        uarts[i].istat.txbuf_tail = (uarts[i].istat.txbuf_tail + 1) % uarts[i].fifo_len;
        uarts[i].istat.txbuf_tail = (uarts[i].istat.txbuf_tail + 1) % uarts[i].fifo_len;
        uarts[i].istat.txser_full = 1;
        uarts[i].istat.txser_full = 1;
        uarts[i].istat.txbuf_full--;
        uarts[i].istat.txbuf_full--;
        uarts[i].regs.lsr &= ~UART_LSR_TXSERE;
        uarts[i].regs.lsr &= ~UART_LSR_TXSERE;
        uarts[i].istat.thre_int = 1;
        uarts[i].istat.thre_int = 1;
      } else
      } else
        uarts[i].regs.lsr |= UART_LSR_TXSERE;
        uarts[i].regs.lsr |= UART_LSR_TXSERE;
    } else if (uarts[i].char_clks >= uarts[i].istat.txser_clks++) {
    } else if (uarts[i].char_clks >= uarts[i].istat.txser_clks++) {
      debug(4, "TX \'%c\' via UART%d...\n", uarts[i].iregs.txser, i);
      debug(4, "TX \'%c\' via UART%d...\n", uarts[i].iregs.txser, i);
      if (uarts[i].regs.mcr & UART_MCR_LOOP)
      if (uarts[i].regs.mcr & UART_MCR_LOOP)
        uarts[i].iregs.loopback = uarts[i].iregs.txser;
        uarts[i].iregs.loopback = uarts[i].iregs.txser;
      else {
      else {
        /* Send to either VAPI or to file */
        /* Send to either VAPI or to file */
        if (config.uarts[i].vapi_id) {
        if (config.uarts[i].vapi_id) {
          int par, pe, fe, nbits = (uarts[i].regs.lcr & UART_LCR_WLEN8) + 5;
          int par, pe, fe, nbits = (uarts[i].regs.lcr & UART_LCR_WLEN8) + 5;
          int i, data;
          int j, data;
          unsigned long packet = 0;
          unsigned long packet = 0;
 
 
          /* Encode a packet */
          /* Encode a packet */
          packet = uarts[i].regs.lcr & ((1 << nbits) - 1);
          packet = uarts[i].iregs.txser & ((1 << nbits) - 1);
 
 
          /* Calculate parity */
          /* Calculate parity */
          for (i = 0; i < nbits; i++)
          for (j = 0, par = 0; j < nbits; j++)
            par ^= (packet >> i) & 1;
            par ^= (packet >> j) & 1;
 
 
          if (uarts[i].regs.lcr & UART_LCR_PARITY) {
          if (uarts[i].regs.lcr & UART_LCR_PARITY) {
            if (uarts[i].regs.lcr & UART_LCR_SPAR) {
            if (uarts[i].regs.lcr & UART_LCR_SPAR) {
              packet |= 1 << nbits;
              packet |= 1 << nbits;
            } else {
            } else {
              if (uarts[i].regs.lcr & UART_LCR_EPAR)
              if (uarts[i].regs.lcr & UART_LCR_EPAR)
                packet |= par << nbits;
                packet |= par << nbits;
              else
              else
                packet |= (par ^ 1) << nbits;
                packet |= (par ^ 1) << nbits;
            }
            }
            nbits++;
            nbits++;
          }
          }
          packet |= 1 << (nbits++);
          packet |= 1 << (nbits++);
          if (uarts[i].regs.lcr & UART_LCR_STOP)
          if (uarts[i].regs.lcr & UART_LCR_STOP)
            packet |= 1 << (nbits++);
            packet |= 1 << (nbits++);
 
 
          /* Decode a packet */
          /* Decode a packet */
          nbits = (uarts[i].vapi.lcr & UART_LCR_WLEN8) + 5;
          nbits = (uarts[i].vapi.lcr & UART_LCR_WLEN8) + 5;
          data = packet & ((1 << nbits) - 1);
          data = packet & ((1 << nbits) - 1);
 
 
          /* Calculate parity, including parity bit */
          /* Calculate parity, including parity bit */
          for (i = 0; i < nbits + 1; i++)
          for (j = 0, par = 0; j < nbits + 1; j++)
            par ^= (packet >> i) & 1;
            par ^= (packet >> j) & 1;
 
 
          if (uarts[i].vapi.lcr & UART_LCR_PARITY) {
          if (uarts[i].vapi.lcr & UART_LCR_PARITY) {
            if (uarts[i].vapi.lcr & UART_LCR_SPAR) {
            if (uarts[i].vapi.lcr & UART_LCR_SPAR) {
              pe = !((packet >> nbits) & 1);
              pe = !((packet >> nbits) & 1);
            } else {
            } else {
              if (uarts[i].vapi.lcr & UART_LCR_EPAR)
              if (uarts[i].vapi.lcr & UART_LCR_EPAR)
                pe = par != 0;
                pe = par != 0;
              else
              else
                pe = par != 1;
                pe = par != 1;
            }
            }
            nbits++;
            nbits++;
          } else
          } else
            pe = 0;
            pe = 0;
 
 
          fe |= ((packet >> (nbits++)) & 1) ^ 1;
          fe = ((packet >> (nbits++)) & 1) ^ 1;
          if (uarts[i].vapi.lcr & UART_LCR_STOP)
          if (uarts[i].vapi.lcr & UART_LCR_STOP)
            fe |= ((packet >> (nbits++)) & 1) ^ 1;
            fe |= ((packet >> (nbits++)) & 1) ^ 1;
 
 
          printf ("%08x %08x\n", config.uarts[i].vapi_id, data | (uarts[i].vapi.lcr << 8) | (pe << 16) | (fe << 17));
          debug (4, "vapi_send (%08x, %08x)\n", config.uarts[i].vapi_id, data | (uarts[i].vapi.lcr << 8) | (pe << 16) | (fe << 17));
          vapi_send (config.uarts[i].vapi_id, data | (uarts[i].vapi.lcr << 8) | (pe << 16) | (fe << 17));
          vapi_send (config.uarts[i].vapi_id, data | (uarts[i].vapi.lcr << 8) | (pe << 16) | (fe << 17));
        } else {
        } else {
          fputc((int)(uarts[i].iregs.txser & 0xFF), uarts[i].txfs);
          fputc((int)(uarts[i].iregs.txser & 0xFF), uarts[i].txfs);
          fflush(uarts[i].txfs);
          fflush(uarts[i].txfs);
        }
        }
      }
      }
      uarts[i].istat.txser_full = 0;
      uarts[i].istat.txser_full = 0;
      uarts[i].istat.txser_clks = 0;
      uarts[i].istat.txser_clks = 0;
    }
    }
 
 
    /* Receive */
    /* Receive */
    if (uarts[i].istat.rxser_full) {
    if (uarts[i].istat.rxser_full) {
      if (uarts[i].char_clks >= uarts[i].istat.rxser_clks++) {
      if (uarts[i].char_clks >= uarts[i].istat.rxser_clks++) {
        debug(4, "Receiving via UART%d...\n", i);
        debug(4, "Receiving via UART%d...\n", i);
        uarts[i].istat.rxser_full = 0;
        uarts[i].istat.rxser_full = 0;
        uarts[i].istat.rxser_clks = 0;
        uarts[i].istat.rxser_clks = 0;
 
 
        if (++uarts[i].istat.rxbuf_full > uarts[i].fifo_len)
        if (++uarts[i].istat.rxbuf_full > uarts[i].fifo_len)
          uarts[i].regs.lsr |= UART_LSR_OVRRUN;
          uarts[i].regs.lsr |= UART_LSR_OVRRUN;
        else {
        else {
          uarts[i].regs.rxbuf[uarts[i].istat.rxbuf_head] = uarts[i].iregs.rxser & 0xFF;
          uarts[i].regs.rxbuf[uarts[i].istat.rxbuf_head] = uarts[i].iregs.rxser & 0xFF;
          uarts[i].istat.rxbuf_head = (uarts[i].istat.rxbuf_head + 1) % uarts[i].fifo_len;
          uarts[i].istat.rxbuf_head = (uarts[i].istat.rxbuf_head + 1) % uarts[i].fifo_len;
          uarts[i].istat.rxbuf_full++;
          uarts[i].istat.rxbuf_full++;
        }
        }
        uarts[i].regs.lsr |= UART_LSR_RDRDY;
        uarts[i].regs.lsr |= UART_LSR_RDRDY;
      }
      }
    }
    }
 
 
    /* Check if there is something waiting, and put it into rxser */
    /* Check if there is something waiting, and put it into rxser */
    if (uarts[i].regs.mcr & UART_MCR_LOOP) {
    if (uarts[i].regs.mcr & UART_MCR_LOOP) {
      uarts[i].iregs.rxser = uarts[i].iregs.loopback;
      uarts[i].iregs.rxser = uarts[i].iregs.loopback;
      uarts[i].istat.rxser_full = 1;
      uarts[i].istat.rxser_full = 1;
    } else {
    } else {
      if (!config.uarts[i].vapi_id) {
      if (!config.uarts[i].vapi_id) {
        if((retval = fgetc(uarts[i].rxfs)) != EOF)
        if((retval = fgetc(uarts[i].rxfs)) != EOF)
          uarts[i].iregs.rxser = (char)retval;
          uarts[i].iregs.rxser = (char)retval;
          uarts[i].istat.rxser_full = 1;
          uarts[i].istat.rxser_full = 1;
      } else { /* VAPI */
      } else { /* VAPI */
        int received = 0;
        int received = 0;
 
        /* do not handle commands while receiving */
 
        if (uarts[i].istat.rxser_full)
 
          break;
        while (!received) {
        while (!received) {
          if (uarts[i].vapi_buf_head_ptr != uarts[i].vapi_buf_tail_ptr) {
          if (uarts[i].vapi_buf_head_ptr != uarts[i].vapi_buf_tail_ptr) {
            unsigned long data = uarts[i].vapi_buf[uarts[i].vapi_buf_tail_ptr];
            unsigned long data = uarts[i].vapi_buf[uarts[i].vapi_buf_tail_ptr];
            uarts[i].vapi_buf_tail_ptr = (uarts[i].vapi_buf_tail_ptr + 1) % uarts[i].fifo_len;
            uarts[i].vapi_buf_tail_ptr = (uarts[i].vapi_buf_tail_ptr + 1) % uarts[i].fifo_len;
            switch (data >> 24) {
            switch (data >> 24) {
              case 0x00:
              case 0x00:
                uarts[i].vapi.lcr = (data >> 8) & 0xff;
                uarts[i].vapi.lcr = (data >> 8) & 0xff;
                /* Put data into rx fifo */
                /* Put data into rx fifo */
                uarts[i].vapi.char_clks = char_clks (uarts[i].vapi.dll, uarts[i].vapi.dlh, uarts[i].vapi.lcr);
                uarts[i].vapi.char_clks = char_clks (uarts[i].vapi.dll, uarts[i].vapi.dlh, uarts[i].vapi.lcr);
                if (uarts[i].vapi.lcr != uarts[i].regs.lcr || uarts[i].vapi.char_clks != uarts[i].char_clks
                if (uarts[i].vapi.lcr != uarts[i].regs.lcr || uarts[i].vapi.char_clks != uarts[i].char_clks
                 || uarts[i].vapi.skew < -MAX_SKEW || uarts[i].vapi.skew > MAX_SKEW) {
                 || uarts[i].vapi.skew < -MAX_SKEW || uarts[i].vapi.skew > MAX_SKEW) {
                  fprintf (stderr, "WARNING: unmatched VAPI and uart modes.\n");
                  debug (3, "WARNING: unmatched VAPI and uart modes.\n");
                  /* Set error bits */
                  /* Set error bits */
                  uarts[i].regs.lsr |= UART_LSR_PARITY | UART_LSR_FRAME;
                  uarts[i].regs.lsr |= UART_LSR_PARITY | UART_LSR_FRAME;
                  break;
                  break;
                } else {
                } else {
                  uarts[i].iregs.rxser = data & 0xff;
                  uarts[i].iregs.rxser = data & 0xff;
                  uarts[i].istat.rxser_full = 1;
                  uarts[i].istat.rxser_full = 1;
                }
                }
                received = 1;
                received = 1;
                break;
                break;
              case 0x01:
              case 0x01:
                uarts[i].vapi.dll = (data >> 0) & 0xff;
                uarts[i].vapi.dll = (data >> 0) & 0xff;
                uarts[i].vapi.dlh = (data >> 8) & 0xff;
                uarts[i].vapi.dlh = (data >> 8) & 0xff;
                break;
                break;
              case 0x02:
              case 0x02:
                uarts[i].vapi.lcr = data & 0xff;
                uarts[i].vapi.lcr = (data >> 8) & 0xff;
                break;
                break;
              case 0x03:
              case 0x03:
                uarts[i].vapi.skew = (signed short)(data & 0xffff);
                uarts[i].vapi.skew = (signed short)(data & 0xffff);
                break;
                break;
              default:
              default:
                fprintf (stderr, "WARNING: Invalid vapi command %02x\n", data >> 24);
                debug (0, "WARNING: Invalid vapi command %02x\n", data >> 24);
                break;
                break;
            }
            }
          } else break;
          } else break;
        }
        }
      }
      }
    }
    }
 
 
    /* Loopback */
    /* Loopback */
    if (uarts[i].regs.mcr & UART_MCR_LOOP) {
    if (uarts[i].regs.mcr & UART_MCR_LOOP) {
      debug(5, "uart_clock: Loopback\n");
      debug(5, "uart_clock: Loopback\n");
      if ((uarts[i].regs.mcr & UART_MCR_AUX2) !=
      if ((uarts[i].regs.mcr & UART_MCR_AUX2) !=
          ((uarts[i].regs.msr & UART_MSR_DCD) >> 4))
          ((uarts[i].regs.msr & UART_MSR_DCD) >> 4))
        uarts[i].regs.msr |= UART_MSR_DDCD;
        uarts[i].regs.msr |= UART_MSR_DDCD;
      if ((uarts[i].regs.mcr & UART_MCR_AUX1) <
      if ((uarts[i].regs.mcr & UART_MCR_AUX1) <
          ((uarts[i].regs.msr & UART_MSR_RI) >> 4))
          ((uarts[i].regs.msr & UART_MSR_RI) >> 4))
        uarts[i].regs.msr |= UART_MSR_TERI;
        uarts[i].regs.msr |= UART_MSR_TERI;
      if ((uarts[i].regs.mcr & UART_MCR_RTS) !=
      if ((uarts[i].regs.mcr & UART_MCR_RTS) !=
          ((uarts[i].regs.msr & UART_MSR_CTS) >> 3))
          ((uarts[i].regs.msr & UART_MSR_CTS) >> 3))
        uarts[i].regs.msr |= UART_MSR_DCTS;
        uarts[i].regs.msr |= UART_MSR_DCTS;
      if ((uarts[i].regs.mcr & UART_MCR_DTR) !=
      if ((uarts[i].regs.mcr & UART_MCR_DTR) !=
          ((uarts[i].regs.msr & UART_MSR_DSR) >> 5))
          ((uarts[i].regs.msr & UART_MSR_DSR) >> 5))
        uarts[i].regs.msr |= UART_MSR_DDSR;
        uarts[i].regs.msr |= UART_MSR_DDSR;
      uarts[i].regs.msr &= ~(UART_MSR_DCD | UART_MSR_RI
      uarts[i].regs.msr &= ~(UART_MSR_DCD | UART_MSR_RI
                | UART_MSR_DSR | UART_MSR_CTS);
                | UART_MSR_DSR | UART_MSR_CTS);
      uarts[i].regs.msr |= ((uarts[i].regs.mcr & UART_MCR_AUX2) << 4);
      uarts[i].regs.msr |= ((uarts[i].regs.mcr & UART_MCR_AUX2) << 4);
      uarts[i].regs.msr |= ((uarts[i].regs.mcr & UART_MCR_AUX1) << 4);
      uarts[i].regs.msr |= ((uarts[i].regs.mcr & UART_MCR_AUX1) << 4);
      uarts[i].regs.msr |= ((uarts[i].regs.mcr & UART_MCR_RTS) << 3);
      uarts[i].regs.msr |= ((uarts[i].regs.mcr & UART_MCR_RTS) << 3);
      uarts[i].regs.msr |= ((uarts[i].regs.mcr & UART_MCR_DTR) << 5);
      uarts[i].regs.msr |= ((uarts[i].regs.mcr & UART_MCR_DTR) << 5);
    }
    }
 
 
    /* Interrupt detection in proper priority order. */
    /* Interrupt detection in proper priority order. */
    uarts[i].regs.iir = UART_IIR_NO_INT;
    uarts[i].regs.iir = UART_IIR_NO_INT;
    if (uarts[i].regs.ier & UART_IER_RLSI &&
    if (uarts[i].regs.ier & UART_IER_RLSI &&
        uarts[i].regs.lsr & (UART_LSR_OVRRUN | UART_LSR_PARITY
        uarts[i].regs.lsr & (UART_LSR_OVRRUN | UART_LSR_PARITY
          | UART_LSR_FRAME | UART_LSR_BREAK)) {
          | UART_LSR_FRAME | UART_LSR_BREAK)) {
      uarts[i].regs.iir = UART_IIR_RLSI;
      uarts[i].regs.iir = UART_IIR_RLSI;
    }
    }
    else if (uarts[i].regs.ier & UART_IER_RDI &&
    else if (uarts[i].regs.ier & UART_IER_RDI &&
        uarts[i].regs.lsr & UART_LSR_RDRDY) {
        uarts[i].regs.lsr & UART_LSR_RDRDY) {
      uarts[i].regs.iir = UART_IIR_RDI;
      uarts[i].regs.iir = UART_IIR_RDI;
    }
    }
    else if (uarts[i].regs.ier & UART_IER_THRI &&
    else if (uarts[i].regs.ier & UART_IER_THRI &&
        uarts[i].regs.lsr & UART_LSR_TXBUFE &&
        uarts[i].regs.lsr & UART_LSR_TXBUFE &&
        uarts[i].istat.thre_int == 1) {
        uarts[i].istat.thre_int == 1) {
      uarts[i].regs.iir = UART_IIR_THRI;
      uarts[i].regs.iir = UART_IIR_THRI;
    }
    }
    else if (uarts[i].regs.ier & UART_IER_MSI &&
    else if (uarts[i].regs.ier & UART_IER_MSI &&
        uarts[i].regs.msr & (UART_MSR_DCTS | UART_MSR_DDSR
        uarts[i].regs.msr & (UART_MSR_DCTS | UART_MSR_DDSR
          | UART_MSR_TERI | UART_MSR_DDCD)) {
          | UART_MSR_TERI | UART_MSR_DDCD)) {
      uarts[i].regs.iir = UART_IIR_MSI;
      uarts[i].regs.iir = UART_IIR_MSI;
    }
    }
    if (!(uarts[i].regs.iir & UART_IIR_NO_INT))
    if (!(uarts[i].regs.iir & UART_IIR_NO_INT))
      report_interrupt(config.uarts[i].irq);
      report_interrupt(config.uarts[i].irq);
  }
  }
}
}
 
 
/* Print register values on stdout. */
/* Print register values on stdout. */
void uart_status()
void uart_status()
{
{
  int i, j;
  int i, j;
 
 
  for(i = 0; i < config.nuarts; i++) {
  for(i = 0; i < config.nuarts; i++) {
    if ( !config.uarts[i].baseaddr )
    if ( !config.uarts[i].baseaddr )
      continue;
      continue;
    printf("\nUART%d visible registers at 0x%.8x:\n", i, config.uarts[i].baseaddr);
    printf("\nUART%d visible registers at 0x%.8x:\n", i, config.uarts[i].baseaddr);
    printf("RXBUF:");
    printf("RXBUF:");
    for (j = uarts[i].istat.rxbuf_head; j != uarts[i].istat.rxbuf_tail; j = (j + 1) % uarts[i].fifo_len)
    for (j = uarts[i].istat.rxbuf_head; j != uarts[i].istat.rxbuf_tail; j = (j + 1) % uarts[i].fifo_len)
      printf (" %.2x", uarts[i].regs.rxbuf[j]);
      printf (" %.2x", uarts[i].regs.rxbuf[j]);
    printf("  TXBUF: %.2x\n", uarts[i].regs.txbuf);
    printf("  TXBUF: %.2x\n", uarts[i].regs.txbuf);
    printf("DLL  : %.2x  DLH  : %.2x\n", uarts[i].regs.dll, uarts[i].regs.dlh);
    printf("DLL  : %.2x  DLH  : %.2x\n", uarts[i].regs.dll, uarts[i].regs.dlh);
    printf("IER  : %.2x  IIR  : %.2x\n", uarts[i].regs.ier, uarts[i].regs.iir);
    printf("IER  : %.2x  IIR  : %.2x\n", uarts[i].regs.ier, uarts[i].regs.iir);
    printf("LCR  : %.2x  MCR  : %.2x\n", uarts[i].regs.lcr, uarts[i].regs.mcr);
    printf("LCR  : %.2x  MCR  : %.2x\n", uarts[i].regs.lcr, uarts[i].regs.mcr);
    printf("LSR  : %.2x  MSR  : %.2x\n", uarts[i].regs.lsr, uarts[i].regs.msr);
    printf("LSR  : %.2x  MSR  : %.2x\n", uarts[i].regs.lsr, uarts[i].regs.msr);
    printf("SCR  : %.2x\n", uarts[i].regs.scr);
    printf("SCR  : %.2x\n", uarts[i].regs.scr);
 
 
    printf("\nInternal registers (sim debug):\n");
    printf("\nInternal registers (sim debug):\n");
    printf("RXSER: %.2x  TXSER: %.2x\n", uarts[i].iregs.rxser, uarts[i].iregs.txser);
    printf("RXSER: %.2x  TXSER: %.2x\n", uarts[i].iregs.rxser, uarts[i].iregs.txser);
 
 
    printf("\nInternal status (sim debug):\n");
    printf("\nInternal status (sim debug):\n");
    printf("char_clks: %d\n", uarts[i].char_clks);
    printf("char_clks: %d\n", uarts[i].char_clks);
    printf("rxser_clks: %d  txser_clks: %d\n", uarts[i].istat.rxser_clks, uarts[i].istat.txser_clks);
    printf("rxser_clks: %d  txser_clks: %d\n", uarts[i].istat.rxser_clks, uarts[i].istat.txser_clks);
    printf("rxser: %d  txser: %d\n", uarts[i].istat.rxser_full, uarts[i].istat.txser_full);
    printf("rxser: %d  txser: %d\n", uarts[i].istat.rxser_full, uarts[i].istat.txser_full);
    printf("rxbuf: %d  txbuf: %d\n", uarts[i].istat.rxbuf_full, uarts[i].istat.txbuf_full);
    printf("rxbuf: %d  txbuf: %d\n", uarts[i].istat.rxbuf_full, uarts[i].istat.txbuf_full);
    printf("Using IRQ%i\n", config.uarts[i].irq);
    printf("Using IRQ%i\n", config.uarts[i].irq);
    if (config.uarts[i].vapi_id)
    if (config.uarts[i].vapi_id)
      printf ("Connected to vapi ID=%x\n\n", config.uarts[i].vapi_id);
      printf ("Connected to vapi ID=%x\n\n", config.uarts[i].vapi_id);
    else
    else
      printf("RX fs: %p  TX fs: %p\n\n", uarts[i].rxfs, uarts[i].txfs);
      printf("RX fs: %p  TX fs: %p\n\n", uarts[i].rxfs, uarts[i].txfs);
  }
  }
}
}
 
 

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