/* sprs.c -- Simulation of OR1K special-purpose registers
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/* sprs.c -- Simulation of OR1K special-purpose registers
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Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
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Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
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This file is part of OpenRISC 1000 Architectural Simulator.
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This file is part of OpenRISC 1000 Architectural Simulator.
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This program is free software; you can redistribute it and/or modify
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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#include <stdlib.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include <stdio.h>
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#include <string.h>
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#include <string.h>
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#include <errno.h>
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#include <errno.h>
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#include "arch.h"
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#include "arch.h"
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#include "sprs.h"
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#include "sprs.h"
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#include "abstract.h"
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#include "abstract.h"
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#include "sim-config.h"
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#include "sim-config.h"
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extern int cont_run; /* defined in toplevel.c */
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extern int cont_run; /* defined in toplevel.c */
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extern int tt_stopped; /* defined in tick.c */
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extern int tt_stopped; /* defined in tick.c */
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extern int flag;
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extern int flag;
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sprword sprs[MAX_SPRS];
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sprword sprs[MAX_SPRS];
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int audio_cnt = 0;
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int audio_cnt = 0;
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static FILE *fo = 0;
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static FILE *fo = 0;
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/* Set a specific SPR with a value. */
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/* Set a specific SPR with a value. */
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inline void
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inline void
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mtspr(const int regno, const sprword value)
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mtspr(const int regno, const sprword value)
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{
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{
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int ofs = regno % MAX_SPRS_PER_GRP;
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int ofs = regno % MAX_SPRS_PER_GRP;
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extern unsigned long pc_phy;
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extern unsigned long pc_phy;
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extern unsigned long reg[32];
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extern unsigned long reg[32];
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/* MM: Register hooks. */
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/* MM: Register hooks. */
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switch (regno) {
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switch (regno) {
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case 0xFFFD:
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case 0xFFFD:
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fo = fopen ("audiosim.pcm", "wb+");
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fo = fopen ("audiosim.pcm", "wb+");
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if (!fo) printf("Cannot open audiosim.pcm\n");
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if (!fo) printf("Cannot open audiosim.pcm\n");
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printf("Audio opened.\n");
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printf("Audio opened.\n");
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return;
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return;
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case 0xFFFE:
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case 0xFFFE:
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if (!fo) printf("audiosim.pcm not opened\n");
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if (!fo) printf("audiosim.pcm not opened\n");
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fputc (value & 0xFF, fo);
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fputc (value & 0xFF, fo);
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if ((audio_cnt % 1024) == 0)
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if ((audio_cnt % 1024) == 0)
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printf("%i\n", audio_cnt);
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printf("%i\n", audio_cnt);
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audio_cnt++;
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audio_cnt++;
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return;
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return;
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case 0xFFFF:
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case 0xFFFF:
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fclose(fo);
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fclose(fo);
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printf("Audio closed.\n");
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printf("Audio closed.\n");
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cont_run = 0;
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cont_run = 0;
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return;
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return;
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case SPR_TTCR:
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case SPR_TTCR:
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tt_stopped = 0;
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tt_stopped = 0;
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break;
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break;
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case SPR_SR:
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case SPR_SR:
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if(value & SPR_SR_F)
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if(value & SPR_SR_F)
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flag = 1;
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flag = 1;
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else
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else
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flag = 0;
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flag = 0;
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break;
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break;
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case SPR_NPC:
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case SPR_NPC:
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{
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{
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extern unsigned long pc;
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extern unsigned long pc;
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extern unsigned long pcnext;
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extern unsigned long pcnext;
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extern int delay_insn;
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extern int delay_insn;
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extern unsigned long pcdelay;
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extern unsigned long pcdelay;
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clear_pending_exception ();
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clear_pending_exception ();
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/* The debugger has redirected us to a new address */
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/* The debugger has redirected us to a new address */
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/* This is usually done to reissue an instruction
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/* This is usually done to reissue an instruction
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which just caused a breakpoint exception. */
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which just caused a breakpoint exception. */
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pc = value;
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pc = value;
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if(!value && config.sim.verbose)
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if(!value && config.sim.verbose)
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printf("WARNING: PC just set to 0!\n");
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printf("WARNING: PC just set to 0!\n");
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/* Clear any pending delay slot jumps also */
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/* Clear any pending delay slot jumps also */
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delay_insn = 0;
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delay_insn = 0;
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pcnext = value + 4;
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pcnext = value + 4;
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}
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}
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break;
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break;
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default:
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default:
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/* Links to GPRS */
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/* Links to GPRS */
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if(regno >= 0x0400 && regno < 0x0420)
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if(regno >= 0x0400 && regno < 0x0420)
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reg[regno - 0x0400] = value;
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reg[regno - 0x0400] = value;
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break;
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break;
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}
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}
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if (regno < MAX_SPRS)
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if (regno < MAX_SPRS) {
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sprs[regno] = value;
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sprs[regno] = value;
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if (runtime.sim.fspr_log) {
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fprintf(runtime.sim.fspr_log, "Write to SPR : [%08lX] <- [%08lX]\n", regno, value);
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}
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}
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else if (config.sim.verbose)
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else if (config.sim.verbose)
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printf("WARNING: write out of SPR range %08X\n", regno);
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printf("WARNING: write out of SPR range %08X\n", regno);
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}
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}
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#if 0
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#if 0
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/* Get a specific SPR. */
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/* Get a specific SPR. */
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inline sprword
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inline sprword
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mfspr_(const int regno)
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mfspr_(const int regno)
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{
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{
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extern unsigned long reg[32];
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extern unsigned long reg[32];
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extern unsigned long pc;
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extern unsigned long pc;
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extern unsigned long pcprev;
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extern unsigned long pcprev;
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sprword val;
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switch (regno) {
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switch (regno) {
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case SPR_SR:
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case SPR_SR:
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/* Exceptions are always enabled */
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/* Exceptions are always enabled */
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return sprs[regno] | SPR_SR_EXR;
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val = sprs[regno] | SPR_SR_EXR;
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break;
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case SPR_NPC:
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case SPR_NPC:
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return pc;
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val = pc;
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break;
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case SPR_PPC:
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case SPR_PPC:
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return pcprev;
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val = pcprev;
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break;
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default:
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default:
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/* Links to GPRS */
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/* Links to GPRS */
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if(regno >= 0x0400 && regno < 0x0420)
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if(regno >= 0x0400 && regno < 0x0420)
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return reg[regno - 0x0400];
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val = reg[regno - 0x0400];
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else if (regno < MAX_SPRS)
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else if (regno < MAX_SPRS)
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return sprs[regno];
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val = sprs[regno];
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}
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if (regno < MAX_SPRS) {
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if (runtime.sim.fspr_log) {
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fprintf(runtime.sim.fspr_log, "Read from SPR : [%08lX] -> [%08lX]\n", regno, val);
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}
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}
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if (config.sim.verbose)
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return val;
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}
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if (config.sim.verbose) {
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printf ("WARNING: read out of SPR range %08X\n", regno);
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printf ("WARNING: read out of SPR range %08X\n", regno);
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}
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return 0;
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return 0;
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}
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}
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#endif
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#endif
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/* Show status of important SPRs. */
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/* Show status of important SPRs. */
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void sprs_status()
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void sprs_status()
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{
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{
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printf("VR : 0x%.8x UPR : 0x%.8x\n", mfspr(SPR_VR), mfspr(SPR_UPR));
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printf("VR : 0x%.8x UPR : 0x%.8x\n", mfspr(SPR_VR), mfspr(SPR_UPR));
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printf("SR : 0x%.8x\n", mfspr(SPR_SR));
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printf("SR : 0x%.8x\n", mfspr(SPR_SR));
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printf("MACLO: 0x%.8x MACHI: 0x%.8x\n", mfspr(SPR_MACLO), mfspr(SPR_MACHI));
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printf("MACLO: 0x%.8x MACHI: 0x%.8x\n", mfspr(SPR_MACLO), mfspr(SPR_MACHI));
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printf("EPCR0: 0x%.8x EPCR1: 0x%.8x\n", mfspr(SPR_EPCR_BASE), mfspr(SPR_EPCR_BASE+1));
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printf("EPCR0: 0x%.8x EPCR1: 0x%.8x\n", mfspr(SPR_EPCR_BASE), mfspr(SPR_EPCR_BASE+1));
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printf("EEAR0: 0x%.8x EEAR1: 0x%.8x\n", mfspr(SPR_EEAR_BASE), mfspr(SPR_EEAR_BASE+1));
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printf("EEAR0: 0x%.8x EEAR1: 0x%.8x\n", mfspr(SPR_EEAR_BASE), mfspr(SPR_EEAR_BASE+1));
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printf("ESR0 : 0x%.8x ESR1 : 0x%.8x\n", mfspr(SPR_ESR_BASE), mfspr(SPR_ESR_BASE+1));
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printf("ESR0 : 0x%.8x ESR1 : 0x%.8x\n", mfspr(SPR_ESR_BASE), mfspr(SPR_ESR_BASE+1));
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printf("TTMR : 0x%.8x TTCR : 0x%.8x\n", mfspr(SPR_TTMR), mfspr(SPR_TTCR));
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printf("TTMR : 0x%.8x TTCR : 0x%.8x\n", mfspr(SPR_TTMR), mfspr(SPR_TTCR));
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printf("PICMR: 0x%.8x PICSR: 0x%.8x\n", mfspr(SPR_PICMR), mfspr(SPR_PICSR));
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printf("PICMR: 0x%.8x PICSR: 0x%.8x\n", mfspr(SPR_PICMR), mfspr(SPR_PICSR));
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printf("PPC: 0x%.8x NPC : 0x%.8x\n", mfspr(SPR_PPC), mfspr(SPR_NPC));
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printf("PPC: 0x%.8x NPC : 0x%.8x\n", mfspr(SPR_PPC), mfspr(SPR_NPC));
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}
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}
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