/* gpio.h -- Definition of types and structures for the GPIO code
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/* gpio.h -- Definition of types and structures for the GPIO code
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Copyright (C) 2001 Erez Volk, erez@mailandnews.comopencores.org
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Copyright (C) 2001 Erez Volk, erez@mailandnews.comopencores.org
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This file is part of OpenRISC 1000 Architectural Simulator.
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This file is part of OpenRISC 1000 Architectural Simulator.
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This program is free software; you can redistribute it and/or modify
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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*/
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#ifndef __OR1KSIM_PERIPHERAL_GPIO_H
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#ifndef __OR1KSIM_PERIPHERAL_GPIO_H
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#define __OR1KSIM_PERIPHERAL_GPIO_H
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#define __OR1KSIM_PERIPHERAL_GPIO_H
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/* Address space required by one GPIO */
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/* Address space required by one GPIO */
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#define GPIO_ADDR_SPACE 0x20
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#define GPIO_ADDR_SPACE 0x20
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/* Relative Register Addresses */
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/* Relative Register Addresses */
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#define RGPIO_IN 0x00
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#define RGPIO_IN 0x00
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#define RGPIO_OUT 0x04
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#define RGPIO_OUT 0x04
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#define RGPIO_OE 0x08
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#define RGPIO_OE 0x08
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#define RGPIO_INTE 0x0C
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#define RGPIO_INTE 0x0C
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#define RGPIO_PTRIG 0x10
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#define RGPIO_PTRIG 0x10
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#define RGPIO_AUX 0x14
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#define RGPIO_AUX 0x14
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#define RGPIO_CTRL 0x18
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#define RGPIO_CTRL 0x18
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#define RGPIO_INTS 0x1C
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#define RGPIO_INTS 0x1C
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/* Fields inside RGPIO_CTRL */
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/* Fields inside RGPIO_CTRL */
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#define RGPIO_CTRL_ECLK 0x00000001
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#define RGPIO_CTRL_ECLK 0x00000001
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#define RGPIO_CTRL_NEC 0x00000002
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#define RGPIO_CTRL_NEC 0x00000002
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#define RGPIO_CTRL_INTE 0x00000004
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#define RGPIO_CTRL_INTE 0x00000004
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#define RGPIO_CTRL_INTS 0x00000008
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#define RGPIO_CTRL_INTS 0x00000008
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#endif /* __OR1KSIM_PERIPHERAL_GPIO_H */
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#endif /* __OR1KSIM_PERIPHERAL_GPIO_H */
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