OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_47/] [or1ksim/] [testbench/] [mc_sync.h] - Diff between revs 1419 and 1765

Go to most recent revision | Only display areas with differences | Details | Blame | View Log

Rev 1419 Rev 1765
/* mc_sync.h - Memory Controller testbench SYNCdevices defines
/* mc_sync.h - Memory Controller testbench SYNCdevices defines
         Copyright (C) 2001 by Ivan Guzvinec, ivang@opencores.org
         Copyright (C) 2001 by Ivan Guzvinec, ivang@opencores.org
 
 
         This file is part of OpenRISC 1000 Architectural Simulator.
         This file is part of OpenRISC 1000 Architectural Simulator.
 
 
         This program is free software; you can redistribute it and/or modify
         This program is free software; you can redistribute it and/or modify
         it under the terms of the GNU General Public License as published by
         it under the terms of the GNU General Public License as published by
         the Free Software Foundation; either version 2 of the License, or
         the Free Software Foundation; either version 2 of the License, or
         (at your option) any later version.
         (at your option) any later version.
 
 
         This program is distributed in the hope that it will be useful,
         This program is distributed in the hope that it will be useful,
         but WITHOUT ANY WARRANTY; without even the implied warranty of
         but WITHOUT ANY WARRANTY; without even the implied warranty of
         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.    See the
         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.    See the
         GNU General Public License for more details.
         GNU General Public License for more details.
 
 
         You should have received a copy of the GNU General Public License
         You should have received a copy of the GNU General Public License
         along with this program; if not, write to the Free Software
         along with this program; if not, write to the Free Software
         Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
         Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
*/
 
 
#ifndef __MC_SYNC_H
#ifndef __MC_SYNC_H
#define __MC_SYNC_H
#define __MC_SYNC_H
 
 
/* should configuration be read from MC? */
/* should configuration be read from MC? */
#define MC_READ_CONF
#define MC_READ_CONF
 
 
/* TEMPLATE SELECTION       */
/* TEMPLATE SELECTION       */
/* change #undef to #define */
/* change #undef to #define */
#define _MC_TEST_TEMPLATE1
#define _MC_TEST_TEMPLATE1
#undef  _MC_TEST_TEMPLATE2
#undef  _MC_TEST_TEMPLATE2
#undef  _MC_TEST_TEMPLATE3
#undef  _MC_TEST_TEMPLATE3
/* ------------------------ */
/* ------------------------ */
 
 
/* memory configuration that must reflect mcmem.cfg */
/* memory configuration that must reflect mcmem.cfg */
#define MC_SYNC_CSMASK  0xFE    /* 8 bit mask for 8 chip selects. 1 ASYNC at CS, 0 something else at CS */
#define MC_SYNC_CSMASK  0xFE    /* 8 bit mask for 8 chip selects. 1 ASYNC at CS, 0 something else at CS */
 
 
typedef struct MC_SYNC_CS
typedef struct MC_SYNC_CS
{
{
  unsigned long M;
  unsigned long M;
} MC_SYNC_CS;
} MC_SYNC_CS;
 
 
MC_SYNC_CS mc_sync_cs[8] = {
MC_SYNC_CS mc_sync_cs[8] = {
  { 0x02  /* SELect mask */
  { 0x02  /* SELect mask */
    },
    },
  { 0x04 },
  { 0x04 },
  { 0x06 },
  { 0x06 },
  { 0x08 },
  { 0x08 },
  { 0x0A },
  { 0x0A },
  { 0x0C },
  { 0x0C },
  { 0x0E },
  { 0x0E },
  { 0x10 } };
  { 0x10 } };
 
 
 
 
#define MC_SYNC_TEST0   0x00000001LU /* no parity, bank after column, write enable */
#define MC_SYNC_TEST0   0x00000001LU /* no parity, bank after column, write enable */
#define MC_SYNC_TEST1   0x00000002LU /* parity */
#define MC_SYNC_TEST1   0x00000002LU /* parity */
#define MC_SYNC_TEST2   0x00000004LU /* bank after row */
#define MC_SYNC_TEST2   0x00000004LU /* bank after row */
#define MC_SYNC_TEST3   0x00000008LU /* RO */
#define MC_SYNC_TEST3   0x00000008LU /* RO */
#define MC_SYNC_TEST4   0x00000010LU /* - NOT DEFINED - */
#define MC_SYNC_TEST4   0x00000010LU /* - NOT DEFINED - */
 
 
#ifdef _MC_TEST_TEMPLATE1
#ifdef _MC_TEST_TEMPLATE1
  #define MC_SYNC_FLAGS 0x000002B4LU    /* MC_TEST_ flags... see mc_common.h */
  #define MC_SYNC_FLAGS 0x000002B4LU    /* MC_TEST_ flags... see mc_common.h */
  #define MC_SYNC_TESTS 0x00000005LU
  #define MC_SYNC_TESTS 0x00000005LU
#endif
#endif
 
 
#ifdef _MC_TEST_TEMPLATE2
#ifdef _MC_TEST_TEMPLATE2
  #define MC_SYNC_FLAGS 0x00000128LU    /* MC_TEST_ flags... see mc_common.h */
  #define MC_SYNC_FLAGS 0x00000128LU    /* MC_TEST_ flags... see mc_common.h */
  #define MC_SYNC_TESTS 0x00000008LU
  #define MC_SYNC_TESTS 0x00000008LU
#endif
#endif
 
 
#ifdef _MC_TEST_TEMPLATE3
#ifdef _MC_TEST_TEMPLATE3
  #define MC_SYNC_FLAGS 0x000007FFLU    /* MC_TEST_ flags... see mc_common.h */
  #define MC_SYNC_FLAGS 0x000007FFLU    /* MC_TEST_ flags... see mc_common.h */
  #define MC_SYNC_TESTS 0x0000000FLU
  #define MC_SYNC_TESTS 0x0000000FLU
#endif
#endif
 
 
 
 
#endif
#endif
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.